[alsa-devel] SAIF configuration on imx28

[George Stefan]

2012/8/23 Fabio Estevam <festevam at gmail.com>

> On Wed, Aug 22, 2012 at 5:25 AM, George Stefan
> <stefan.george87 at gmail.com> wrote:
>
> > aplay -l
> >
> > **** List of PLAYBACK Hardware Devices ****
> >
> > card 0: mxsevk [mxs-evk], device 0: cinterion pcm cinterion-0 []
> >
> >   Subdevices: 1/1
> >
> >   Subdevice #0: subdevice #0
> >
> >
> > ~ # arecord -l
> > **** List of CAPTURE Hardware Devices ****
> > card 0: mxsevk [mxs-evk], device 0: cinterion pcm cinterion-0 []
> >   Subdevices: 1/1
> >   Subdevice #0: subdevice #0
>
> Shouldn't this register as pcm cinterion-1 instead?
>
> On mx28evk we have:
>
> root at freescale ~$ aplay -l
> **** List of PLAYBACK Hardware Devices ****
> card 0: mxssgtl5000 [mxs_sgtl5000], device 0: HiFi Playback sgtl5000-0 []
>   Subdevices: 1/1
>   Subdevice #0: subdevice #0
> card 0: mxssgtl5000 [mxs_sgtl5000], device 1: HiFi Capture sgtl5000-1 []
>   Subdevices: 1/1
>   Subdevice #0: subdevice #0
>
> and we register it as:
>
> static struct snd_soc_dai_link mxs_sgtl5000_dai[] = {
>         {
>                 .name           = "HiFi Tx",
>                 .stream_name    = "HiFi Playback",
>                 .codec_dai_name = "sgtl5000",
>                 .codec_name     = "sgtl5000.0-000a",
>                 .cpu_dai_name   = "mxs-saif.0",
>                 .platform_name  = "mxs-saif.0",
>                 .ops            = &mxs_sgtl5000_hifi_ops,
>         }, {
>                 .name           = "HiFi Rx",
>                 .stream_name    = "HiFi Capture",
>                 .codec_dai_name = "sgtl5000",
>                 .codec_name     = "sgtl5000.0-000a",
>                 .cpu_dai_name   = "mxs-saif.1",
>                 .platform_name  = "mxs-saif.1",
>                 .ops            = &mxs_sgtl5000_hifi_ops,
>         },
> };
>
> Regards,
>
> Fabio Estevam
>
Hello!
Yes, thats true. I think there is another problem with the receiving of the
clock
from the modem part!

/*set a default freq of 128Hz to cinterion*/
// clk_set_rate(clk, 1280000); /* its slave...it should take the clock from
master */
clk_enable(clk);
/*set the saif clk mux, saif0/saif1 both use saif0 clk*/
__raw_writel(BF_DIGCTL_CTRL_SAIF_CLKMUX_SEL(0x0),               \
IO_ADDRESS(DIGCTL_PHYS_ADDR) + HW_DIGCTL_CTRL);

Using this configuration i am not able to receive IRQs from DMA and i think
the reason
is that SAIF is not receiving the CLK.
What do you think?
Thanks,
George.