[alsa-devel] [PATCH 2/4] ASoC: soc-cache: Add support for standard register caching

[Dimitris Papastamos]

On Fri, 2010-10-22 at 09:03 -0700, Mark Brown wrote:
> On Fri, Oct 22, 2010 at 03:28:20PM +0100, Dimitris Papastamos wrote:
> 
> > +static int snd_soc_cache_default_sync(struct snd_soc_codec *codec)
> > +{
> > +       const u8 *cache;
> > +       struct snd_soc_codec_driver *codec_drv;
> > +       unsigned int val;
> > 
> > +	codec_drv = codec->driver;
> > +	for (n = 0; n < codec_drv->reg_cache_size; ++n) {
> 
> Please use i as an array index unless using something meaningful.
> 
> > +                       if (!memcmp(&val, cache, codec_drv->reg_word_size))
> > +                               continue;
> 
> This memcmp() looks very suspicious - we're copying from an unsigned int
> into a variable of another type.  That seems to have a bit of an
> endianness assumption, doesn't it?  It certainly needs comments
> explaining how it works; a similar thing applies to the other memcpy()
> and memcmp() operations in the code.

Consider the following example. (unsigned int is 4 bytes).

unsigned int old = 0xABCD, new = 0;
void *p;

On a little-endian system this will be stored in memory as DCBA with D
being at a lower address.  Now consider the following code.

p = &old;
memcpy(&new, p, sizeof (unsigned int));

Now the value of new will be 0xABCD (stored in memory as DCBA again).
This holds both on a little-endian system as well as a big-endian
system.

The only problem I see with the above code, is when
codec_drv->reg_word_size > sizeof (unsigned int) but that can't really
happen in practice.

Thanks,
Dimitrios