[alsa-devel] (SoC) Does i.MX27's SSI work as I2S clock master?

[Juergen Beisert]

On Dienstag, 25. November 2008, ngc at drvlabo.jp wrote:
> Now I'm porting WM8728 driver with i.MX27ADS, based on Freescale's BSP
> kernel(2.6.22) and refering to ALSA SoC git repository.
>
> I'm connecting the WM8728 to the SSI2 controller via SSI-3 signal set.
> Then, my ADS board has altered:
>   i.MX27         WM8728
>   ---------------------
>   SSI3_CLK       BCLKIN
>   SSI3_FS        LRCIN
>   SSI3_TXDAT     DIN
>   TOUT/SSI2_MCLK  MCLK
>
> Of course, I added some codes to configure GPIO pins as appropriate into
> board specific sources.
>
> Then, I'm trying to play sounds via WM8728 and
> have not hear any sounds yet.
> I checked SSI-3 signal set with an oscilloscope,
> no clock signal appears on SSI3_CLK.
> I tried the various SSI setting, I2S normal, I2S master,
> asychronous/synchronous, normal mode/network mode, ...
> But, I can't see clock signal, yet.
>
>
> I want to know an example setting to act i.MX' SSI as I2S clock master.

Maybe the SPI-DAM-PIN mapping could help you:

SSI1_* pin group is port 4 at the DAM unit
SSI2_* pin group is port 5 at the DAM unit
SSI3_* pin group is port 6 at the DAM unit
SSI4_* pin group is port 3 at the DAM unit

I didn't find this info in the datasheet yet. 

Regards,
Juergen

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 Dipl.-Ing. Juergen Beisert | http://www.pengutronix.de
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