[alsa-devel] Enabling in-kernel synch for M-Audio boards

[John Rigg]

On Tue, Sep 18, 2007 at 03:50:04PM +0200, Clemens Ladisch wrote:
> John Rigg wrote:
> > On Tue, Sep 18, 2007 at 10:07:05AM +0200, Ludovico Verducci wrote:
> > > As far as I know the delta family boards drivers support the
> > > synchronization of up to 4 audio boards over PCI: at the moment I'm
> > > reverse engineering the hardware trying to understand how this can be
> > > accomplished.
> > 
> > I'm aware that some Windows users are using several Delta 1010s
> > without external sync, but I'm not sure how it is done (or how
> > good it sounds). AFAIK it would require a VCXO so that the frequency 
> > of the card's clock could be varied by enough to keep it in sync 
> > (ie. making the clock oscillator part of a phase locked loop). Looking
> > at the PCI card on the 1010, I can only see standard fixed-frequency 
> > crystals. The only PLLs appear to be the internal PLL in the S/PDIF
> > receiver and the 4046 PLL chip for the word clock input signal.
> 
> In theory, it should be possible to use the PCI clock (between 25 and
> 33 MHz) as input for one of the PLLs, probably after dividing it down.

AFAICT neither of these PLLs can receive an input from the PCI clock.
The S/PDIF receiver only receives a signal from the S/PDIF input, and
the word clock PLL only receives a signal from the WC input in the 
breakout box (via a pulse shaping circuit to clean up the waveform).

Apart from that, neither of these PLLs is particularly good at removing
jitter (and I'd expect the PCI clock to have a high level of jitter),
so quality would be reduced.

John