[alsa-devel] another device for opl3sa2

[Paul Vojta]

On Thu, Jul 05, 2007 at 04:38:57PM +0200, Takashi Iwai wrote:
> A good finding.  So the possible causes are
> 
> - opl3sa specific initialization, such as snd_opl3sa2_detect()
> - opl3sa specific mixer element, like Master Volume.
> 
> Can your machine suspend/resume?  It's interesting whether the sound
> is resumed well with snd-opl3sa2 driver.  I remember it worked quite
> ago, but not tested with the recent versions.

My machine can sleep but not hibernate.  After sleep the sound is
resumed well.

I also edited cs4231_lib.c and changed lines 242 and 861 from "#if 0"
to "#if 1" (thus enabling the call to snd_cs4231_debug(chip) at the
end of snd_cs4231_playback_prepare() ).  Here is the output I got:

1.  module opl3sa2

  a.  First time running aplay:

CS4231 REGS:      INDEX = 0x0e                   STATUS = 0xc4
  0x00: left input      = 0x00    0x10: alt 1 (CFIG 2)  = 0x80
  0x01: right input     = 0x00    0x11: alt 2 (CFIG 3)  = 0x01
  0x02: GF1 left input  = 0x06    0x12: left line in    = 0x9f
  0x03: GF1 right input = 0x06    0x13: right line in   = 0x9f
  0x04: CD left input   = 0x9f    0x14: timer low       = 0x00
  0x05: CD right input  = 0x9f    0x15: timer high      = 0x00
  0x06: left output     = 0x0c    0x16: left MIC (PnP)  = 0x80
  0x07: right output    = 0x0c    0x17: right MIC (PnP) = 0x80
  0x08: playback format = 0x57    0x18: IRQ status      = 0x00
  0x09: iface (CFIG 1)  = 0x08    0x19: left line out   = 0x80
  0x0a: pin control     = 0x02    0x1a: mono control    = 0x0f
  0x0b: init & status   = 0x20    0x1b: right line out  = 0x80
  0x0c: revision & mode = 0xca    0x1c: record format   = 0x20
  0x0d: loopback        = 0xfc    0x1d: var freq (PnP)  = 0x80
  0x0e: ply upr count   = 0x0a    0x1e: ply lwr count   = 0x00
  0x0f: rec upr count   = 0xc3    0x1f: rec lwr count   = 0x00

  b.  Second time running aplay:

CS4231 REGS:      INDEX = 0x0e                   STATUS = 0xc4
  0x00: left input      = 0x00    0x10: alt 1 (CFIG 2)  = 0x80
  0x01: right input     = 0x00    0x11: alt 2 (CFIG 3)  = 0x01
  0x02: GF1 left input  = 0x06    0x12: left line in    = 0x9f
  0x03: GF1 right input = 0x06    0x13: right line in   = 0x9f
  0x04: CD left input   = 0x9f    0x14: timer low       = 0x00
  0x05: CD right input  = 0x9f    0x15: timer high      = 0x00
  0x06: left output     = 0x0c    0x16: left MIC (PnP)  = 0x80
  0x07: right output    = 0x0c    0x17: right MIC (PnP) = 0x80
  0x08: playback format = 0x57    0x18: IRQ status      = 0x00
  0x09: iface (CFIG 1)  = 0x08    0x19: left line out   = 0x80
  0x0a: pin control     = 0x02    0x1a: mono control    = 0x0f
  0x0b: init & status   = 0x00    0x1b: right line out  = 0x80
  0x0c: revision & mode = 0xca    0x1c: record format   = 0x20
  0x0d: loopback        = 0xfc    0x1d: var freq (PnP)  = 0x80
  0x0e: ply upr count   = 0x0a    0x1e: ply lwr count   = 0x00
  0x0f: rec upr count   = 0xc3    0x1f: rec lwr count   = 0x00

2.  Module cs4232, both times running aplay:

CS4231 REGS:      INDEX = 0x0e                   STATUS = 0xc4
  0x00: left input      = 0x00    0x10: alt 1 (CFIG 2)  = 0x80
  0x01: right input     = 0x00    0x11: alt 2 (CFIG 3)  = 0x01
  0x02: GF1 left input  = 0x9f    0x12: left line in    = 0x9f
  0x03: GF1 right input = 0x9f    0x13: right line in   = 0x9f
  0x04: CD left input   = 0x9f    0x14: timer low       = 0x00
  0x05: CD right input  = 0x9f    0x15: timer high      = 0x00
  0x06: left output     = 0x0c    0x16: left MIC (PnP)  = 0x80
  0x07: right output    = 0x0c    0x17: right MIC (PnP) = 0x80
  0x08: playback format = 0x57    0x18: IRQ status      = 0x00
  0x09: iface (CFIG 1)  = 0x08    0x19: left line out   = 0x80
  0x0a: pin control     = 0x02    0x1a: mono control    = 0xcf
  0x0b: init & status   = 0x00    0x1b: right line out  = 0x80
  0x0c: revision & mode = 0xca    0x1c: record format   = 0x20
  0x0d: loopback        = 0xfc    0x1d: var freq (PnP)  = 0x80
  0x0e: ply upr count   = 0x0a    0x1e: ply lwr count   = 0x00
  0x0f: rec upr count   = 0xc3    0x1f: rec lwr count   = 0x00


The value of 0x0b in the first group is different from the other two groups.

--Paul Vojta, vojta at math.berkeley.edu