Add APIs to allow atomic additions or subtractions.

This API can be used to synchronize buffer W/R pointers between pipelines and components running on different DSP cores.

Signed-off-by: Liam Girdwood liam.r.girdwood@linux.intel.com --- src/arch/xtensa/include/arch/Makefile.am | 1 + src/arch/xtensa/include/arch/atomic.h | 77 ++++++++++++++++++++++++++++++++ src/include/reef/Makefile.am | 1 + src/include/reef/atomic.h | 53 ++++++++++++++++++++++ 4 files changed, 132 insertions(+) create mode 100644 src/arch/xtensa/include/arch/atomic.h create mode 100644 src/include/reef/atomic.h

diff --git a/src/arch/xtensa/include/arch/Makefile.am b/src/arch/xtensa/include/arch/Makefile.am index 42b3b700..135ef64c 100644 --- a/src/arch/xtensa/include/arch/Makefile.am +++ b/src/arch/xtensa/include/arch/Makefile.am @@ -1,4 +1,5 @@ noinst_HEADERS = \ + atomic.h \ cache.h \ interrupt.h \ reef.h \ diff --git a/src/arch/xtensa/include/arch/atomic.h b/src/arch/xtensa/include/arch/atomic.h new file mode 100644 index 00000000..80c4522f --- /dev/null +++ b/src/arch/xtensa/include/arch/atomic.h @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2018, Intel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the Intel Corporation nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * Author: Liam Girdwood liam.r.girdwood@linux.intel.com + * + */ + +#ifndef __ARCH_ATOMIC_H_ +#define __ARCH_ATOMIC_H_ + +#include <stdint.h> +#include <errno.h> + +typedef struct { + volatile int32_t value; +} atomic_t; + +static inline void arch_atomic_init(atomic_t *a, int32_t value) +{ + a->value = value; +} + +static inline void arch_atomic_add(atomic_t *a, int32_t value) +{ + int32_t result, current; + + __asm__ __volatile__( + "1: l32i %1, %2, 0\n" + " wsr %1, scompare1\n" + " add %0, %1, %3\n" + " s32c1i %0, %2, 0\n" + " bne %0, %1, 1b\n" + : "=&a" (result), "=&a" (current) + : "a" (&a->value), "a" (value) + : "memory"); +} + +static inline void arch_atomic_sub(atomic_t *a, int32_t value) +{ + int32_t result, current; + + __asm__ __volatile__( + "1: l32i %1, %2, 0\n" + " wsr %1, scompare1\n" + " sub %0, %1, %3\n" + " s32c1i %0, %2, 0\n" + " bne %0, %1, 1b\n" + : "=&a" (result), "=&a" (current) + : "a" (&a->value), "a" (value) + : "memory"); +} + +#endif diff --git a/src/include/reef/Makefile.am b/src/include/reef/Makefile.am index 8b47664d..f6f9bb29 100644 --- a/src/include/reef/Makefile.am +++ b/src/include/reef/Makefile.am @@ -7,6 +7,7 @@ includedir = $(prefix)/include/sof/reef

include_HEADERS = \ alloc.h \ + atomic.h \ clock.h \ dai.h \ debug.h \ diff --git a/src/include/reef/atomic.h b/src/include/reef/atomic.h new file mode 100644 index 00000000..b26b7016 --- /dev/null +++ b/src/include/reef/atomic.h @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2018, Intel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the Intel Corporation nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * Author: Liam Girdwood liam.r.girdwood@linux.intel.com + * + */ + +#ifndef __INCLUDE_ATOMIC_H_ +#define __INCLUDE_ATOMIC_H_ + +#include <stdint.h> +#include <arch/atomic.h> + +static inline void atomic_init(atomic_t *a, int32_t value) +{ + arch_atomic_init(a, value); +} + +static inline void atomic_add(atomic_t *a, int32_t value) +{ + arch_atomic_add(a, value); +} + +static inline void atomic_sub(atomic_t *a, int32_t value) +{ + arch_atomic_sub(a, value); +} + +#endif