Il 17/09/25 09:53, hailong.fan ha scritto:

From: Hailong Fan <hailong.fan@mediatek.com>

Add device tree binding documentation for the MediaTek MT8196 DSP. The DSP is used by the Sound Open Firmware driver node and includes registers, clocks, memory regions, and a mailbox for DSP communication.

Signed-off-by: Hailong Fan <hailong.fan@mediatek.com> --- .../bindings/dsp/mediatek,mt8196-dsp.yaml | 98 +++++++++++++++++++ 1 file changed, 98 insertions(+) create mode 100644 Documentation/devicetree/bindings/dsp/mediatek,mt8196-dsp.yaml

diff --git a/Documentation/devicetree/bindings/dsp/mediatek,mt8196-dsp.yaml b/Documentation/devicetree/bindings/dsp/mediatek,mt8196-dsp.yaml new file mode 100644 index 000000000000..af0f9d71200f --- /dev/null +++ b/Documentation/devicetree/bindings/dsp/mediatek,mt8196-dsp.yaml @@ -0,0 +1,98 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dsp/mediatek,mt8196-dsp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek mt8196 DSP core

mt->MT (MT8196)

+ +maintainers: + - Hailong Fan <hailong.fan@mediatek.com> + +description: |

Drop the colon |, you don't need it.

+ The MediaTek mt8196 SoC contains a DSP core used for advanced pre-

mt->MT (MT8196) Also document *which* DSP core this SoC contains. Specifically, say that this SoC contains a dual-core Cadence HiFi5 Audio Engine DSP - because this is what it is.

+ and post-audio processing. This DSP is typically used by the Sound + Open Firmware (SOF) driver and requires registers, clocks, memory + regions, and a mailbox for communication.

..snip..

+additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/mt8196-clk.h> + #include <dt-bindings/power/mt8196-power.h>

Before including binding headers with the same names as downstream, refer to the series that are currently on the mailing lists, because that's what will ultimately get upstream. dt-bindings/clock/mediatek,mt8196-clock.h dt-bindings/power/mediatek,mt8196-power.h

+ adsp@1a000000 { + compatible = "mediatek,mt8196-dsp"; + reg = <0x1a000000 0x5000>, + <0x1a210000 0x80000>, + <0x1a345000 0x300>, + <0x1a00f000 0x1000>; + reg-names = "cfg", "sram", "sec", "bus"; + clocks = <&cksys_clk CLK_CK_ADSP_SEL>, + <&cksys_clk CLK_CK_TCK_26M_MX9>, + <&cksys_clk CLK_CK_ADSPPLL>;

and use the upstream names for those clocks. <&topckgen CLK_TOP_ADSP>, <&clk26m>, <&apmixedsys CLK_APMIXED_ADSPPLL>,

+ clock-names = "audiodsp", + "sys_clk", + "adsppll";

clock-names fit in one line; plus, please "sys-clk" instead.

+ power-domains = <&scpsys MT8196_POWER_DOMAIN_ADSP_TOP_DORMANT>;

power-domains = <&spm MT8196_POWER_DOMAIN_ADSP_TOP_DORMANT>;

+ mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>; + mbox-names = "rx", "tx"; + };

Regards, Angelo