We don't actually use layer 2 interrupt in baytrail, in the new layer 2 interrupt design, it will fallback to use the root arch interrupt.
Signed-off-by: Keyon Jie yang.jie@linux.intel.com --- src/platform/baytrail/platform.c | 23 +++++++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/src/platform/baytrail/platform.c b/src/platform/baytrail/platform.c index b8c3e49..6726325 100644 --- a/src/platform/baytrail/platform.c +++ b/src/platform/baytrail/platform.c @@ -100,7 +100,7 @@ int platform_boot_complete(uint32_t boot_message) }
/* clear mask in PISR, bits are W1C in docs but some bits need preserved ?? */ -void platform_interrupt_clear(uint32_t irq, uint32_t mask) +void byt_interrupt_clear(uint32_t irq, uint32_t mask) { switch (irq) { case IRQ_NUM_EXT_DMAC0: @@ -123,21 +123,34 @@ void platform_interrupt_clear(uint32_t irq, uint32_t mask) }
/* TODO: expand this to 64 bit - should we just return mask of IRQ numbers */ -uint32_t platform_interrupt_get_enabled(void) +uint32_t byt_interrupt_get_enabled(void) { return shim_read(SHIM_PIMR); }
-void platform_interrupt_mask(uint32_t irq, uint32_t mask) +void byt_interrupt_mask(uint32_t irq) {
}
-void platform_interrupt_unmask(uint32_t irq, uint32_t mask) +void byt_interrupt_unmask(uint32_t irq) {
}
+static const struct plf_irq_ops byt_irq_ops = { + .get_enabled = byt_interrupt_get_enabled, + .int_clear = byt_interrupt_clear, + .int_mask = byt_interrupt_mask, + .int_unmask = byt_interrupt_unmask, +}; + +void byt_interrupt_init(void) +{ + plf_irq_ops = &byt_irq_ops; +} + + static struct timer platform_ext_timer = { .id = TIMER3, .irq = IRQ_NUM_EXT_TIMER, @@ -155,6 +168,8 @@ int platform_init(struct reef *reef) #error Undefined platform #endif
+ byt_interrupt_init(); + trace_point(TRACE_BOOT_PLATFORM_MBOX);
/* clear mailbox for early trace and debug */