On Fri, 2018-03-30 at 09:42 -0700, Ranjani Sridharan wrote:
On Sat, 2018-03-31 at 00:31 +0800, Keyon Jie wrote:
From: Wu Zhigang zhigang.wu@linux.intel.com
Move the DAI's buffer pointer update location from dai_dma_cb() to dai_copy(). This will make pipeline more stable. The xrun possibility will be lower.Even in xrun it will recover, it will not have dsp oops. DAI's buffer pointer will be updated in the pipeline copy sequence as other components did. Then the DMA will not update the buffer pointer by itself. in HOST--->VOL--->DAI pipeline, when DMA finished, it has to reschedule the pipeline to let the pointer update. this could avoid the xrun when adjust the read and write pointers by different componets.
I may be wrong here but how do we make sure we are always in sync with the clock rate in this case?
Pipeline scheduling can either based on DMA IRQ or an internal timer. In this case the r/w pointer updates are aligned with the rest of the pipeline updates and are scheduled by the DMA IRQ.
Liam