10 May
2018
10 May
'18
5:58 p.m.
On Thu, 2018-05-10 at 14:25 +0000, sound-open-firmware-bounces@alsa-project.org wrote:
/* DSP internal interrupts */ -static struct irq_parent dsp_irq[4] = {
{IRQ_NUM_EXT_LEVEL2, parent_level2_handler, },{IRQ_NUM_EXT_LEVEL3, parent_level3_handler, },{IRQ_NUM_EXT_LEVEL4, parent_level4_handler, },{IRQ_NUM_EXT_LEVEL5, parent_level5_handler, },+static struct irq_desc dsp_irq[MAX_CORE_COUNT][4] = {
{{IRQ_NUM_EXT_LEVEL2, irq_lvl2_level2_handler, },{IRQ_NUM_EXT_LEVEL3, irq_lvl2_level3_handler, },{IRQ_NUM_EXT_LEVEL4, irq_lvl2_level4_handler, },{IRQ_NUM_EXT_LEVEL5, irq_lvl2_level5_handler, } },{{IRQ_NUM_EXT_LEVEL2, irq_lvl2_level2_handler, },{IRQ_NUM_EXT_LEVEL3, irq_lvl2_level3_handler, },{IRQ_NUM_EXT_LEVEL4, irq_lvl2_level4_handler, },{IRQ_NUM_EXT_LEVEL5, irq_lvl2_level5_handler, } },{{IRQ_NUM_EXT_LEVEL2, irq_lvl2_level2_handler, },{IRQ_NUM_EXT_LEVEL3, irq_lvl2_level3_handler, },{IRQ_NUM_EXT_LEVEL4, irq_lvl2_level4_handler, },{IRQ_NUM_EXT_LEVEL5, irq_lvl2_level5_handler, } },{{IRQ_NUM_EXT_LEVEL2, irq_lvl2_level2_handler, },{IRQ_NUM_EXT_LEVEL3, irq_lvl2_level3_handler, },{IRQ_NUM_EXT_LEVEL4, irq_lvl2_level4_handler, },{IRQ_NUM_EXT_LEVEL5, irq_lvl2_level5_handler, } },};
Can we share this irq_desc array among 4 cores? They looks exactly same and are static.
This would be the next phase, where we de-duplicate and reuse the same code amongst APL & CNL. i.e. we may create a separate src/platform/intel directory for common code like this.
Liam