Lets keep all the DW-DMA register/bits in one place.
Signed-off-by: Liam Girdwood liam.r.girdwood@linux.intel.com --- src/drivers/dw-dma.c | 33 ++++++++++++++++++++++++++++ src/platform/baytrail/include/platform/dma.h | 26 ---------------------- 2 files changed, 33 insertions(+), 26 deletions(-)
diff --git a/src/drivers/dw-dma.c b/src/drivers/dw-dma.c index 5374f94..22e90b7 100644 --- a/src/drivers/dw-dma.c +++ b/src/drivers/dw-dma.c @@ -163,6 +163,39 @@ /* default initial setup register values */ #define DW_CFG_LOW_DEF 0x0 #define DW_CFG_HIGH_DEF 0x4 + +#elif defined (CONFIG_BAYTRAIL) || defined (CONFIG_CHERRYTRAIL) +/* baytrail specific registers */ + +/* CTL_LO */ +#define DW_CTLL_S_GATH_EN (1 << 17) +#define DW_CTLL_D_SCAT_EN (1 << 18) + +/* CTL_HI */ +#define DW_CTLH_DONE 0x00020000 +#define DW_CTLH_BLOCK_TS_MASK 0x0001ffff +#define DW_CTLH_CLASS(x) ((x) << 29) +#define DW_CTLH_WEIGHT(x) ((x) << 18) + +/* CFG_LO */ +#define DW_CFG_CH_DRAIN 0x400 + +/* CFG_HI */ +#define DW_CFGH_SRC_PER(x) ((x) << 0) +#define DW_CFGH_DST_PER(x) ((x) << 4) + +/* FIFO Partition */ +#define DW_FIFO_PARTITION +#define DW_FIFO_PART0_LO 0x0400 +#define DW_FIFO_PART0_HI 0x0404 +#define DW_FIFO_PART1_LO 0x0408 +#define DW_FIFO_PART1_HI 0x040C +#define DW_CH_SAI_ERR 0x0410 + +/* default initial setup register values */ +#define DW_CFG_LOW_DEF 0x00000003 +#define DW_CFG_HIGH_DEF 0x0 + #endif
/* tracing */ diff --git a/src/platform/baytrail/include/platform/dma.h b/src/platform/baytrail/include/platform/dma.h index 37ae067..eec501a 100644 --- a/src/platform/baytrail/include/platform/dma.h +++ b/src/platform/baytrail/include/platform/dma.h @@ -38,32 +38,6 @@ #define DMA_ID_DMAC1 1 #define DMA_ID_DMAC2 2
-/* baytrail specific registers */ -/* CTL_LO */ -#define DW_CTLL_S_GATH_EN (1 << 17) -#define DW_CTLL_D_SCAT_EN (1 << 18) -/* CTL_HI */ -#define DW_CTLH_DONE 0x00020000 -#define DW_CTLH_BLOCK_TS_MASK 0x0001ffff -#define DW_CTLH_CLASS(x) ((x) << 29) -#define DW_CTLH_WEIGHT(x) ((x) << 18) -/* CFG_LO */ -#define DW_CFG_CH_DRAIN 0x400 -/* CFG_HI */ -#define DW_CFGH_SRC_PER(x) ((x) << 0) -#define DW_CFGH_DST_PER(x) ((x) << 4) -/* FIFO Partition */ -#define DW_FIFO_PARTITION -#define DW_FIFO_PART0_LO 0x0400 -#define DW_FIFO_PART0_HI 0x0404 -#define DW_FIFO_PART1_LO 0x0408 -#define DW_FIFO_PART1_HI 0x040C -#define DW_CH_SAI_ERR 0x0410 - -/* default initial setup register values */ -#define DW_CFG_LOW_DEF 0x00000003 -#define DW_CFG_HIGH_DEF 0x0 - #define DMA_HANDSHAKE_SSP0_RX 0 #define DMA_HANDSHAKE_SSP0_TX 1 #define DMA_HANDSHAKE_SSP1_RX 2