From: Pan Xiuli xiuli.pan@linux.intel.com
SW_REG is in memory window and the cache is enabled, need to writeback the SW_REG.
Signed-off-by: Pan Xiuli xiuli.pan@linux.intel.com
--- V2: Add scope in macro
Test with: Mininow max rt5651 and UP2 nocodec and CNL nocodec SOF master: 85ae8e74181f3b4f8c6bb65b5d30b15eae189b0d SOF-Tool master: 13b56fa6047c566a8ba3edd0882ea786e595ee2a https://github.com/plbossart/sound/tree/topic/sof-v4.14: d09db67c5a9d6dfc85f700669fa2e43c678c8d51 --- src/include/sof/mailbox.h | 14 ++++++++++++++ src/platform/apollolake/include/platform/platform.h | 6 ++++-- src/platform/cannonlake/include/platform/platform.h | 6 ++++-- 3 files changed, 22 insertions(+), 4 deletions(-)
diff --git a/src/include/sof/mailbox.h b/src/include/sof/mailbox.h index 59259a0..17d9daa 100644 --- a/src/include/sof/mailbox.h +++ b/src/include/sof/mailbox.h @@ -26,6 +26,7 @@ * POSSIBILITY OF SUCH DAMAGE. * * Author: Liam Girdwood liam.r.girdwood@linux.intel.com + * Xiuli Pan xiuli.pan@linux.intel.com */
#ifndef __INCLUDE_MAILBOX__ @@ -36,6 +37,11 @@ #include <stdint.h> #include <sof/string.h>
+/* For those platform did not have SW_REG window, use DEBUG at now */ +#ifndef MAILBOX_SW_REG_BASE +#define MAILBOX_SW_REG_BASE MAILBOX_DEBUG_BASE +#endif /* MAILBOX_SW_REG_BASE */ + /* 4k should be enough for everyone ..... */ #define IPC_MAX_MAILBOX_BYTES 0x1000
@@ -100,4 +106,12 @@ void mailbox_stream_write(size_t offset, const void *src, size_t bytes) bytes); }
+static inline +void mailbox_sw_reg_write(size_t offset, uint32_t src) +{ + *((volatile uint32_t*)(MAILBOX_SW_REG_BASE + offset)) = src; + dcache_writeback_region((void *)(MAILBOX_SW_REG_BASE + offset), + sizeof(src)); +} + #endif diff --git a/src/platform/apollolake/include/platform/platform.h b/src/platform/apollolake/include/platform/platform.h index 8503ce2..5672183 100644 --- a/src/platform/apollolake/include/platform/platform.h +++ b/src/platform/apollolake/include/platform/platform.h @@ -27,6 +27,7 @@ * * Author: Liam Girdwood liam.r.girdwood@linux.intel.com * Keyon Jie yang.jie@linux.intel.com + * Xiuli Pan xiuli.pan@linux.intel.com */
#ifndef __PLATFORM_PLATFORM_H__ @@ -117,13 +118,14 @@ struct sof;
/* Platform defined panic code */ #define platform_panic(__x) { \ - sw_reg_write(SRAM_REG_FW_STATUS, (0xdead000 | __x) & 0x3fffffff); \ + mailbox_sw_reg_write(SRAM_REG_FW_STATUS, \ + (0xdead000 | (__x)) & 0x3fffffff); \ ipc_write(IPC_DIPCI, 0x80000000 | ((0xdead000 | __x) & 0x3fffffff)); \ }
/* Platform defined trace code */ #define platform_trace_point(__x) \ - sw_reg_write(SRAM_REG_FW_TRACEP, __x) + mailbox_sw_reg_write(SRAM_REG_FW_TRACEP, (__x))
extern struct timer *platform_timer;
diff --git a/src/platform/cannonlake/include/platform/platform.h b/src/platform/cannonlake/include/platform/platform.h index c5bf42a..66e6375 100644 --- a/src/platform/cannonlake/include/platform/platform.h +++ b/src/platform/cannonlake/include/platform/platform.h @@ -28,6 +28,7 @@ * Author: Liam Girdwood liam.r.girdwood@linux.intel.com * Keyon Jie yang.jie@linux.intel.com * Rander Wang rander.wang@intel.com + * Xiuli Pan xiuli.pan@linux.intel.com */
#ifndef __PLATFORM_PLATFORM_H__ @@ -112,13 +113,14 @@ struct sof;
/* Platform defined trace code */ #define platform_panic(__x) { \ - sw_reg_write(SRAM_REG_FW_STATUS, (0xdead000 | __x) & 0x3fffffff); \ + mailbox_sw_reg_write(SRAM_REG_FW_STATUS, \ + (0xdead000 | (__x)) & 0x3fffffff); \ ipc_write(IPC_DIPCIDR, 0x80000000 | ((0xdead000 | __x) & 0x3fffffff)); \ }
/* Platform defined trace code */ #define platform_trace_point(__x) \ - sw_reg_write(SRAM_REG_FW_TRACEP, __x) + mailbox_sw_reg_write(SRAM_REG_FW_TRACEP, (__x))
extern struct timer *platform_timer;