Move the register macros into separate header.
Signed-off-by: Liam Girdwood liam.r.girdwood@linux.intel.com --- src/drivers/ssp.c | 113 ---------------------------------------------- src/include/reef/ssp.h | 118 +++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 118 insertions(+), 113 deletions(-)
diff --git a/src/drivers/ssp.c b/src/drivers/ssp.c index 6ef5e26..4f375e5 100644 --- a/src/drivers/ssp.c +++ b/src/drivers/ssp.c @@ -30,129 +30,16 @@ */
#include <errno.h> -#include <reef/dai.h> -#include <reef/io.h> #include <reef/stream.h> #include <reef/ssp.h> #include <reef/alloc.h> #include <reef/interrupt.h> -#include <reef/lock.h> -#include <reef/work.h> -#include <reef/trace.h> -#include <reef/wait.h> - -/* SSCR0 bits */ -#define SSCR0_DSS_MASK (0x0000000f) -#define SSCR0_DSIZE(x) ((x) - 1) -#define SSCR0_FRF (0x00000030) -#define SSCR0_MOT (00 << 4) -#define SSCR0_TI (1 << 4) -#define SSCR0_NAT (2 << 4) -#define SSCR0_PSP (3 << 4) -#define SSCR0_ECS (1 << 6) -#define SSCR0_SSE (1 << 7) -#define SSCR0_SCR(x) ((x) << 8) -#define SSCR0_EDSS (1 << 20) -#define SSCR0_NCS (1 << 21) -#define SSCR0_RIM (1 << 22) -#define SSCR0_TUM (1 << 23) -#define SSCR0_FRDC (0x07000000) -#define SSCR0_ACS (1 << 30) -#define SSCR0_MOD (1 << 31) - -/* SSCR1 bits */ -#define SSCR1_RIE (1 << 0) -#define SSCR1_TIE (1 << 1) -#define SSCR1_LBM (1 << 2) -#define SSCR1_SPO (1 << 3) -#define SSCR1_SPH (1 << 4) -#define SSCR1_MWDS (1 << 5) -#define SSCR1_TFT_MASK (0x000003c0) -#define SSCR1_TX(x) (((x) - 1) << 6) -#define SSCR1_RFT_MASK (0x00003c00) -#define SSCR1_RX(x) (((x) - 1) << 10) -#define SSCR1_EFWR (1 << 14) -#define SSCR1_STRF (1 << 15) -#define SSCR1_IFS (1 << 16) -#define SSCR1_PINTE (1 << 18) -#define SSCR1_TINTE (1 << 19) -#define SSCR1_RSRE (1 << 20) -#define SSCR1_TSRE (1 << 21) -#define SSCR1_TRAIL (1 << 22) -#define SSCR1_RWOT (1 << 23) -#define SSCR1_SFRMDIR (1 << 24) -#define SSCR1_SCLKDIR (1 << 25) -#define SSCR1_ECRB (1 << 26) -#define SSCR1_ECRA (1 << 27) -#define SSCR1_SCFR (1 << 28) -#define SSCR1_EBCEI (1 << 29) -#define SSCR1_TTE (1 << 30) -#define SSCR1_TTELP (1 << 31) - -/* SSR bits */ -#define SSSR_TNF (1 << 2) -#define SSSR_RNE (1 << 3) -#define SSSR_BSY (1 << 4) -#define SSSR_TFS (1 << 5) -#define SSSR_RFS (1 << 6) -#define SSSR_ROR (1 << 7) - -/* SSPSP bits */ -#define SSPSP_SCMODE(x) ((x) << 0) -#define SSPSP_SFRMP (1 << 2) -#define SSPSP_ETDS (1 << 3) -#define SSPSP_STRTDLY(x) ((x) << 4) -#define SSPSP_DMYSTRT(x) ((x) << 7) -#define SSPSP_SFRMDLY(x) ((x) << 9) -#define SSPSP_SFRMWDTH(x) ((x) << 16) -#define SSPSP_DMYSTOP(x) ((x) << 23) -#define SSPSP_FSRT (1 << 25) - -/* SFIFOTT bits */ -#define SFIFOTT_TX(x) (x - 1) -#define SFIFOTT_RX(x) ((x - 1) << 16) - -/* SSP port status */ -#define SSP_STATE_INIT 0 -#define SSP_STATE_IDLE 1 -#define SSP_STATE_RUNNING 2 -#define SSP_STATE_DRAINING 3 -#define SSP_STATE_PAUSING 4 -#define SSP_STATE_PAUSED 5
/* tracing */ #define trace_ssp(__e) trace_event(TRACE_CLASS_SSP, __e) #define trace_ssp_error(__e) trace_error(TRACE_CLASS_SSP, __e) #define tracev_ssp(__e) tracev_event(TRACE_CLASS_SSP, __e)
-/* SSP private data */ -struct ssp_pdata { - uint32_t sscr0; - uint32_t sscr1; - uint32_t psp; - struct work work; - spinlock_t lock; - uint32_t state[2]; /* SSP_STATE_ for each direction */ - completion_t drain_complete; - -}; - -static inline void ssp_write(struct dai *dai, uint32_t reg, uint32_t value) -{ - io_reg_write(dai_base(dai) + reg, value); -} - -static inline uint32_t ssp_read(struct dai *dai, uint32_t reg) -{ - return io_reg_read(dai_base(dai) + reg); -} - -static inline void ssp_update_bits(struct dai *dai, uint32_t reg, uint32_t mask, - uint32_t value) -{ - io_reg_update_bits(dai_base(dai) + reg, mask, value); -} - /* save SSP context prior to entering D3 */ static int ssp_context_store(struct dai *dai) { diff --git a/src/include/reef/ssp.h b/src/include/reef/ssp.h index 16acf04..b1f370b 100644 --- a/src/include/reef/ssp.h +++ b/src/include/reef/ssp.h @@ -32,6 +32,11 @@ #define __INCLUDE_SSP__
#include <reef/dai.h> +#include <reef/io.h> +#include <reef/lock.h> +#include <reef/work.h> +#include <reef/trace.h> +#include <reef/wait.h>
#define SSP_CLK_AUDIO 0 #define SSP_CLK_NET_PLL 1 @@ -54,4 +59,117 @@
extern const struct dai_ops ssp_ops;
+/* SSCR0 bits */ +#define SSCR0_DSS_MASK (0x0000000f) +#define SSCR0_DSIZE(x) ((x) - 1) +#define SSCR0_FRF (0x00000030) +#define SSCR0_MOT (00 << 4) +#define SSCR0_TI (1 << 4) +#define SSCR0_NAT (2 << 4) +#define SSCR0_PSP (3 << 4) +#define SSCR0_ECS (1 << 6) +#define SSCR0_SSE (1 << 7) +#define SSCR0_SCR_MASK (0x000fff00) +#define SSCR0_SCR(x) ((x) << 8) +#define SSCR0_EDSS (1 << 20) +#define SSCR0_NCS (1 << 21) +#define SSCR0_RIM (1 << 22) +#define SSCR0_TUM (1 << 23) +#define SSCR0_FRDC (0x07000000) +#define SSCR0_ACS (1 << 30) +#define SSCR0_MOD (1 << 31) + +/* SSCR1 bits */ +#define SSCR1_RIE (1 << 0) +#define SSCR1_TIE (1 << 1) +#define SSCR1_LBM (1 << 2) +#define SSCR1_SPO (1 << 3) +#define SSCR1_SPH (1 << 4) +#define SSCR1_MWDS (1 << 5) +#define SSCR1_TFT_MASK (0x000003c0) +#define SSCR1_TX(x) (((x) - 1) << 6) +#define SSCR1_RFT_MASK (0x00003c00) +#define SSCR1_RX(x) (((x) - 1) << 10) +#define SSCR1_EFWR (1 << 14) +#define SSCR1_STRF (1 << 15) +#define SSCR1_IFS (1 << 16) +#define SSCR1_PINTE (1 << 18) +#define SSCR1_TINTE (1 << 19) +#define SSCR1_RSRE (1 << 20) +#define SSCR1_TSRE (1 << 21) +#define SSCR1_TRAIL (1 << 22) +#define SSCR1_RWOT (1 << 23) +#define SSCR1_SFRMDIR (1 << 24) +#define SSCR1_SCLKDIR (1 << 25) +#define SSCR1_ECRB (1 << 26) +#define SSCR1_ECRA (1 << 27) +#define SSCR1_SCFR (1 << 28) +#define SSCR1_EBCEI (1 << 29) +#define SSCR1_TTE (1 << 30) +#define SSCR1_TTELP (1 << 31) + +/* SSR bits */ +#define SSSR_TNF (1 << 2) +#define SSSR_RNE (1 << 3) +#define SSSR_BSY (1 << 4) +#define SSSR_TFS (1 << 5) +#define SSSR_RFS (1 << 6) +#define SSSR_ROR (1 << 7) + +/* SSPSP bits */ +#define SSPSP_SCMODE(x) ((x) << 0) +#define SSPSP_SFRMP (1 << 2) +#define SSPSP_ETDS (1 << 3) +#define SSPSP_STRTDLY(x) ((x) << 4) +#define SSPSP_DMYSTRT(x) ((x) << 7) +#define SSPSP_SFRMDLY(x) ((x) << 9) +#define SSPSP_SFRMWDTH(x) ((x) << 16) +#define SSPSP_DMYSTOP(x) ((x) << 23) +#define SSPSP_FSRT (1 << 25) + +/* SFIFOTT bits */ +#define SFIFOTT_TX(x) (x - 1) +#define SFIFOTT_RX(x) ((x - 1) << 16) + +/* SSP port status */ +#define SSP_STATE_INIT 0 +#define SSP_STATE_RUNNING 1 +#define SSP_STATE_IDLE 2 +#define SSP_STATE_DRAINING 3 +#define SSP_STATE_PAUSING 4 +#define SSP_STATE_PAUSED 5 + +/* tracing */ +#define trace_ssp(__e) trace_event(TRACE_CLASS_SSP, __e) +#define trace_ssp_error(__e) trace_error(TRACE_CLASS_SSP, __e) +#define tracev_ssp(__e) tracev_event(TRACE_CLASS_SSP, __e) + +/* SSP private data */ +struct ssp_pdata { + uint32_t sscr0; + uint32_t sscr1; + uint32_t psp; + struct work work; + spinlock_t lock; + uint32_t state[2]; /* SSP_STATE_ for each direction */ + completion_t drain_complete; +}; + +static inline void ssp_write(struct dai *dai, uint32_t reg, uint32_t value) +{ + io_reg_write(dai_base(dai) + reg, value); +} + +static inline uint32_t ssp_read(struct dai *dai, uint32_t reg) +{ + return io_reg_read(dai_base(dai) + reg); +} + +static inline void ssp_update_bits(struct dai *dai, uint32_t reg, uint32_t mask, + uint32_t value) +{ + io_reg_update_bits(dai_base(dai) + reg, mask, value); +} + + #endif