March 2018 - Sound-open-firmware - mailman.alsa-project.org

[Sound-open-firmware] [PATCH] Add chan_size setting for host/link DMA IN/OUT on CNL.
by yan.wang＠linux.intel.com 22 Mar '18

22 Mar '18

From: Yan Wang <yan.wang(a)linux.intel.com> "chan_size" is used for calculation of DMA register offset. It must be set otherwise only the first channel is available. Signed-off-by: Yan Wang <yan.wang(a)linux.intel.com> --- src/platform/cannonlake/dma.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/platform/cannonlake/dma.c b/src/platform/cannonlake/dma.c index 59e0fc7..b77f1d2 100644 --- a/src/platform/cannonlake/dma.c +++ b/src/platform/cannonlake/dma.c @@ -136,6 +136,7 @@ static struct dma dma[] = { .base = GTW_HOST_IN_STREAM_BASE(0), .channels = 7, .irq = IRQ_EXT_HOST_DMA_IN_LVL3(0, 0), + .chan_size = GTW_HOST_IN_STREAM_SIZE, }, .ops = &hda_host_dma_ops, }, @@ -145,6 +146,7 @@ static struct dma dma[] = { .base = GTW_HOST_OUT_STREAM_BASE(0), .channels = 9, .irq = IRQ_EXT_HOST_DMA_OUT_LVL3(0, 0), + .chan_size = GTW_HOST_OUT_STREAM_SIZE, }, .ops = &hda_host_dma_ops, }, @@ -154,6 +156,7 @@ static struct dma dma[] = { .base = GTW_LINK_IN_STREAM_BASE(0), .channels = 9, .irq = IRQ_EXT_LINK_DMA_IN_LVL4(0, 0), + .chan_size = GTW_LINK_IN_STREAM_SIZE, }, .ops = &hda_link_dma_ops, }, @@ -163,6 +166,7 @@ static struct dma dma[] = { .base = GTW_LINK_OUT_STREAM_BASE(0), .channels = 7, .irq = IRQ_EXT_LINK_DMA_OUT_LVL4(0, 0), + .chan_size = GTW_LINK_OUT_STREAM_SIZE, }, .ops = &hda_link_dma_ops, },}; -- 2.14.3

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[Sound-open-firmware] [PATCH v3] topology: apl-tdf8532: create m4 file for gpmrb platform
by Wu Zhigang 21 Mar '18

21 Mar '18

Here add topology file for apollolake GP-MRB platform, it is initial version, we only support one playback and one capture PCM pipeline at the moment, with SSP/DAI set to tdm8-32le-48kHz (active on first 4 slots for both transmit and receive). Signed-off-by: Wu Zhigang <zhigang.wu(a)linux.intel.com> Reviewed-by: Keyon Jie <yang.jie(a)linux.intel.com> --- v3: change tplg file to support output 4-slot. v2: update the topology based on latest version. v1: create the m4 file for gpmrb platform. --- Tested with apl-gpmrb board kernel: https://github.com/plbossart/sound.git branch: topic/sof-v4.14 4881a4bd906f8b52bebd209b88ff920005550d53 firmware: git://git.alsa-project.org/sound-open-firmware.git branch: 1.1-stable ffd9093267aa8d3deeffeb09b73c8b0789ad4071 tools: branch: 1.1-stable cc91c73aa3e91eea35abdeb76d578b97f718feff --- topology/Makefile.am | 6 ++-- topology/reef-apl-tdf8532.m4 | 71 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 75 insertions(+), 2 deletions(-) create mode 100644 topology/reef-apl-tdf8532.m4 diff --git a/topology/Makefile.am b/topology/Makefile.am index f161ba2..a7e86fd 100644 --- a/topology/Makefile.am +++ b/topology/Makefile.am @@ -28,7 +28,8 @@ MACHINES = \ reef-byt-rt5651.tplg \ reef-byt-da7213.tplg \ reef-cnl-rt274.tplg \ - reef-hsw-rt5640.tplg + reef-hsw-rt5640.tplg \ + reef-apl-tdf8532.tplg # Uncomment the following line if you want to debug conf files .PRECIOUS: %.conf @@ -58,4 +59,5 @@ EXTRA_DIST = \ reef-byt-rt5651.m4 \ reef-byt-da7213.m4 \ reef-cnl-rt274.m4 \ - reef-hsw-rt5640.m4 + reef-hsw-rt5640.m4 \ + reef-apl-tdf8532.m4 diff --git a/topology/reef-apl-tdf8532.m4 b/topology/reef-apl-tdf8532.m4 new file mode 100644 index 0000000..eaddac9 --- /dev/null +++ b/topology/reef-apl-tdf8532.m4 @@ -0,0 +1,71 @@ +# +# Topology for generic Apollolake board with TDF8532 +# + +# Include topology builder +include(`utils.m4') +include(`dai.m4') +include(`pipeline.m4') + +# Include TLV library +include(`common/tlv.m4') + +# Include Token library +include(`sof/tokens.m4') + +# Include Apollolake DSP configuration +include(`dsps/bxt.m4') + +# +# Define the pipelines +# +# PCM0 ----> volume -----> SSP4 +# +# PCM1 <---- Volume <----- SSP4 +# + +# Low Latency playback pipeline 1 on PCM 0 using max 4 channels of s32le. +# Schedule 48 frames per 1000us deadline on core 0 with priority 0 +# Use DMAC 0 channel 1 for PCM audio playback data +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-playback.m4, + 1, 0, 4, s32le, + 48, 1000, 0, 0, 0, 1, SSP, 4, s32le, 2) + +# Low Latency capture pipeline 2 on PCM 0 using max 4 channels of s32le. +# Schedule 48 frames per 1000us deadline on core 0 with priority 0 +# Use DMAC 0 channel 2 for PCM audio capture data +PIPELINE_PCM_DAI_ADD(sof/pipe-volume-capture.m4, + 2, 0, 4, s32le, + 48, 1000, 0, 0, 0, 1, SSP, 4, s32le, 2) + +# +# DAI configuration +# +# SSP port 4 is our only pipeline DAI +# + +# playback DAI is SSP4 using 2 periods +# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 +DAI_ADD(sof/pipe-dai-playback.m4, + 1, SSP, 4, SSP4-Codec, + PIPELINE_SOURCE_1, 2, s32le, + 48, 1000, 0, 0) + +# capture DAI is SSP4 using 2 periods +# Buffers use s32le format, with 48 frame per 1000us on core 0 with priority 0 +DAI_ADD(sof/pipe-dai-capture.m4, + 2, SSP, 4, SSP4-Codec, + PIPELINE_SINK_2, 2, s32le, + 48, 1000, 0, 0) + +# PCM Low Latency +PCM_DUPLEX_ADD(Passthrough, 3, 0, 0, PIPELINE_PCM_1, PIPELINE_PCM_2) + +# +# BE configurations - overrides config in ACPI if present +# +DAI_CONFIG(SSP, 4, SSP4-Codec, DSP_B, 32, + DAI_CLOCK(mclk, 24576000, slave), + DAI_CLOCK(bclk, 12288000, slave), + DAI_CLOCK(fsync, 48000, slave), + DAI_TDM(8, 32, 15, 15)) -- 2.11.0

2 1

[Sound-open-firmware] [PATCH] cnl: core: Enable L1 cache for DSP
by Liam Girdwood 21 Mar '18

21 Mar '18

From: Tomasz Lauda <tomasz.lauda(a)linux.intel.com> This time really enable L1 cache as we missed one more setting in boot_ldr. Signed-off-by: Tomasz Lauda <tomasz.lauda(a)linux.intel.com> --- src/platform/cannonlake/boot_ldr.x.in | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/platform/cannonlake/boot_ldr.x.in b/src/platform/cannonlake/boot_ldr.x.in index cc7a2dca..a42fd897 100644 --- a/src/platform/cannonlake/boot_ldr.x.in +++ b/src/platform/cannonlake/boot_ldr.x.in @@ -375,7 +375,7 @@ SECTIONS PROVIDE(_memmap_vecbase_reset = HP_SRAM_VECBASE_RESET); - _memmap_cacheattr_wbna_trapnull = 0x25222222; + _memmap_cacheattr_wbna_trapnull = 0xFF42FFF2; PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wbna_trapnull); .debug 0 : { *(.debug) } -- 2.14.1

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[Sound-open-firmware] [PATCH] mailbox: fix mailbox mappings to include exception space.
by Xiuli Pan 21 Mar '18

21 Mar '18

From: Pan Xiuli <xiuli.pan(a)linux.intel.com> Fix mailbox mapping on BYT, HSW, APL and CNL. Signed-off-by: Liam Girdwood <liam.r.girdwood(a)linux.intel.com> Signed-off-by: Pan Xiuli <xiuli.pan(a)linux.intel.com> --- This patch need to used with patch set: ASoC: SOF: export snd_sof_trace_notify_for_error ASoC: SOF: Add SOF_IPC_REGION_EXCEPTION ASoC: SOF: add dsp_oops_offset for DSP panic ASoC: SOF: Add exception memory window support for BYT ASoC: SOF: Add exception memory window support for HSW ASoC: SOF: Add exception memory window support for BDW ASoC: SOF: Add exception memory window support for APL and CNL Test with: Mininow max rt5651 and GP-MRB nocodec and CNL nocodec SOF 1.1-stable: ffd9093267aa8d3deeffeb09b73c8b0789ad4071 SOF-Tool 1.1-stable: cc91c73aa3e91eea35abdeb76d578b97f718feff https://github.com/plbossart/sound/tree/topic/sof-v4.14: 4881a4bd906f8b52bebd209b88ff920005550d53 --- src/include/uapi/ipc.h | 1 + src/platform/apollolake/include/platform/mailbox.h | 12 ++++++------ src/platform/apollolake/include/platform/memory.h | 13 ++++++++++--- src/platform/apollolake/include/platform/platform.h | 6 ++++-- src/platform/apollolake/platform.c | 13 ++++++++++--- src/platform/baytrail/include/platform/platform.h | 5 +++-- src/platform/baytrail/platform.c | 9 ++++++++- src/platform/cannonlake/include/platform/mailbox.h | 12 ++++++------ src/platform/cannonlake/include/platform/memory.h | 12 +++++++++--- src/platform/cannonlake/include/platform/platform.h | 6 ++++-- src/platform/cannonlake/platform.c | 13 ++++++++++--- src/platform/haswell/include/platform/platform.h | 2 +- src/platform/haswell/platform.c | 9 ++++++++- 13 files changed, 80 insertions(+), 33 deletions(-) diff --git a/src/include/uapi/ipc.h b/src/include/uapi/ipc.h index e44a13f..5ec9ec3 100644 --- a/src/include/uapi/ipc.h +++ b/src/include/uapi/ipc.h @@ -795,6 +795,7 @@ enum sof_ipc_region { SOF_IPC_REGION_DEBUG, SOF_IPC_REGION_STREAM, SOF_IPC_REGION_REGS, + SOF_IPC_REGION_EXCEPTION, }; struct sof_ipc_ext_data_hdr { diff --git a/src/platform/apollolake/include/platform/mailbox.h b/src/platform/apollolake/include/platform/mailbox.h index e04bdb5..92bd089 100644 --- a/src/platform/apollolake/include/platform/mailbox.h +++ b/src/platform/apollolake/include/platform/mailbox.h @@ -56,17 +56,17 @@ #define MAILBOX_TRACE_SIZE SRAM_TRACE_SIZE #define MAILBOX_TRACE_BASE SRAM_TRACE_BASE -/* window 2 debug and exception */ -#define MAILBOX_DEBUG_SIZE (SRAM_DEBUG_SIZE - MAILBOX_EXCEPTION_SIZE) +/* window 2 debug, exception and stream */ +#define MAILBOX_DEBUG_SIZE SRAM_DEBUG_SIZE #define MAILBOX_DEBUG_BASE SRAM_DEBUG_BASE -#define MAILBOX_EXCEPTION_SIZE 0x100 -#define MAILBOX_EXCEPTION_BASE \ - (MAILBOX_SW_REG_BASE + SRAM_REG_FW_END) +#define MAILBOX_EXCEPTION_SIZE SRAM_EXCEPT_SIZE +#define MAILBOX_EXCEPTION_BASE SRAM_EXCEPT_BASE +#define MAILBOX_EXCEPTION_OFFSET SRAM_DEBUG_SIZE #define MAILBOX_STREAM_SIZE SRAM_STREAM_SIZE #define MAILBOX_STREAM_BASE SRAM_STREAM_BASE -#define MAILBOX_STREAM_OFFSET SRAM_DEBUG_SIZE +#define MAILBOX_STREAM_OFFSET (SRAM_DEBUG_SIZE + SRAM_EXCEPT_SIZE) /* window 1 inbox/downlink and FW registers */ #define MAILBOX_HOSTBOX_SIZE SRAM_INBOX_SIZE diff --git a/src/platform/apollolake/include/platform/memory.h b/src/platform/apollolake/include/platform/memory.h index a0dab04..ca3f15d 100644 --- a/src/platform/apollolake/include/platform/memory.h +++ b/src/platform/apollolake/include/platform/memory.h @@ -214,6 +214,8 @@ * +---------------------+----------------+-----------------------------------+ * | SRAM_DEBUG_BASE | Debug data W2 | SRAM_DEBUG_SIZE | * +---------------------+----------------+-----------------------------------+ + * | SRAM_EXCEPT_BASE | Debug data W2 | SRAM_EXCEPT_SIZE | + * +---------------------+----------------+-----------------------------------+ * | SRAM_STREAM_BASE | Stream data W2 | SRAM_STREAM_SIZE | * +---------------------+----------------+-----------------------------------+ * | SRAM_INBOX_BASE | Inbox W1 | SRAM_INBOX_SIZE | @@ -236,9 +238,12 @@ /* window 2 */ #define SRAM_DEBUG_BASE (SRAM_TRACE_BASE + SRAM_TRACE_SIZE) -#define SRAM_DEBUG_SIZE 0x1000 +#define SRAM_DEBUG_SIZE 0x800 + +#define SRAM_EXCEPT_BASE (SRAM_DEBUG_BASE + SRAM_DEBUG_SIZE) +#define SRAM_EXCEPT_SIZE 0x800 -#define SRAM_STREAM_BASE (SRAM_DEBUG_BASE + SRAM_DEBUG_SIZE) +#define SRAM_STREAM_BASE (SRAM_EXCEPT_BASE + SRAM_EXCEPT_SIZE) #define SRAM_STREAM_SIZE 0x1000 /* window 1 */ @@ -263,7 +268,8 @@ #define HP_SRAM_WIN1_BASE SRAM_INBOX_BASE #define HP_SRAM_WIN1_SIZE SRAM_INBOX_SIZE #define HP_SRAM_WIN2_BASE SRAM_DEBUG_BASE -#define HP_SRAM_WIN2_SIZE (SRAM_DEBUG_SIZE + SRAM_STREAM_SIZE) +#define HP_SRAM_WIN2_SIZE (SRAM_DEBUG_SIZE + SRAM_EXCEPT_SIZE + \ + SRAM_STREAM_SIZE) #define HP_SRAM_WIN3_BASE SRAM_TRACE_BASE #define HP_SRAM_WIN3_SIZE SRAM_TRACE_SIZE @@ -273,6 +279,7 @@ (HP_SRAM_SIZE - \ SRAM_TRACE_SIZE - \ SRAM_DEBUG_SIZE - \ + SRAM_EXCEPT_SIZE - \ SRAM_STREAM_SIZE - \ SRAM_INBOX_SIZE - \ SRAM_OUTBOX_SIZE - \ diff --git a/src/platform/apollolake/include/platform/platform.h b/src/platform/apollolake/include/platform/platform.h index 273bb98..a1dfba2 100644 --- a/src/platform/apollolake/include/platform/platform.h +++ b/src/platform/apollolake/include/platform/platform.h @@ -113,8 +113,10 @@ struct reef; #define PLATFORM_NUM_SSP 6 /* Platform defined panic code */ -#define platform_panic(__x) \ - sw_reg_write(SRAM_REG_FW_STATUS, (0xdead000 | __x) & 0x3fffffff) +#define platform_panic(__x) { \ + sw_reg_write(SRAM_REG_FW_STATUS, (0xdead000 | __x) & 0x3fffffff); \ + ipc_write(IPC_DIPCI, 0x80000000 | ((0xdead000 | __x) & 0x3fffffff)); \ +} /* Platform defined trace code */ #define platform_trace_point(__x) \ diff --git a/src/platform/apollolake/platform.c b/src/platform/apollolake/platform.c index 84f8e71..2b41028 100644 --- a/src/platform/apollolake/platform.c +++ b/src/platform/apollolake/platform.c @@ -68,7 +68,7 @@ static const struct sof_ipc_fw_ready ready = { #define SRAM_WINDOW_HOST_OFFSET(x) (0x80000 + x * 0x20000) -#define NUM_APL_WINDOWS 6 +#define NUM_APL_WINDOWS 7 static const struct sof_ipc_window sram_window = { .ext_hdr = { @@ -103,17 +103,24 @@ static const struct sof_ipc_window sram_window = { .type = SOF_IPC_REGION_DEBUG, .id = 2, /* map to host window 2 */ .flags = 0, // TODO: set later - .size = MAILBOX_EXCEPTION_SIZE + MAILBOX_DEBUG_SIZE, + .size = MAILBOX_DEBUG_SIZE, .offset = 0, }, .window[4] = { + .type = SOF_IPC_REGION_EXCEPTION, + .id = 2, /* map to host window 2 */ + .flags = 0, // TODO: set later + .size = MAILBOX_EXCEPTION_SIZE, + .offset = MAILBOX_EXCEPTION_OFFSET, + }, + .window[5] = { .type = SOF_IPC_REGION_STREAM, .id = 2, /* map to host window 2 */ .flags = 0, // TODO: set later .size = MAILBOX_STREAM_SIZE, .offset = MAILBOX_STREAM_OFFSET, }, - .window[5] = { + .window[6] = { .type = SOF_IPC_REGION_TRACE, .id = 3, /* map to host window 3 */ .flags = 0, // TODO: set later diff --git a/src/platform/baytrail/include/platform/platform.h b/src/platform/baytrail/include/platform/platform.h index 036f549..9a6967b 100644 --- a/src/platform/baytrail/include/platform/platform.h +++ b/src/platform/baytrail/include/platform/platform.h @@ -98,9 +98,10 @@ struct reef; #define PLATFORM_IDLE_TIME 750000 /* Platform defined panic code */ -#define platform_panic(__x) \ +#define platform_panic(__x) { \ shim_write(SHIM_IPCDL, (0xdead000 | (__x & 0xfff))); \ - shim_write(SHIM_IPCDH, SHIM_IPCDH_BUSY); + shim_write(SHIM_IPCDH, SHIM_IPCDH_BUSY); \ +} /* Platform defined trace code */ #define platform_trace_point(__x) \ diff --git a/src/platform/baytrail/platform.c b/src/platform/baytrail/platform.c index cec8297..8fa03a7 100644 --- a/src/platform/baytrail/platform.c +++ b/src/platform/baytrail/platform.c @@ -70,7 +70,7 @@ static const struct sof_ipc_fw_ready ready = { /* TODO: add capabilities */ }; -#define NUM_BYT_WINDOWS 5 +#define NUM_BYT_WINDOWS 6 static const struct sof_ipc_window sram_window = { .ext_hdr = { .hdr.cmd = SOF_IPC_FW_READY, @@ -114,6 +114,13 @@ static const struct sof_ipc_window sram_window = { .size = MAILBOX_STREAM_SIZE, .offset = MAILBOX_STREAM_OFFSET, }, + .window[5] = { + .type = SOF_IPC_REGION_EXCEPTION, + .id = 0, /* map to host window 0 */ + .flags = 0, // TODO: set later + .size = MAILBOX_EXCEPTION_SIZE, + .offset = MAILBOX_EXCEPTION_OFFSET, + }, }; static struct work_queue_timesource platform_generic_queue = { diff --git a/src/platform/cannonlake/include/platform/mailbox.h b/src/platform/cannonlake/include/platform/mailbox.h index c58e310..2b68bcb 100644 --- a/src/platform/cannonlake/include/platform/mailbox.h +++ b/src/platform/cannonlake/include/platform/mailbox.h @@ -57,17 +57,17 @@ #define MAILBOX_TRACE_SIZE SRAM_TRACE_SIZE #define MAILBOX_TRACE_BASE SRAM_TRACE_BASE -/* window 2 debug and exception */ -#define MAILBOX_DEBUG_SIZE (SRAM_DEBUG_SIZE - MAILBOX_EXCEPTION_SIZE) +/* window 2 debug, exception and stream */ +#define MAILBOX_DEBUG_SIZE SRAM_DEBUG_SIZE #define MAILBOX_DEBUG_BASE SRAM_DEBUG_BASE -#define MAILBOX_EXCEPTION_SIZE 0x100 -#define MAILBOX_EXCEPTION_BASE \ - (MAILBOX_SW_REG_BASE + SRAM_REG_FW_END) +#define MAILBOX_EXCEPTION_SIZE SRAM_EXCEPT_SIZE +#define MAILBOX_EXCEPTION_BASE SRAM_EXCEPT_BASE +#define MAILBOX_EXCEPTION_OFFSET SRAM_DEBUG_SIZE #define MAILBOX_STREAM_SIZE SRAM_STREAM_SIZE #define MAILBOX_STREAM_BASE SRAM_STREAM_BASE -#define MAILBOX_STREAM_OFFSET SRAM_DEBUG_SIZE +#define MAILBOX_STREAM_OFFSET (SRAM_DEBUG_SIZE + SRAM_EXCEPT_SIZE) /* window 1 inbox/downlink and FW registers */ #define MAILBOX_HOSTBOX_SIZE SRAM_INBOX_SIZE diff --git a/src/platform/cannonlake/include/platform/memory.h b/src/platform/cannonlake/include/platform/memory.h index fba0471..64c4bbc 100644 --- a/src/platform/cannonlake/include/platform/memory.h +++ b/src/platform/cannonlake/include/platform/memory.h @@ -146,6 +146,8 @@ * +---------------------+----------------+-----------------------------------+ * | SRAM_DEBUG_BASE | Debug data W2 | SRAM_DEBUG_SIZE | * +---------------------+----------------+-----------------------------------+ + * | SRAM_EXCEPT_BASE | Debug data W2 | SRAM_EXCEPT_SIZE | + * +---------------------+----------------+-----------------------------------+ * | SRAM_STREAM_BASE | Stream data W2 | SRAM_STREAM_SIZE | * +---------------------+----------------+-----------------------------------+ * | SRAM_TRACE_BASE | Trace Buffer W3| SRAM_TRACE_SIZE | @@ -206,9 +208,12 @@ /* window 2 */ #define SRAM_DEBUG_BASE (SRAM_INBOX_BASE + SRAM_INBOX_SIZE) -#define SRAM_DEBUG_SIZE 0x1000 +#define SRAM_DEBUG_SIZE 0x800 + +#define SRAM_EXCEPT_BASE (SRAM_DEBUG_BASE + SRAM_DEBUG_SIZE) +#define SRAM_EXCEPT_SIZE 0x800 -#define SRAM_STREAM_BASE (SRAM_DEBUG_BASE + SRAM_DEBUG_SIZE) +#define SRAM_STREAM_BASE (SRAM_EXCEPT_BASE + SRAM_EXCEPT_SIZE) #define SRAM_STREAM_SIZE 0x1000 /* window 3 */ @@ -220,7 +225,8 @@ #define HP_SRAM_WIN1_BASE SRAM_INBOX_BASE #define HP_SRAM_WIN1_SIZE SRAM_INBOX_SIZE #define HP_SRAM_WIN2_BASE SRAM_DEBUG_BASE -#define HP_SRAM_WIN2_SIZE (SRAM_DEBUG_SIZE + SRAM_STREAM_SIZE) +#define HP_SRAM_WIN2_SIZE (SRAM_DEBUG_SIZE + SRAM_EXCEPT_SIZE + \ + SRAM_STREAM_SIZE) #define HP_SRAM_WIN3_BASE SRAM_TRACE_BASE #define HP_SRAM_WIN3_SIZE SRAM_TRACE_SIZE diff --git a/src/platform/cannonlake/include/platform/platform.h b/src/platform/cannonlake/include/platform/platform.h index c91c583..b007e8a 100644 --- a/src/platform/cannonlake/include/platform/platform.h +++ b/src/platform/cannonlake/include/platform/platform.h @@ -108,8 +108,10 @@ struct reef; #define PLATFORM_IDLE_TIME 750000 /* Platform defined trace code */ -#define platform_panic(__x) \ - sw_reg_write(SRAM_REG_FW_STATUS, (0xdead000 | __x) & 0x3fffffff) +#define platform_panic(__x) { \ + sw_reg_write(SRAM_REG_FW_STATUS, (0xdead000 | __x) & 0x3fffffff); \ + ipc_write(IPC_DIPCIDR, 0x80000000 | ((0xdead000 | __x) & 0x3fffffff)); \ +} /* Platform defined trace code */ #define platform_trace_point(__x) \ diff --git a/src/platform/cannonlake/platform.c b/src/platform/cannonlake/platform.c index 68ebcb3..1f1fd2f 100644 --- a/src/platform/cannonlake/platform.c +++ b/src/platform/cannonlake/platform.c @@ -70,7 +70,7 @@ static const struct sof_ipc_fw_ready ready = { #define SRAM_WINDOW_HOST_OFFSET(x) (0x80000 + x * 0x20000) -#define NUM_CNL_WINDOWS 6 +#define NUM_CNL_WINDOWS 7 static const struct sof_ipc_window sram_window = { .ext_hdr = { @@ -105,17 +105,24 @@ static const struct sof_ipc_window sram_window = { .type = SOF_IPC_REGION_DEBUG, .id = 2, /* map to host window 2 */ .flags = 0, // TODO: set later - .size = MAILBOX_EXCEPTION_SIZE + MAILBOX_DEBUG_SIZE, + .size = MAILBOX_DEBUG_SIZE, .offset = 0, }, .window[4] = { + .type = SOF_IPC_REGION_EXCEPTION, + .id = 2, /* map to host window 2 */ + .flags = 0, // TODO: set later + .size = MAILBOX_EXCEPTION_SIZE, + .offset = MAILBOX_EXCEPTION_OFFSET, + }, + .window[5] = { .type = SOF_IPC_REGION_STREAM, .id = 2, /* map to host window 2 */ .flags = 0, // TODO: set later .size = MAILBOX_STREAM_SIZE, .offset = MAILBOX_STREAM_OFFSET, }, - .window[5] = { + .window[6] = { .type = SOF_IPC_REGION_TRACE, .id = 3, /* map to host window 3 */ .flags = 0, // TODO: set later diff --git a/src/platform/haswell/include/platform/platform.h b/src/platform/haswell/include/platform/platform.h index 94c4bc2..a9efe8a 100644 --- a/src/platform/haswell/include/platform/platform.h +++ b/src/platform/haswell/include/platform/platform.h @@ -98,7 +98,7 @@ struct reef; /* Platform defined panic code */ #define platform_panic(__x) \ - shim_write(SHIM_IPCD, (0xdead000 | __x) & 0x3fffffff) + shim_write(SHIM_IPCD, (SHIM_IPCD_BUSY | 0xdead000 | __x)) /* Platform defined trace code */ #define platform_trace_point(__x) \ diff --git a/src/platform/haswell/platform.c b/src/platform/haswell/platform.c index f84d6e3..e9270ac 100644 --- a/src/platform/haswell/platform.c +++ b/src/platform/haswell/platform.c @@ -69,7 +69,7 @@ static const struct sof_ipc_fw_ready ready = { /* TODO: add capabilities */ }; -#define NUM_HSW_WINDOWS 5 +#define NUM_HSW_WINDOWS 6 static const struct sof_ipc_window sram_window = { .ext_hdr = { .hdr.cmd = SOF_IPC_FW_READY, @@ -113,6 +113,13 @@ static const struct sof_ipc_window sram_window = { .size = MAILBOX_STREAM_SIZE, .offset = MAILBOX_STREAM_OFFSET, }, + .window[5] = { + .type = SOF_IPC_REGION_EXCEPTION, + .id = 0, /* map to host window 0 */ + .flags = 0, // TODO: set later + .size = MAILBOX_EXCEPTION_SIZE, + .offset = MAILBOX_EXCEPTION_OFFSET, + }, }; static struct work_queue_timesource platform_generic_queue = { -- 2.7.4

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[Sound-open-firmware] [PATCH] ASoC: sof: Fix oops due to trace_sleep use before init
by Daniel Baluta 21 Mar '18

21 Mar '18

Access happens on the following path: 1) sof_ipc_tx_message => tx_wait_done => snd_sof_trace_notify_for_error => wake_up(&sdev->trace_sleep) where sdev->trace_sleep is not yet initialized. While at it also move initialization of sdev->host_offset before starting working with sdev struct. Signed-off-by: Daniel Baluta <daniel.baluta(a)gmail.com> --- sound/soc/sof/trace.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/sound/soc/sof/trace.c b/sound/soc/sof/trace.c index 744d75b..2772cbee 100644 --- a/sound/soc/sof/trace.c +++ b/sound/soc/sof/trace.c @@ -245,6 +245,9 @@ int snd_sof_init_trace(struct snd_sof_dev *sdev) params.buffer.offset = 0; params.buffer.pages = sdev->dma_trace_pages; + init_waitqueue_head(&sdev->trace_sleep); + sdev->host_offset = 0; + /* send IPC to the DSP */ ret = sof_ipc_tx_message(sdev->ipc, params.hdr.cmd, &params, sizeof(params), @@ -255,8 +258,6 @@ int snd_sof_init_trace(struct snd_sof_dev *sdev) goto table_err; } - init_waitqueue_head(&sdev->trace_sleep); - sdev->host_offset = 0; return 0; table_err: -- 2.7.4

3 3

[Sound-open-firmware] [PATCH 0/7] Fix exception support using memory window
by Xiuli Pan 21 Mar '18

21 Mar '18

From: Pan Xiuli <xiuli.pan(a)linux.intel.com> This patch set need used with patch for SOF: mailbox: fix mailbox mappings to include exception space. Pan Xiuli (7): ASoC: SOF: export snd_sof_trace_notify_for_error ASoC: SOF: Add SOF_IPC_REGION_EXCEPTION ASoC: SOF: add dsp_oops_offset for DSP panic ASoC: SOF: Add exception memory window support for BYT ASoC: SOF: Add exception memory window support for HSW ASoC: SOF: Add exception memory window support for BDW ASoC: SOF: Add exception memory window support for APL and CNL include/uapi/sound/sof-ipc.h | 1 + sound/soc/sof/hw-apl.c | 33 +++++++++++++++++++++++++++++---- sound/soc/sof/hw-bdw.c | 22 +++++++++++++++++----- sound/soc/sof/hw-byt.c | 22 +++++++++++++++++----- sound/soc/sof/hw-hsw.c | 22 +++++++++++++++++----- sound/soc/sof/sof-priv.h | 1 + sound/soc/sof/trace.c | 1 + 7 files changed, 83 insertions(+), 19 deletions(-) -- 2.7.4

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[Sound-open-firmware] [PATCH] topology: Remove duplicate W_DAI_IN/OUT and W_PIPELINE
by Liam Girdwood 21 Mar '18

21 Mar '18

From: Pan Xiuli <xiuli.pan(a)linux.intel.com> We call PIPELINE_PCM_DAI_ADD and DAI_ADD that will duplicate call W_DAI_IN/OUT and W_PIPELINE. Signed-off-by: Pan Xiuli <xiuli.pan(a)linux.intel.com> --- topology/sof/pipe-passthrough-capture.m4 | 10 ---------- topology/sof/pipe-passthrough-playback.m4 | 10 ---------- topology/sof/pipe-src-capture.m4 | 12 ------------ topology/sof/pipe-src-playback.m4 | 12 ------------ topology/sof/pipe-volume-capture.m4 | 12 ------------ topology/sof/pipe-volume-playback.m4 | 12 ------------ 6 files changed, 68 deletions(-) diff --git a/topology/sof/pipe-passthrough-capture.m4 b/topology/sof/pipe-passthrough-capture.m4 index ff7c842..203003c 100644 --- a/topology/sof/pipe-passthrough-capture.m4 +++ b/topology/sof/pipe-passthrough-capture.m4 @@ -24,16 +24,6 @@ W_BUFFER(0, COMP_BUFFER_SIZE(2, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), PLATFORM_PASS_MEM_CAP) -# -# DAI definitions -# -W_DAI_IN(DAI_TYPE, DAI_INDEX, DAI_BE, DAI_FORMAT, 0, 2, 2, dai0c_plat_conf) - -# -# DAI pipeline - always use 0 for DAIs -# -W_PIPELINE(N_DAI_IN, SCHEDULE_DEADLINE, SCHEDULE_PRIORITY, SCHEDULE_FRAMES, SCHEDULE_CORE, 0, pipe_dai_schedule_plat) - # # Pipeline Graph # diff --git a/topology/sof/pipe-passthrough-playback.m4 b/topology/sof/pipe-passthrough-playback.m4 index 84aa126..a2a88ad 100644 --- a/topology/sof/pipe-passthrough-playback.m4 +++ b/topology/sof/pipe-passthrough-playback.m4 @@ -24,16 +24,6 @@ W_BUFFER(0, COMP_BUFFER_SIZE(2, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), PLATFORM_PASS_MEM_CAP) -# -# DAI definitions -# -W_DAI_OUT(DAI_TYPE, DAI_INDEX, DAI_BE, DAI_FORMAT, 0, 2, 2, dai0p_plat_conf) - -# -# DAI pipeline - always use 0 for DAIs -# -W_PIPELINE(N_DAI_OUT, SCHEDULE_DEADLINE, SCHEDULE_PRIORITY, SCHEDULE_FRAMES, SCHEDULE_CORE, 0, pipe_dai_schedule_plat) - # # Pipeline Graph # diff --git a/topology/sof/pipe-src-capture.m4 b/topology/sof/pipe-src-capture.m4 index 54eeea3..6211d33 100644 --- a/topology/sof/pipe-src-capture.m4 +++ b/topology/sof/pipe-src-capture.m4 @@ -39,18 +39,6 @@ W_BUFFER(1, COMP_BUFFER_SIZE(4, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), PLATFORM_DAI_MEM_CAP) -# -# DAI definitions -# -W_DAI_IN(DAI_TYPE, DAI_INDEX, DAI_BE, DAI_FORMAT, 0, DAI_PERIODS, - DAI_PERIODS, dai0c_plat_conf) - -# -# DAI pipeline -# -W_PIPELINE(N_DAI_IN, SCHEDULE_DEADLINE, SCHEDULE_PRIORITY, SCHEDULE_FRAMES, - SCHEDULE_CORE, 0, pipe_dai_schedule_plat) - # # Pipeline Graph # diff --git a/topology/sof/pipe-src-playback.m4 b/topology/sof/pipe-src-playback.m4 index 51237ac..119ee2c 100644 --- a/topology/sof/pipe-src-playback.m4 +++ b/topology/sof/pipe-src-playback.m4 @@ -39,18 +39,6 @@ W_BUFFER(1, COMP_BUFFER_SIZE(4, COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), PLATFORM_DAI_MEM_CAP) -# -# DAI definitions -# -W_DAI_OUT(DAI_TYPE, DAI_INDEX, DAI_BE, DAI_FORMAT, 0, DAI_PERIODS, - DAI_PERIODS, dai0p_plat_conf) - -# -# DAI pipeline -# -W_PIPELINE(N_DAI_OUT, SCHEDULE_DEADLINE, SCHEDULE_PRIORITY, SCHEDULE_FRAMES, - SCHEDULE_CORE, 0, pipe_dai_schedule_plat) - # # Pipeline Graph # diff --git a/topology/sof/pipe-volume-capture.m4 b/topology/sof/pipe-volume-capture.m4 index c3917ca..5d1c24f 100644 --- a/topology/sof/pipe-volume-capture.m4 +++ b/topology/sof/pipe-volume-capture.m4 @@ -44,18 +44,6 @@ W_BUFFER(1, COMP_BUFFER_SIZE(2, COMP_SAMPLE_SIZE(DAI_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), PLATFORM_DAI_MEM_CAP) -# -# DAI definitions -# -W_DAI_IN(DAI_TYPE, DAI_INDEX, DAI_BE, DAI_FORMAT, 0, DAI_PERIODS, - DAI_PERIODS, dai0c_plat_conf) - -# -# DAI pipeline - always use 0 for DAIs -# -W_PIPELINE(N_DAI_IN, SCHEDULE_DEADLINE, SCHEDULE_PRIORITY, SCHEDULE_FRAMES, - SCHEDULE_CORE, 0, pipe_dai_schedule_plat) - # # Pipeline Graph # diff --git a/topology/sof/pipe-volume-playback.m4 b/topology/sof/pipe-volume-playback.m4 index 194aad9..727490d 100644 --- a/topology/sof/pipe-volume-playback.m4 +++ b/topology/sof/pipe-volume-playback.m4 @@ -44,18 +44,6 @@ W_BUFFER(1, COMP_BUFFER_SIZE(2, COMP_SAMPLE_SIZE(DAI_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES), PLATFORM_DAI_MEM_CAP) -# -# DAI definitions -# -W_DAI_OUT(DAI_TYPE, DAI_INDEX, DAI_BE, DAI_FORMAT, 0, DAI_PERIODS, - DAI_PERIODS, dai0p_plat_conf) - -# -# DAI pipeline - always use 0 for DAIs -# -W_PIPELINE(N_DAI_OUT, SCHEDULE_DEADLINE, SCHEDULE_PRIORITY, SCHEDULE_FRAMES, - SCHEDULE_CORE, 0, pipe_dai_schedule_plat) - # # Pipeline Graph # -- 2.14.1

1 0

[Sound-open-firmware] [PATCH] cnl: ssp: fix ssp settings
by Liam Girdwood 21 Mar '18

21 Mar '18

From: Tomasz Lauda <tomasz.lauda(a)linux.intel.com> We change ssp settings in order to properly transmit and receive data: 1. Use frame end padding instead of dummy stop bits. This way alignment bits will be transmitted at the end of whole frame instead of every slot. 2. Disable receive without transmit mode. 3. Do not change the source for MCLK. 4. DSP_A format shouldn't have start delay. Signed-off-by: Tomasz Lauda <tomasz.lauda(a)linux.intel.com> --- src/drivers/apl-ssp.c | 30 +++++++++++++++++------------- src/include/reef/ssp.h | 3 ++- 2 files changed, 19 insertions(+), 14 deletions(-) diff --git a/src/drivers/apl-ssp.c b/src/drivers/apl-ssp.c index a863b448..81fe96c4 100644 --- a/src/drivers/apl-ssp.c +++ b/src/drivers/apl-ssp.c @@ -106,7 +106,7 @@ static inline int ssp_set_config(struct dai *dai, uint32_t i2s_n; uint32_t data_size; uint32_t start_delay; - uint32_t dummy_stop; + uint32_t frame_end_padding; uint32_t frame_len = 0; uint32_t bdiv_min; uint32_t tft; @@ -138,13 +138,13 @@ static inline int ssp_set_config(struct dai *dai, sscr0 = SSCR0_PSP | SSCR0_RIM | SSCR0_TIM; /* sscr1 dynamic settings are SFRMDIR, SCLKDIR, SCFR */ - sscr1 = SSCR1_TTE | SSCR1_TTELP | SSCR1_RWOT | SSCR1_TRAIL; + sscr1 = SSCR1_TTE | SSCR1_TTELP | SSCR1_TRAIL | SSCR1_RSRE | SSCR1_TSRE; /* sscr2 dynamic setting is LJDFD */ sscr2 = SSCR2_SDFD | SSCR2_TURM1; /* sscr3 dynamic settings are TFT, RFT */ - sscr3 = 0; + sscr3 = SSCR3_TX(8) | SSCR3_RX(8); /* sspsp dynamic settings are SCMODE, SFRMP, DMYSTRT, SFRMWDTH */ sspsp = 0; @@ -283,7 +283,7 @@ static inline int ssp_set_config(struct dai *dai, goto out; } - /* must be enouch BCLKs for data */ + /* must be enough BCLKs for data */ bdiv = config->bclk / config->fclk; if (bdiv < config->sample_container_bits * config->num_slots) { trace_ssp_error("ec8"); @@ -355,7 +355,7 @@ static inline int ssp_set_config(struct dai *dai, break; case SOF_DAI_FMT_DSP_A: - start_delay = 1; + start_delay = 0; sscr0 |= SSCR0_MOD | SSCR0_FRDC(config->num_slots); @@ -405,10 +405,6 @@ static inline int ssp_set_config(struct dai *dai, sspsp |= SSPSP_STRTDLY(start_delay); sspsp |= SSPSP_SFRMWDTH(frame_len); - /* - * [dummy_start][valid_bits_slot[0...n-1]][dummy_stop], - * but don't count dummy_start for dummy_stop calculation. - */ bdiv_min = config->num_slots * config->sample_valid_bits; if (bdiv < bdiv_min) { trace_ssp_error("ecc"); @@ -416,10 +412,14 @@ static inline int ssp_set_config(struct dai *dai, goto out; } - dummy_stop = bdiv - bdiv_min; - sspsp |= SSPSP_DMYSTOP(SSPSP_DMYSTOP_MASK & dummy_stop); - sspsp |= SSPSP_EDMYSTOP(SSPSP_EDMYSTOP_MASK & - (dummy_stop >> SSPSP_DMYSTOP_BITS)); + frame_end_padding = bdiv - bdiv_min; + if (frame_end_padding > SSPSP2_FEP_MASK) { + trace_ssp_error("ecd"); + ret = -EINVAL; + goto out; + } + + sspsp2 |= (frame_end_padding & SSPSP2_FEP_MASK); data_size = config->sample_valid_bits; @@ -428,7 +428,11 @@ static inline int ssp_set_config(struct dai *dai, else sscr0 |= SSCR0_DSIZE(data_size); +#ifdef CONFIG_CANNONLAKE + mdivc = 0x1; +#else mdivc = 0x00100001; +#endif /* bypass divider for MCLK */ mdivr = 0x00000fff; diff --git a/src/include/reef/ssp.h b/src/include/reef/ssp.h index 453aaabe..770d94cf 100644 --- a/src/include/reef/ssp.h +++ b/src/include/reef/ssp.h @@ -167,9 +167,10 @@ extern const struct dai_ops ssp_ops; #if defined CONFIG_APOLLOLAKE || defined CONFIG_CANNONLAKE #define SSPSP_EDMYSTOP(x) ((x) << 26) #define SSPSP_EDMYSTOP_MASK 0x7 +#define SSPSP2_FEP_MASK 0xff #define SSTSS 0x38 #define SSCR2 0x40 -#define SSPSP2 0x44 +#define SSPSP2 0x44 #define SSCR3 0x48 #define SSIOC 0x4C -- 2.14.1

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[Sound-open-firmware] [PATCH] version: Strip SOF_FW_XXX_ prefix from version number
by Liam Girdwood 21 Mar '18

21 Mar '18

The version information is generated using git tags and needs to be numerical for version.h usage. Signed-off-by: Liam Girdwood <liam.r.girdwood(a)linux.intel.com> --- version.sh | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/version.sh b/version.sh index 4f25ecd0..5413fb33 100755 --- a/version.sh +++ b/version.sh @@ -10,11 +10,22 @@ else DIR=$1 fi +# get version from git tag +GIT_TAG=`git describe --abbrev=4` + +# Some releases have a SOF_FW_XXX_ prefix on the tag and this prefix +# must be stripped for usage in version.h. i.e. we just need the number. +if [ $(expr match $GIT_TAG 'SOF_FW_[A-Z][A-Z][A-Z]_' ) -eq 11 ]; then + VER=`echo $GIT_TAG | cut -d_ -f4` +else + VER=$GIT_TAG +fi + # create git version if we are a git repo or git worktree if [ -e $DIR/.git -o -d $DIR/.git ]; then # version for make dist - git describe --abbrev=4 > $DIR/.version - git describe --abbrev=4 > $DIR/.tarball-version + echo $VER > $DIR/.version + echo $VER > $DIR/.tarball-version # git commit for IPC echo "#define REEF_TAG \"`git log --pretty=format:\"%h\" -1 | cut -c1-5`\"" > $DIR/src/include/version.h -- 2.14.1

1 0

[Sound-open-firmware] [PATCH] cnl: don't switch to lower clock
by Liam Girdwood 20 Mar '18

20 Mar '18

From: Tomasz Lauda <tomasz.lauda(a)linux.intel.com> We don't want clock optimizations right now, so stay with 400 MHz clock. Signed-off-by: Tomasz Lauda <tomasz.lauda(a)linux.intel.com> --- src/platform/cannonlake/platform.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/platform/cannonlake/platform.c b/src/platform/cannonlake/platform.c index 8bf2d7a4..68ebcb3c 100644 --- a/src/platform/cannonlake/platform.c +++ b/src/platform/cannonlake/platform.c @@ -144,9 +144,6 @@ int platform_boot_complete(uint32_t boot_message) mailbox_dspbox_write(sizeof(ready), &sram_window, sram_window.ext_hdr.hdr.size); - /* boot now complete so we can relax the CPU */ - clock_set_freq(CLK_CPU, CLK_DEFAULT_CPU_HZ); - /* tell host we are ready */ ipc_write(IPC_DIPCIDD, SRAM_WINDOW_HOST_OFFSET(0) >> 12); ipc_write(IPC_DIPCIDR, 0x80000000 | SOF_IPC_FW_READY); -- 2.14.1

1 0