[alsa-devel] [PATCH 0/4] ASoC: codecs: some more improvements for adau1701
Here are some more patches that I worked on while bootstrapping a new audio device featuring an ADAU1701 DSP.
Daniel Mack (4): ASoC: codecs: adau1701: factor out firmware reset ASoC: codecs: adau1701: allow configuration of PLL mode pins ASoC: codecs: adau1701: switch to direct regmap API usage ASoC: codecs: adau1701: add support for pin muxing
.../devicetree/bindings/sound/adi,adau1701.txt | 17 ++ sound/soc/codecs/adau1701.c | 255 ++++++++++++++++++--- sound/soc/codecs/adau1701.h | 4 + 3 files changed, 238 insertions(+), 38 deletions(-)
Some runtime-determined constraints might need to be satisfied prior to firmware loading, so the actual download and releasing the device from reset has to be postponed. Factor it out first, so we have everything at one place.
This also changes the behaviour in a way that adau1701_i2c_probe() will assert the reset line, and wait for the codec probe to release it.
Signed-off-by: Daniel Mack zonque@gmail.com --- sound/soc/codecs/adau1701.c | 49 +++++++++++++++++++++++++++++++++------------ 1 file changed, 36 insertions(+), 13 deletions(-)
diff --git a/sound/soc/codecs/adau1701.c b/sound/soc/codecs/adau1701.c index 3fc1763..b6b1a77 100644 --- a/sound/soc/codecs/adau1701.c +++ b/sound/soc/codecs/adau1701.c @@ -90,6 +90,7 @@ #define ADAU1701_FIRMWARE "adau1701.bin"
struct adau1701 { + int gpio_nreset; unsigned int dai_fmt; };
@@ -183,9 +184,37 @@ static unsigned int adau1701_read(struct snd_soc_codec *codec, unsigned int reg) return value; }
-static int adau1701_load_firmware(struct i2c_client *client) +static void adau1701_reset(struct snd_soc_codec *codec) { - return process_sigma_firmware(client, ADAU1701_FIRMWARE); + struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); + + if (!gpio_is_valid(adau1701->gpio_nreset)) + return; + + gpio_set_value(adau1701->gpio_nreset, 0); + /* minimum reset time is 20ns */ + udelay(1); + gpio_set_value(adau1701->gpio_nreset, 1); + /* power-up time may be as long as 85ms */ + mdelay(85); +} + +static int adau1701_init(struct snd_soc_codec *codec) +{ + int ret; + struct i2c_client *client = to_i2c_client(codec->dev); + + adau1701_reset(codec); + + ret = process_sigma_firmware(client, ADAU1701_FIRMWARE); + if (ret) { + dev_warn(codec->dev, "Failed to load firmware\n"); + return ret; + } + + snd_soc_write(codec, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT); + + return 0; }
static int adau1701_set_capture_pcm_format(struct snd_soc_codec *codec, @@ -466,15 +495,13 @@ MODULE_DEVICE_TABLE(of, adau1701_dt_ids); static int adau1701_probe(struct snd_soc_codec *codec) { int ret; - struct i2c_client *client = to_i2c_client(codec->dev);
- codec->control_data = client; + codec->control_data = to_i2c_client(codec->dev);
- ret = adau1701_load_firmware(client); + ret = adau1701_init(codec); if (ret) - dev_warn(codec->dev, "Failed to load firmware\n"); + return ret;
- snd_soc_write(codec, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT); snd_soc_write(codec, ADAU1701_DSPCTRL, ADAU1701_DSPCTRL_CR);
return 0; @@ -524,14 +551,10 @@ static int adau1701_i2c_probe(struct i2c_client *client, "ADAU1701 Reset"); if (ret < 0) return ret; - - /* minimum reset time is 20ns */ - udelay(1); - gpio_set_value(gpio_nreset, 1); - /* power-up time may be as long as 85ms */ - mdelay(85); }
+ adau1701->gpio_nreset = gpio_nreset; + i2c_set_clientdata(client, adau1701); ret = snd_soc_register_codec(&client->dev, &adau1701_codec_drv, &adau1701_dai, 1);
On 06/07/2013 01:53 PM, Daniel Mack wrote:
Some runtime-determined constraints might need to be satisfied prior to firmware loading, so the actual download and releasing the device from reset has to be postponed. Factor it out first, so we have everything at one place.
This also changes the behaviour in a way that adau1701_i2c_probe() will assert the reset line, and wait for the codec probe to release it.
Signed-off-by: Daniel Mack zonque@gmail.com
Acked-by: Lars-Peter Clausen lars@metafoo.de
Thanks.
sound/soc/codecs/adau1701.c | 49 +++++++++++++++++++++++++++++++++------------ 1 file changed, 36 insertions(+), 13 deletions(-)
diff --git a/sound/soc/codecs/adau1701.c b/sound/soc/codecs/adau1701.c index 3fc1763..b6b1a77 100644 --- a/sound/soc/codecs/adau1701.c +++ b/sound/soc/codecs/adau1701.c @@ -90,6 +90,7 @@ #define ADAU1701_FIRMWARE "adau1701.bin"
struct adau1701 {
- int gpio_nreset; unsigned int dai_fmt;
};
@@ -183,9 +184,37 @@ static unsigned int adau1701_read(struct snd_soc_codec *codec, unsigned int reg) return value; }
-static int adau1701_load_firmware(struct i2c_client *client) +static void adau1701_reset(struct snd_soc_codec *codec) {
- return process_sigma_firmware(client, ADAU1701_FIRMWARE);
- struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
- if (!gpio_is_valid(adau1701->gpio_nreset))
return;
- gpio_set_value(adau1701->gpio_nreset, 0);
- /* minimum reset time is 20ns */
- udelay(1);
- gpio_set_value(adau1701->gpio_nreset, 1);
- /* power-up time may be as long as 85ms */
- mdelay(85);
+}
+static int adau1701_init(struct snd_soc_codec *codec) +{
- int ret;
- struct i2c_client *client = to_i2c_client(codec->dev);
- adau1701_reset(codec);
- ret = process_sigma_firmware(client, ADAU1701_FIRMWARE);
- if (ret) {
dev_warn(codec->dev, "Failed to load firmware\n");
return ret;
- }
- snd_soc_write(codec, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT);
- return 0;
}
static int adau1701_set_capture_pcm_format(struct snd_soc_codec *codec, @@ -466,15 +495,13 @@ MODULE_DEVICE_TABLE(of, adau1701_dt_ids); static int adau1701_probe(struct snd_soc_codec *codec) { int ret;
struct i2c_client *client = to_i2c_client(codec->dev);
codec->control_data = client;
- codec->control_data = to_i2c_client(codec->dev);
- ret = adau1701_load_firmware(client);
- ret = adau1701_init(codec); if (ret)
dev_warn(codec->dev, "Failed to load firmware\n");
return ret;
snd_soc_write(codec, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT); snd_soc_write(codec, ADAU1701_DSPCTRL, ADAU1701_DSPCTRL_CR);
return 0;
@@ -524,14 +551,10 @@ static int adau1701_i2c_probe(struct i2c_client *client, "ADAU1701 Reset"); if (ret < 0) return ret;
/* minimum reset time is 20ns */
udelay(1);
gpio_set_value(gpio_nreset, 1);
/* power-up time may be as long as 85ms */
}mdelay(85);
- adau1701->gpio_nreset = gpio_nreset;
- i2c_set_clientdata(client, adau1701); ret = snd_soc_register_codec(&client->dev, &adau1701_codec_drv, &adau1701_dai, 1);
On Fri, Jun 07, 2013 at 01:53:04PM +0200, Daniel Mack wrote:
Some runtime-determined constraints might need to be satisfied prior to firmware loading, so the actual download and releasing the device from reset has to be postponed. Factor it out first, so we have everything at one place.
Applied, thanks.
The ADAU1701 has 2 hardware pins to configure the PLL mode in accordance to the MCLK-to-LRCLK ratio. These pins have to be stable before the chip is released from reset, and a full reset cycle, including a new firmware download is needed whenever they change.
This patch adds GPIO properties to the DT bindings of the Codec, and implements a callback for the set_clkdiv callback of the DAI.
To avoid excessive reset cycles and firmware downloads, the default clock divider can be specified in DT as well.
Signed-off-by: Daniel Mack zonque@gmail.com --- .../devicetree/bindings/sound/adi,adau1701.txt | 13 ++++ sound/soc/codecs/adau1701.c | 74 ++++++++++++++++++++++ sound/soc/codecs/adau1701.h | 4 ++ 3 files changed, 91 insertions(+)
diff --git a/Documentation/devicetree/bindings/sound/adi,adau1701.txt b/Documentation/devicetree/bindings/sound/adi,adau1701.txt index 3afeda7..c9c6e98 100644 --- a/Documentation/devicetree/bindings/sound/adi,adau1701.txt +++ b/Documentation/devicetree/bindings/sound/adi,adau1701.txt @@ -11,6 +11,19 @@ Optional properties: - reset-gpio: A GPIO spec to define which pin is connected to the chip's !RESET pin. If specified, the driver will assert a hardware reset at probe time. + - adi,pll-clkdiv: The PLL clock divider, specifing the ratio between + MCLK and fsclk. The value is used to determine the + correct state of the two mode pins below. + Note that this value can be overridden at runtime + by passing the ADAU1701_CLKDIV_MCLK_LRCLK divider + with ASoC calls. However, the chips needs a full + reset cycle and a new firmware download each time + the configuration changes. + - adi,pll-mode0-gpio, + adi,pll-mode1-gpio: GPIO specs to describe the GPIOs the ADAU's PLL config + pins are connected to. The state of the pins are set + according to the configured clock divider on ASoC side + before the firmware is loaded.
Examples:
diff --git a/sound/soc/codecs/adau1701.c b/sound/soc/codecs/adau1701.c index b6b1a77..4e1ec57 100644 --- a/sound/soc/codecs/adau1701.c +++ b/sound/soc/codecs/adau1701.c @@ -91,7 +91,10 @@
struct adau1701 { int gpio_nreset; + int gpio_pll_mode0; + int gpio_pll_mode1; unsigned int dai_fmt; + unsigned int pll_clkdiv; };
static const struct snd_kcontrol_new adau1701_controls[] = { @@ -191,6 +194,29 @@ static void adau1701_reset(struct snd_soc_codec *codec) if (!gpio_is_valid(adau1701->gpio_nreset)) return;
+ if (gpio_is_valid(adau1701->gpio_pll_mode0) && + gpio_is_valid(adau1701->gpio_pll_mode1)) { + switch (adau1701->pll_clkdiv) { + case 64: + gpio_set_value(adau1701->gpio_pll_mode0, 0); + gpio_set_value(adau1701->gpio_pll_mode1, 0); + break; + case 256: + gpio_set_value(adau1701->gpio_pll_mode0, 0); + gpio_set_value(adau1701->gpio_pll_mode1, 1); + break; + case 384: + gpio_set_value(adau1701->gpio_pll_mode0, 1); + gpio_set_value(adau1701->gpio_pll_mode1, 0); + break; + case 512: + default: + gpio_set_value(adau1701->gpio_pll_mode0, 1); + gpio_set_value(adau1701->gpio_pll_mode1, 1); + break; + } + } + gpio_set_value(adau1701->gpio_nreset, 0); /* minimum reset time is 20ns */ udelay(1); @@ -452,6 +478,21 @@ static int adau1701_set_sysclk(struct snd_soc_codec *codec, int clk_id, return 0; }
+static int adau1701_set_clkdiv(struct snd_soc_dai *codec_dai, + int div_id, int div) +{ + struct snd_soc_codec *codec = codec_dai->codec; + struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); + + switch (div_id) { + case ADAU1701_CLKDIV_MCLK_LRCLK: + adau1701->pll_clkdiv = div; + return adau1701_init(codec); + default: + return -EINVAL; + } +} + #define ADAU1701_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | \ SNDRV_PCM_RATE_192000)
@@ -462,6 +503,7 @@ static const struct snd_soc_dai_ops adau1701_dai_ops = { .set_fmt = adau1701_set_dai_fmt, .hw_params = adau1701_hw_params, .digital_mute = adau1701_digital_mute, + .set_clkdiv = adau1701_set_clkdiv, };
static struct snd_soc_dai_driver adau1701_dai = { @@ -534,6 +576,8 @@ static int adau1701_i2c_probe(struct i2c_client *client, struct adau1701 *adau1701; struct device *dev = &client->dev; int gpio_nreset = -EINVAL; + int gpio_pll_mode0 = -EINVAL; + int gpio_pll_mode1 = -EINVAL; int ret;
adau1701 = devm_kzalloc(dev, sizeof(*adau1701), GFP_KERNEL); @@ -544,6 +588,19 @@ static int adau1701_i2c_probe(struct i2c_client *client, gpio_nreset = of_get_named_gpio(dev->of_node, "reset-gpio", 0); if (gpio_nreset < 0 && gpio_nreset != -ENOENT) return gpio_nreset; + + gpio_pll_mode0 = of_get_named_gpio(dev->of_node, + "adi,pll-mode0-gpio", 0); + if (gpio_pll_mode0 < 0 && gpio_pll_mode0 != -ENOENT) + return gpio_pll_mode0; + + gpio_pll_mode1 = of_get_named_gpio(dev->of_node, + "adi,pll-mode1-gpio", 0); + if (gpio_pll_mode1 < 0 && gpio_pll_mode1 != -ENOENT) + return gpio_pll_mode1; + + of_property_read_u32(dev->of_node, "adi,pll-clkdiv", + &adau1701->pll_clkdiv); }
if (gpio_is_valid(gpio_nreset)) { @@ -553,7 +610,24 @@ static int adau1701_i2c_probe(struct i2c_client *client, return ret; }
+ if (gpio_is_valid(gpio_pll_mode0) && + gpio_is_valid(gpio_pll_mode1)) { + ret = devm_gpio_request_one(dev, gpio_pll_mode0, + GPIOF_OUT_INIT_LOW, + "ADAU1701 PLL mode 0"); + if (ret < 0) + return ret; + + ret = devm_gpio_request_one(dev, gpio_pll_mode1, + GPIOF_OUT_INIT_LOW, + "ADAU1701 PLL mode 1"); + if (ret < 0) + return ret; + } + adau1701->gpio_nreset = gpio_nreset; + adau1701->gpio_pll_mode0 = gpio_pll_mode0; + adau1701->gpio_pll_mode1 = gpio_pll_mode1;
i2c_set_clientdata(client, adau1701); ret = snd_soc_register_codec(&client->dev, &adau1701_codec_drv, diff --git a/sound/soc/codecs/adau1701.h b/sound/soc/codecs/adau1701.h index 8d0949a..bdcdddc 100644 --- a/sound/soc/codecs/adau1701.h +++ b/sound/soc/codecs/adau1701.h @@ -14,4 +14,8 @@ enum adau1701_clk_src { ADAU1701_CLK_SRC_MCLK, };
+enum adau1701_clkdiv { + ADAU1701_CLKDIV_MCLK_LRCLK, +}; + #endif
On 06/07/2013 01:53 PM, Daniel Mack wrote:
The ADAU1701 has 2 hardware pins to configure the PLL mode in accordance to the MCLK-to-LRCLK ratio. These pins have to be stable before the chip is released from reset, and a full reset cycle, including a new firmware download is needed whenever they change.
I think it makes more sense to let the user provide the mclk frequency and then let the driver in the hwparams callback choose the right divider based on the select playback rate.
This patch adds GPIO properties to the DT bindings of the Codec, and implements a callback for the set_clkdiv callback of the DAI.
To avoid excessive reset cycles and firmware downloads, the default clock divider can be specified in DT as well.
Signed-off-by: Daniel Mack zonque@gmail.com
.../devicetree/bindings/sound/adi,adau1701.txt | 13 ++++ sound/soc/codecs/adau1701.c | 74 ++++++++++++++++++++++ sound/soc/codecs/adau1701.h | 4 ++ 3 files changed, 91 insertions(+)
diff --git a/Documentation/devicetree/bindings/sound/adi,adau1701.txt b/Documentation/devicetree/bindings/sound/adi,adau1701.txt index 3afeda7..c9c6e98 100644 --- a/Documentation/devicetree/bindings/sound/adi,adau1701.txt +++ b/Documentation/devicetree/bindings/sound/adi,adau1701.txt @@ -11,6 +11,19 @@ Optional properties:
- reset-gpio: A GPIO spec to define which pin is connected to the chip's !RESET pin. If specified, the driver will assert a hardware reset at probe time.
- adi,pll-clkdiv: The PLL clock divider, specifing the ratio between
MCLK and fsclk. The value is used to determine the
correct state of the two mode pins below.
Note that this value can be overridden at runtime
by passing the ADAU1701_CLKDIV_MCLK_LRCLK divider
with ASoC calls. However, the chips needs a full
reset cycle and a new firmware download each time
the configuration changes.
- adi,pll-mode0-gpio,
- adi,pll-mode1-gpio: GPIO specs to describe the GPIOs the ADAU's PLL config
pins are connected to. The state of the pins are set
according to the configured clock divider on ASoC side
before the firmware is loaded.
I'd make this one property with two gpios, e.g.:
adi,pll-mode-gpios = <&gpio 12 0 &gpio 34 0>;
- Lars
The hardware I/O has to be open-coded due to registers of unequal sizes. Other than that, the transition is straight forward.
Signed-off-by: Daniel Mack zonque@gmail.com --- sound/soc/codecs/adau1701.c | 104 +++++++++++++++++++++++++++++++++----------- 1 file changed, 78 insertions(+), 26 deletions(-)
diff --git a/sound/soc/codecs/adau1701.c b/sound/soc/codecs/adau1701.c index 4e1ec57..8d2804c 100644 --- a/sound/soc/codecs/adau1701.c +++ b/sound/soc/codecs/adau1701.c @@ -16,6 +16,7 @@ #include <linux/of.h> #include <linux/of_gpio.h> #include <linux/of_device.h> +#include <linux/regmap.h> #include <sound/core.h> #include <sound/pcm.h> #include <sound/pcm_params.h> @@ -95,6 +96,7 @@ struct adau1701 { int gpio_pll_mode1; unsigned int dai_fmt; unsigned int pll_clkdiv; + struct regmap *regmap; };
static const struct snd_kcontrol_new adau1701_controls[] = { @@ -126,7 +128,7 @@ static const struct snd_soc_dapm_route adau1701_dapm_routes[] = { { "ADC", NULL, "IN1" }, };
-static unsigned int adau1701_register_size(struct snd_soc_codec *codec, +static unsigned int adau1701_register_size(struct device *dev, unsigned int reg) { switch (reg) { @@ -140,24 +142,33 @@ static unsigned int adau1701_register_size(struct snd_soc_codec *codec, return 1; }
- dev_err(codec->dev, "Unsupported register address: %d\n", reg); + dev_err(dev, "Unsupported register address: %d\n", reg); return 0; }
-static int adau1701_write(struct snd_soc_codec *codec, unsigned int reg, - unsigned int value) +static bool adau1701_volatile_reg(struct device *dev, unsigned int reg) { + switch (reg) { + case ADAU1701_DACSET: + return true; + default: + return false; + } +} + +static int adau1701_reg_write(void *context, unsigned int reg, + unsigned int value) +{ + struct i2c_client *client = context; unsigned int i; unsigned int size; uint8_t buf[4]; int ret;
- size = adau1701_register_size(codec, reg); + size = adau1701_register_size(&client->dev, reg); if (size == 0) return -EINVAL;
- snd_soc_cache_write(codec, reg, value); - buf[0] = 0x08; buf[1] = reg;
@@ -166,7 +177,7 @@ static int adau1701_write(struct snd_soc_codec *codec, unsigned int reg, value >>= 8; }
- ret = i2c_master_send(to_i2c_client(codec->dev), buf, size + 2); + ret = i2c_master_send(client, buf, size + 2); if (ret == size + 2) return 0; else if (ret < 0) @@ -175,16 +186,47 @@ static int adau1701_write(struct snd_soc_codec *codec, unsigned int reg, return -EIO; }
-static unsigned int adau1701_read(struct snd_soc_codec *codec, unsigned int reg) +static int adau1701_reg_read(void *context, unsigned int reg, + unsigned int *value) { - unsigned int value; - unsigned int ret; + int ret; + unsigned int i; + unsigned int size; + uint8_t send_buf[2], recv_buf[3]; + struct i2c_client *client = context; + struct i2c_msg msgs[2] = { + { + .addr = client->addr, + .len = sizeof(send_buf), + .buf = send_buf, + }, + { + .addr = client->addr, + .len = sizeof(recv_buf), + .buf = recv_buf, + .flags = I2C_M_RD | I2C_M_STOP, + }, + }; + + size = adau1701_register_size(&client->dev, reg); + if (size == 0) + return -EINVAL;
- ret = snd_soc_cache_read(codec, reg, &value); - if (ret) + send_buf[0] = 0x08; + send_buf[1] = reg; + + ret = i2c_transfer(client->adapter, msgs, 2); + if (ret < 0) return ret; + else if (ret != 2) + return -EIO; + + *value = 0; + + for (i = 0; i < size; i++) + *value |= recv_buf[i] << (i * 8);
- return value; + return 0; }
static void adau1701_reset(struct snd_soc_codec *codec) @@ -229,6 +271,7 @@ static int adau1701_init(struct snd_soc_codec *codec) { int ret; struct i2c_client *client = to_i2c_client(codec->dev); + struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
adau1701_reset(codec);
@@ -238,7 +281,8 @@ static int adau1701_init(struct snd_soc_codec *codec) return ret; }
- snd_soc_write(codec, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT); + regcache_sync(adau1701->regmap); + regmap_write(adau1701->regmap, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT);
return 0; } @@ -410,8 +454,8 @@ static int adau1701_set_dai_fmt(struct snd_soc_dai *codec_dai,
adau1701->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
- snd_soc_write(codec, ADAU1701_SERICTL, serictl); - snd_soc_update_bits(codec, ADAU1701_SEROCTL, + regmap_write(adau1701->regmap, ADAU1701_SERICTL, serictl); + regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL, ~ADAU1701_SEROCTL_WORD_LEN_MASK, seroctl);
return 0; @@ -537,14 +581,13 @@ MODULE_DEVICE_TABLE(of, adau1701_dt_ids); static int adau1701_probe(struct snd_soc_codec *codec) { int ret; - - codec->control_data = to_i2c_client(codec->dev); + struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
ret = adau1701_init(codec); if (ret) return ret;
- snd_soc_write(codec, ADAU1701_DSPCTRL, ADAU1701_DSPCTRL_CR); + regmap_write(adau1701->regmap, ADAU1701_DSPCTRL, ADAU1701_DSPCTRL_CR);
return 0; } @@ -554,9 +597,6 @@ static struct snd_soc_codec_driver adau1701_codec_drv = { .set_bias_level = adau1701_set_bias_level, .idle_bias_off = true,
- .reg_cache_size = ADAU1701_NUM_REGS, - .reg_word_size = sizeof(u16), - .controls = adau1701_controls, .num_controls = ARRAY_SIZE(adau1701_controls), .dapm_widgets = adau1701_dapm_widgets, @@ -564,12 +604,19 @@ static struct snd_soc_codec_driver adau1701_codec_drv = { .dapm_routes = adau1701_dapm_routes, .num_dapm_routes = ARRAY_SIZE(adau1701_dapm_routes),
- .write = adau1701_write, - .read = adau1701_read, - .set_sysclk = adau1701_set_sysclk, };
+static const struct regmap_config adau1701_regmap = { + .reg_bits = 16, + .val_bits = 32, + .max_register = ADAU1701_NUM_REGS, + .cache_type = REGCACHE_RBTREE, + .volatile_reg = adau1701_volatile_reg, + .reg_write = adau1701_reg_write, + .reg_read = adau1701_reg_read, +}; + static int adau1701_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id) { @@ -584,6 +631,11 @@ static int adau1701_i2c_probe(struct i2c_client *client, if (!adau1701) return -ENOMEM;
+ adau1701->regmap = devm_regmap_init(dev, NULL, client, + &adau1701_regmap); + if (IS_ERR(adau1701->regmap)) + return PTR_ERR(adau1701->regmap); + if (dev->of_node) { gpio_nreset = of_get_named_gpio(dev->of_node, "reset-gpio", 0); if (gpio_nreset < 0 && gpio_nreset != -ENOENT)
[...]
+static int adau1701_reg_write(void *context, unsigned int reg,
unsigned int value)
+{
- struct i2c_client *client = context; unsigned int i; unsigned int size; uint8_t buf[4]; int ret;
- size = adau1701_register_size(codec, reg);
- size = adau1701_register_size(&client->dev, reg); if (size == 0) return -EINVAL;
- snd_soc_cache_write(codec, reg, value);
- buf[0] = 0x08;
This was actually a hack to let the register range start at 0x00. All the configuration register start at 0x0800. Since we are using regmap now we shouldn't need this anymore.
buf[1] = reg;
@@ -166,7 +177,7 @@ static int adau1701_write(struct snd_soc_codec *codec, unsigned int reg, value >>= 8; }
- ret = i2c_master_send(to_i2c_client(codec->dev), buf, size + 2);
- ret = i2c_master_send(client, buf, size + 2); if (ret == size + 2) return 0; else if (ret < 0)
@@ -175,16 +186,47 @@ static int adau1701_write(struct snd_soc_codec *codec, unsigned int reg, return -EIO; }
-static unsigned int adau1701_read(struct snd_soc_codec *codec, unsigned int reg) +static int adau1701_reg_read(void *context, unsigned int reg,
unsigned int *value)
{
- unsigned int value;
- unsigned int ret;
- int ret;
- unsigned int i;
- unsigned int size;
- uint8_t send_buf[2], recv_buf[3];
- struct i2c_client *client = context;
- struct i2c_msg msgs[2] = {
{
.addr = client->addr,
.len = sizeof(send_buf),
.buf = send_buf,
},
{
.addr = client->addr,
.len = sizeof(recv_buf),
The length depends on the register size
.buf = recv_buf,
.flags = I2C_M_RD | I2C_M_STOP,
},
- };
- size = adau1701_register_size(&client->dev, reg);
- if (size == 0)
return -EINVAL;
- ret = snd_soc_cache_read(codec, reg, &value);
- if (ret)
- send_buf[0] = 0x08;
- send_buf[1] = reg;
- ret = i2c_transfer(client->adapter, msgs, 2);
ARRAY_SIZE(msgs)
- if (ret < 0) return ret;
- else if (ret != 2)
same here
return -EIO;
- *value = 0;
- for (i = 0; i < size; i++)
*value |= recv_buf[i] << (i * 8);
hm, how about:
*value <<= 8 *value |= recv_buf[i];
- return value;
- return 0;
}
[...]
The ADAU1701 has 12 pins that can be configured depending on the system configuration. Allow settting the corresponding registers from DT.
Signed-off-by: Daniel Mack zonque@gmail.com --- .../devicetree/bindings/sound/adi,adau1701.txt | 4 +++ sound/soc/codecs/adau1701.c | 34 ++++++++++++++++++++-- 2 files changed, 36 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/adi,adau1701.txt b/Documentation/devicetree/bindings/sound/adi,adau1701.txt index c9c6e98..e1b44a0 100644 --- a/Documentation/devicetree/bindings/sound/adi,adau1701.txt +++ b/Documentation/devicetree/bindings/sound/adi,adau1701.txt @@ -25,6 +25,10 @@ Optional properties: according to the configured clock divider on ASoC side before the firmware is loaded.
+ - adi,pin-config: An array of 12 numerical values selecting one of the + pin configurations as described in the datasheet, + table 53. + Examples:
i2c_bus { diff --git a/sound/soc/codecs/adau1701.c b/sound/soc/codecs/adau1701.c index 8d2804c..fca9cac 100644 --- a/sound/soc/codecs/adau1701.c +++ b/sound/soc/codecs/adau1701.c @@ -29,6 +29,8 @@ #define ADAU1701_SEROCTL 0x1e #define ADAU1701_SERICTL 0x1f
+#define ADAU1701_PINCONF_0 0x20 +#define ADAU1701_PINCONF_1 0x21 #define ADAU1701_AUXNPOW 0x22
#define ADAU1701_OSCIPOW 0x26 @@ -97,6 +99,7 @@ struct adau1701 { unsigned int dai_fmt; unsigned int pll_clkdiv; struct regmap *regmap; + unsigned char pin_config[12]; };
static const struct snd_kcontrol_new adau1701_controls[] = { @@ -132,6 +135,9 @@ static unsigned int adau1701_register_size(struct device *dev, unsigned int reg) { switch (reg) { + case ADAU1701_PINCONF_0: + case ADAU1701_PINCONF_1: + return 3; case ADAU1701_DSPCTRL: case ADAU1701_SEROCTL: case ADAU1701_AUXNPOW: @@ -162,7 +168,7 @@ static int adau1701_reg_write(void *context, unsigned int reg, struct i2c_client *client = context; unsigned int i; unsigned int size; - uint8_t buf[4]; + uint8_t buf[5]; int ret;
size = adau1701_register_size(&client->dev, reg); @@ -580,7 +586,8 @@ MODULE_DEVICE_TABLE(of, adau1701_dt_ids);
static int adau1701_probe(struct snd_soc_codec *codec) { - int ret; + int ret, i; + unsigned int val; struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
ret = adau1701_init(codec); @@ -589,6 +596,19 @@ static int adau1701_probe(struct snd_soc_codec *codec)
regmap_write(adau1701->regmap, ADAU1701_DSPCTRL, ADAU1701_DSPCTRL_CR);
+ /* set up pin config */ + val = 0; + for (i = 0; i < 6; i++) + val |= adau1701->pin_config[i] << (i * 4); + + regmap_write(adau1701->regmap, ADAU1701_PINCONF_0, val); + + val = 0; + for (i = 0; i < 6; i++) + val |= adau1701->pin_config[i + 6] << (i * 4); + + regmap_write(adau1701->regmap, ADAU1701_PINCONF_1, val); + return 0; }
@@ -637,6 +657,9 @@ static int adau1701_i2c_probe(struct i2c_client *client, return PTR_ERR(adau1701->regmap);
if (dev->of_node) { + const u32 *pin_config32; + u32 size, i; + gpio_nreset = of_get_named_gpio(dev->of_node, "reset-gpio", 0); if (gpio_nreset < 0 && gpio_nreset != -ENOENT) return gpio_nreset; @@ -653,6 +676,13 @@ static int adau1701_i2c_probe(struct i2c_client *client,
of_property_read_u32(dev->of_node, "adi,pll-clkdiv", &adau1701->pll_clkdiv); + pin_config32 = of_get_property(dev->of_node, + "adi,pin-config", &size); + size /= sizeof(u32); + size = min(ARRAY_SIZE(adau1701->pin_config), size); + + for (i = 0; i < size; i++) + adau1701->pin_config[i] = be32_to_cpup(pin_config32 + i); }
if (gpio_is_valid(gpio_nreset)) {
@@ -653,6 +676,13 @@ static int adau1701_i2c_probe(struct i2c_client *client,
of_property_read_u32(dev->of_node, "adi,pll-clkdiv", &adau1701->pll_clkdiv);
pin_config32 = of_get_property(dev->of_node,
"adi,pin-config", &size);
size /= sizeof(u32);
size = min(ARRAY_SIZE(adau1701->pin_config), size);
for (i = 0; i < size; i++)
}adau1701->pin_config[i] = be32_to_cpup(pin_config32 + i);
of_property_read_u32_array
if (gpio_is_valid(gpio_nreset)) {
participants (3)
-
Daniel Mack
-
Lars-Peter Clausen
-
Mark Brown