Hello,

I have implemented a custom i2s codec on an FPGA. Because of how the FPGA is clocked I'm getting samples at 39ksps, which to my surprise worked great after some simple kernel patching (the codec is bit & frame master).

For experimentation I used the snd-soc-dummy coded defined in soc-utils.c. Now I'm trying to write a very simple codec to "lock" the rate to 39000:

https://github.com/ast/vfzfpga-codec

The driver loads just fine but I just get "not registered" when I try to use the codec. I feel I'm missing something very obvious here. I've been through the documentation and tried to read the sources but I'm a bit stuck.. What am I missing?

--Albin