[PATCH 0/2] ASoC: codecs: lpass-wsa: fix vi capture setup
This two patches fixes issues with VI capture rate and path setup.
Signed-off-by: Srinivas Kandagatla srinivas.kandagatla@linaro.org --- Srinivas Kandagatla (2): ASoC: codecs:lpass-wsa-macro: Fix vi feedback rate ASoC: codecs:lpass-wsa-macro: Fix logic of enabling vi channels
sound/soc/codecs/lpass-wsa-macro.c | 111 +++++++++++++++++++++++++++++-------- 1 file changed, 88 insertions(+), 23 deletions(-) --- base-commit: 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0 change-id: 20240618-lpass-wsa-vi-b63375f21d63
Best regards,
Currently the VI feedback rate is set to fixed 8K, fix this by getting the correct rate from params_rate.
Fixes: 2c4066e5d428 ("ASoC: codecs: lpass-wsa-macro: add dapm widgets and route") Signed-off-by: Srinivas Kandagatla srinivas.kandagatla@linaro.org --- sound/soc/codecs/lpass-wsa-macro.c | 36 ++++++++++++++++++++++++++++++++++-- 1 file changed, 34 insertions(+), 2 deletions(-)
diff --git a/sound/soc/codecs/lpass-wsa-macro.c b/sound/soc/codecs/lpass-wsa-macro.c index 6ce309980cd1..7b6d495ef596 100644 --- a/sound/soc/codecs/lpass-wsa-macro.c +++ b/sound/soc/codecs/lpass-wsa-macro.c @@ -66,6 +66,10 @@ #define CDC_WSA_TX_SPKR_PROT_CLK_DISABLE 0 #define CDC_WSA_TX_SPKR_PROT_PCM_RATE_MASK GENMASK(3, 0) #define CDC_WSA_TX_SPKR_PROT_PCM_RATE_8K 0 +#define CDC_WSA_TX_SPKR_PROT_PCM_RATE_16K 1 +#define CDC_WSA_TX_SPKR_PROT_PCM_RATE_24K 2 +#define CDC_WSA_TX_SPKR_PROT_PCM_RATE_32K 3 +#define CDC_WSA_TX_SPKR_PROT_PCM_RATE_48K 4 #define CDC_WSA_TX0_SPKR_PROT_PATH_CFG0 (0x0248) #define CDC_WSA_TX1_SPKR_PROT_PATH_CTL (0x0264) #define CDC_WSA_TX1_SPKR_PROT_PATH_CFG0 (0x0268) @@ -347,6 +351,7 @@ struct wsa_macro { int ear_spkr_gain; int spkr_gain_offset; int spkr_mode; + u32 pcm_rate_vi; int is_softclip_on[WSA_MACRO_SOFTCLIP_MAX]; int softclip_clk_users[WSA_MACRO_SOFTCLIP_MAX]; struct regmap *regmap; @@ -974,6 +979,7 @@ static int wsa_macro_hw_params(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { struct snd_soc_component *component = dai->component; + struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); int ret;
switch (substream->stream) { @@ -986,6 +992,10 @@ static int wsa_macro_hw_params(struct snd_pcm_substream *substream, return ret; } break; + case SNDRV_PCM_STREAM_CAPTURE: + if (dai->id == WSA_MACRO_AIF_VI) + wsa->pcm_rate_vi = params_rate(params); + default: break; } @@ -1159,6 +1169,28 @@ static int wsa_macro_enable_vi_feedback(struct snd_soc_dapm_widget *w, struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); u32 tx_reg0, tx_reg1; + u32 rate_val; + + switch (wsa->pcm_rate_vi) { + case 8000: + rate_val = CDC_WSA_TX_SPKR_PROT_PCM_RATE_8K; + break; + case 16000: + rate_val = CDC_WSA_TX_SPKR_PROT_PCM_RATE_16K; + break; + case 24000: + rate_val = CDC_WSA_TX_SPKR_PROT_PCM_RATE_24K; + break; + case 32000: + rate_val = CDC_WSA_TX_SPKR_PROT_PCM_RATE_32K; + break; + case 48000: + rate_val = CDC_WSA_TX_SPKR_PROT_PCM_RATE_48K; + break; + default: + rate_val = CDC_WSA_TX_SPKR_PROT_PCM_RATE_8K; + break; + }
if (test_bit(WSA_MACRO_TX0, &wsa->active_ch_mask[WSA_MACRO_AIF_VI])) { tx_reg0 = CDC_WSA_TX0_SPKR_PROT_PATH_CTL; @@ -1179,10 +1211,10 @@ static int wsa_macro_enable_vi_feedback(struct snd_soc_dapm_widget *w, CDC_WSA_TX_SPKR_PROT_RESET); snd_soc_component_update_bits(component, tx_reg0, CDC_WSA_TX_SPKR_PROT_PCM_RATE_MASK, - CDC_WSA_TX_SPKR_PROT_PCM_RATE_8K); + rate_val); snd_soc_component_update_bits(component, tx_reg1, CDC_WSA_TX_SPKR_PROT_PCM_RATE_MASK, - CDC_WSA_TX_SPKR_PROT_PCM_RATE_8K); + rate_val); snd_soc_component_update_bits(component, tx_reg0, CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK, CDC_WSA_TX_SPKR_PROT_CLK_ENABLE);
Hi Srinivas,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0]
url: https://github.com/intel-lab-lkp/linux/commits/Srinivas-Kandagatla/ASoC-code... base: 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0 patch link: https://lore.kernel.org/r/20240618-lpass-wsa-vi-v1-1-416a6f162c81%40linaro.o... patch subject: [PATCH 1/2] ASoC: codecs:lpass-wsa-macro: Fix vi feedback rate config: i386-buildonly-randconfig-002-20240619 (https://download.01.org/0day-ci/archive/20240619/202406190857.mozJxHDO-lkp@i...) compiler: clang version 18.1.5 (https://github.com/llvm/llvm-project 617a15a9eac96088ae5e9134248d8236e34b91b1) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240619/202406190857.mozJxHDO-lkp@i...)
If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot lkp@intel.com | Closes: https://lore.kernel.org/oe-kbuild-all/202406190857.mozJxHDO-lkp@intel.com/
All warnings (new ones prefixed by >>):
sound/soc/codecs/lpass-wsa-macro.c:999:2: warning: unannotated fall-through between switch labels [-Wimplicit-fallthrough]
999 | default: | ^ sound/soc/codecs/lpass-wsa-macro.c:999:2: note: insert 'break;' to avoid fall-through 999 | default: | ^ | break; 1 warning generated.
vim +999 sound/soc/codecs/lpass-wsa-macro.c
809bcbcecebff8 Srinivas Kandagatla 2020-11-05 976 809bcbcecebff8 Srinivas Kandagatla 2020-11-05 977 static int wsa_macro_hw_params(struct snd_pcm_substream *substream, 809bcbcecebff8 Srinivas Kandagatla 2020-11-05 978 struct snd_pcm_hw_params *params, 809bcbcecebff8 Srinivas Kandagatla 2020-11-05 979 struct snd_soc_dai *dai) 809bcbcecebff8 Srinivas Kandagatla 2020-11-05 980 { 809bcbcecebff8 Srinivas Kandagatla 2020-11-05 981 struct snd_soc_component *component = dai->component; 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 982 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); 809bcbcecebff8 Srinivas Kandagatla 2020-11-05 983 int ret; 809bcbcecebff8 Srinivas Kandagatla 2020-11-05 984 809bcbcecebff8 Srinivas Kandagatla 2020-11-05 985 switch (substream->stream) { 809bcbcecebff8 Srinivas Kandagatla 2020-11-05 986 case SNDRV_PCM_STREAM_PLAYBACK: 809bcbcecebff8 Srinivas Kandagatla 2020-11-05 987 ret = wsa_macro_set_interpolator_rate(dai, params_rate(params)); 809bcbcecebff8 Srinivas Kandagatla 2020-11-05 988 if (ret) { 809bcbcecebff8 Srinivas Kandagatla 2020-11-05 989 dev_err(component->dev, 809bcbcecebff8 Srinivas Kandagatla 2020-11-05 990 "%s: cannot set sample rate: %u\n", 809bcbcecebff8 Srinivas Kandagatla 2020-11-05 991 __func__, params_rate(params)); 809bcbcecebff8 Srinivas Kandagatla 2020-11-05 992 return ret; 809bcbcecebff8 Srinivas Kandagatla 2020-11-05 993 } 809bcbcecebff8 Srinivas Kandagatla 2020-11-05 994 break; 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 995 case SNDRV_PCM_STREAM_CAPTURE: 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 996 if (dai->id == WSA_MACRO_AIF_VI) 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 997 wsa->pcm_rate_vi = params_rate(params); 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 998 809bcbcecebff8 Srinivas Kandagatla 2020-11-05 @999 default: 809bcbcecebff8 Srinivas Kandagatla 2020-11-05 1000 break; 809bcbcecebff8 Srinivas Kandagatla 2020-11-05 1001 } 809bcbcecebff8 Srinivas Kandagatla 2020-11-05 1002 return 0; 809bcbcecebff8 Srinivas Kandagatla 2020-11-05 1003 } 809bcbcecebff8 Srinivas Kandagatla 2020-11-05 1004
Existing code only configures one of WSA_MACRO_TX0 or WSA_MACRO_TX1 paths eventhough we enable both of them. Fix this bug by adding proper checks and rearranging some of the common code to able to allow setting both TX0 and TX1 paths
Fixes: 2c4066e5d428 ("ASoC: codecs: lpass-wsa-macro: add dapm widgets and route") Co-developed-by: Manikantan R quic_manrav@quicinc.com Signed-off-by: Manikantan R quic_manrav@quicinc.com Signed-off-by: Srinivas Kandagatla srinivas.kandagatla@linaro.org --- sound/soc/codecs/lpass-wsa-macro.c | 105 ++++++++++++++++++++++++------------- 1 file changed, 69 insertions(+), 36 deletions(-)
diff --git a/sound/soc/codecs/lpass-wsa-macro.c b/sound/soc/codecs/lpass-wsa-macro.c index 7b6d495ef596..7251fb179db9 100644 --- a/sound/soc/codecs/lpass-wsa-macro.c +++ b/sound/soc/codecs/lpass-wsa-macro.c @@ -1162,6 +1162,73 @@ static int wsa_macro_mclk_event(struct snd_soc_dapm_widget *w, return 0; }
+ +static void wsa_macro_enable_disable_vi_sense(struct snd_soc_component *component, bool enable, + u32 tx_reg0, u32 tx_reg1, u32 val) +{ + if (enable) { + /* Enable V&I sensing */ + snd_soc_component_update_bits(component, tx_reg0, + CDC_WSA_TX_SPKR_PROT_RESET_MASK, + CDC_WSA_TX_SPKR_PROT_RESET); + snd_soc_component_update_bits(component, tx_reg1, + CDC_WSA_TX_SPKR_PROT_RESET_MASK, + CDC_WSA_TX_SPKR_PROT_RESET); + snd_soc_component_update_bits(component, tx_reg0, + CDC_WSA_TX_SPKR_PROT_PCM_RATE_MASK, + val); + snd_soc_component_update_bits(component, tx_reg1, + CDC_WSA_TX_SPKR_PROT_PCM_RATE_MASK, + val); + snd_soc_component_update_bits(component, tx_reg0, + CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK, + CDC_WSA_TX_SPKR_PROT_CLK_ENABLE); + snd_soc_component_update_bits(component, tx_reg1, + CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK, + CDC_WSA_TX_SPKR_PROT_CLK_ENABLE); + snd_soc_component_update_bits(component, tx_reg0, + CDC_WSA_TX_SPKR_PROT_RESET_MASK, + CDC_WSA_TX_SPKR_PROT_NO_RESET); + snd_soc_component_update_bits(component, tx_reg1, + CDC_WSA_TX_SPKR_PROT_RESET_MASK, + CDC_WSA_TX_SPKR_PROT_NO_RESET); + } else { + snd_soc_component_update_bits(component, tx_reg0, + CDC_WSA_TX_SPKR_PROT_RESET_MASK, + CDC_WSA_TX_SPKR_PROT_RESET); + snd_soc_component_update_bits(component, tx_reg1, + CDC_WSA_TX_SPKR_PROT_RESET_MASK, + CDC_WSA_TX_SPKR_PROT_RESET); + snd_soc_component_update_bits(component, tx_reg0, + CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK, + CDC_WSA_TX_SPKR_PROT_CLK_DISABLE); + snd_soc_component_update_bits(component, tx_reg1, + CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK, + CDC_WSA_TX_SPKR_PROT_CLK_DISABLE); + } +} + +static void wsa_macro_enable_disable_vi_feedback(struct snd_soc_component *component, + bool enable, u32 rate) +{ + struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); + u32 tx_reg0, tx_reg1; + + if (test_bit(WSA_MACRO_TX0, &wsa->active_ch_mask[WSA_MACRO_AIF_VI])) { + tx_reg0 = CDC_WSA_TX0_SPKR_PROT_PATH_CTL; + tx_reg1 = CDC_WSA_TX1_SPKR_PROT_PATH_CTL; + wsa_macro_enable_disable_vi_sense(component, enable, tx_reg0, tx_reg1, rate); + } + + if (test_bit(WSA_MACRO_TX1, &wsa->active_ch_mask[WSA_MACRO_AIF_VI])) { + tx_reg0 = CDC_WSA_TX2_SPKR_PROT_PATH_CTL; + tx_reg1 = CDC_WSA_TX3_SPKR_PROT_PATH_CTL; + wsa_macro_enable_disable_vi_sense(component, enable, tx_reg0, tx_reg1, rate); + + } + +} + static int wsa_macro_enable_vi_feedback(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) @@ -1203,45 +1270,11 @@ static int wsa_macro_enable_vi_feedback(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_POST_PMU: /* Enable V&I sensing */ - snd_soc_component_update_bits(component, tx_reg0, - CDC_WSA_TX_SPKR_PROT_RESET_MASK, - CDC_WSA_TX_SPKR_PROT_RESET); - snd_soc_component_update_bits(component, tx_reg1, - CDC_WSA_TX_SPKR_PROT_RESET_MASK, - CDC_WSA_TX_SPKR_PROT_RESET); - snd_soc_component_update_bits(component, tx_reg0, - CDC_WSA_TX_SPKR_PROT_PCM_RATE_MASK, - rate_val); - snd_soc_component_update_bits(component, tx_reg1, - CDC_WSA_TX_SPKR_PROT_PCM_RATE_MASK, - rate_val); - snd_soc_component_update_bits(component, tx_reg0, - CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK, - CDC_WSA_TX_SPKR_PROT_CLK_ENABLE); - snd_soc_component_update_bits(component, tx_reg1, - CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK, - CDC_WSA_TX_SPKR_PROT_CLK_ENABLE); - snd_soc_component_update_bits(component, tx_reg0, - CDC_WSA_TX_SPKR_PROT_RESET_MASK, - CDC_WSA_TX_SPKR_PROT_NO_RESET); - snd_soc_component_update_bits(component, tx_reg1, - CDC_WSA_TX_SPKR_PROT_RESET_MASK, - CDC_WSA_TX_SPKR_PROT_NO_RESET); + wsa_macro_enable_disable_vi_feedback(component, true, rate_val); break; case SND_SOC_DAPM_POST_PMD: /* Disable V&I sensing */ - snd_soc_component_update_bits(component, tx_reg0, - CDC_WSA_TX_SPKR_PROT_RESET_MASK, - CDC_WSA_TX_SPKR_PROT_RESET); - snd_soc_component_update_bits(component, tx_reg1, - CDC_WSA_TX_SPKR_PROT_RESET_MASK, - CDC_WSA_TX_SPKR_PROT_RESET); - snd_soc_component_update_bits(component, tx_reg0, - CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK, - CDC_WSA_TX_SPKR_PROT_CLK_DISABLE); - snd_soc_component_update_bits(component, tx_reg1, - CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK, - CDC_WSA_TX_SPKR_PROT_CLK_DISABLE); + wsa_macro_enable_disable_vi_feedback(component, false, rate_val); break; }
Hi Srinivas,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0]
url: https://github.com/intel-lab-lkp/linux/commits/Srinivas-Kandagatla/ASoC-code... base: 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0 patch link: https://lore.kernel.org/r/20240618-lpass-wsa-vi-v1-2-416a6f162c81%40linaro.o... patch subject: [PATCH 2/2] ASoC: codecs:lpass-wsa-macro: Fix logic of enabling vi channels config: i386-buildonly-randconfig-002-20240619 (https://download.01.org/0day-ci/archive/20240619/202406191005.yMuWtspN-lkp@i...) compiler: clang version 18.1.5 (https://github.com/llvm/llvm-project 617a15a9eac96088ae5e9134248d8236e34b91b1) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240619/202406191005.yMuWtspN-lkp@i...)
If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot lkp@intel.com | Closes: https://lore.kernel.org/oe-kbuild-all/202406191005.yMuWtspN-lkp@intel.com/
All warnings (new ones prefixed by >>):
sound/soc/codecs/lpass-wsa-macro.c:999:2: warning: unannotated fall-through between switch labels [-Wimplicit-fallthrough] 999 | default: | ^ sound/soc/codecs/lpass-wsa-macro.c:999:2: note: insert 'break;' to avoid fall-through 999 | default: | ^ | break;
sound/soc/codecs/lpass-wsa-macro.c:1238:6: warning: variable 'tx_reg0' set but not used [-Wunused-but-set-variable]
1238 | u32 tx_reg0, tx_reg1; | ^
sound/soc/codecs/lpass-wsa-macro.c:1238:15: warning: variable 'tx_reg1' set but not used [-Wunused-but-set-variable]
1238 | u32 tx_reg0, tx_reg1; | ^ 3 warnings generated.
vim +/tx_reg0 +1238 sound/soc/codecs/lpass-wsa-macro.c
0c27e978419e7e Srinivas Kandagatla 2024-06-18 1231 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1232 static int wsa_macro_enable_vi_feedback(struct snd_soc_dapm_widget *w, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1233 struct snd_kcontrol *kcontrol, 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1234 int event) 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1235 { 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1236 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1237 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 @1238 u32 tx_reg0, tx_reg1; 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 1239 u32 rate_val; 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 1240 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 1241 switch (wsa->pcm_rate_vi) { 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 1242 case 8000: 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 1243 rate_val = CDC_WSA_TX_SPKR_PROT_PCM_RATE_8K; 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 1244 break; 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 1245 case 16000: 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 1246 rate_val = CDC_WSA_TX_SPKR_PROT_PCM_RATE_16K; 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 1247 break; 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 1248 case 24000: 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 1249 rate_val = CDC_WSA_TX_SPKR_PROT_PCM_RATE_24K; 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 1250 break; 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 1251 case 32000: 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 1252 rate_val = CDC_WSA_TX_SPKR_PROT_PCM_RATE_32K; 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 1253 break; 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 1254 case 48000: 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 1255 rate_val = CDC_WSA_TX_SPKR_PROT_PCM_RATE_48K; 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 1256 break; 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 1257 default: 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 1258 rate_val = CDC_WSA_TX_SPKR_PROT_PCM_RATE_8K; 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 1259 break; 2881dae5fbb091 Srinivas Kandagatla 2024-06-18 1260 } 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1261 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1262 if (test_bit(WSA_MACRO_TX0, &wsa->active_ch_mask[WSA_MACRO_AIF_VI])) { 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1263 tx_reg0 = CDC_WSA_TX0_SPKR_PROT_PATH_CTL; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1264 tx_reg1 = CDC_WSA_TX1_SPKR_PROT_PATH_CTL; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1265 } else if (test_bit(WSA_MACRO_TX1, &wsa->active_ch_mask[WSA_MACRO_AIF_VI])) { 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1266 tx_reg0 = CDC_WSA_TX2_SPKR_PROT_PATH_CTL; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1267 tx_reg1 = CDC_WSA_TX3_SPKR_PROT_PATH_CTL; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1268 } 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1269 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1270 switch (event) { 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1271 case SND_SOC_DAPM_POST_PMU: 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1272 /* Enable V&I sensing */ 0c27e978419e7e Srinivas Kandagatla 2024-06-18 1273 wsa_macro_enable_disable_vi_feedback(component, true, rate_val); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1274 break; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1275 case SND_SOC_DAPM_POST_PMD: 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1276 /* Disable V&I sensing */ 0c27e978419e7e Srinivas Kandagatla 2024-06-18 1277 wsa_macro_enable_disable_vi_feedback(component, false, rate_val); 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1278 break; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1279 } 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1280 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1281 return 0; 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1282 } 2c4066e5d428d4 Srinivas Kandagatla 2020-11-05 1283
participants (2)
-
kernel test robot -
Srinivas Kandagatla