Hello,

On Tue, 4 Oct 2016 12:40:11 +0200, Jean-Francois Moine wrote:

...

Add the case of a burst of 4 which is handled by the SoC.

Signed-off-by: Mylène Josserand mylene.josserand@free-electrons.com

drivers/dma/sun6i-dma.c | 2 ++ 1 file changed, 2 insertions(+)

diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index 8346199..0485204 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -240,6 +240,8 @@ static inline s8 convert_burst(u32 maxburst) switch (maxburst) { case 1: return 0;

• case 4:

• return 1;
  

  case 8: return 2; default:

-- 2.9.3

This patch has already been rejected by Maxime in the threads http://www.spinics.net/lists/dmaengine/msg08610.html and http://www.spinics.net/lists/dmaengine/msg08719.html

I hope you will find the way he wants for this maxburst to be added.

I was about to reply to Mylene's e-mail, suggesting that she should add a comment in the code (and maybe in the commit log) to explain why this addition is needed, and also that even though the schematics say that value "1" (max burst size of 4 bytes) is reserved, it is in fact incorrect. The Allwinner BSP code is really using this value, and it's the value that makes audio work, so we believe the datasheet is simply incorrect.

We already discussed it with Maxime, so I believe he should agree this time. But I would suggest to have such details explained in the commit log and in a comment in the code.

Best regards,

Thomas

On Tue, Oct 04, 2016 at 03:46:51PM +0200, Jean-Francois Moine wrote:

On Tue, 4 Oct 2016 14:12:21 +0200 Thomas Petazzoni thomas.petazzoni@free-electrons.com wrote:

...

...

...

Add the case of a burst of 4 which is handled by the SoC.

Signed-off-by: Mylène Josserand mylene.josserand@free-electrons.com

drivers/dma/sun6i-dma.c | 2 ++ 1 file changed, 2 insertions(+)

diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index 8346199..0485204 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -240,6 +240,8 @@ static inline s8 convert_burst(u32 maxburst) switch (maxburst) { case 1: return 0;

• case 4:

• return 1;
  

  case 8: return 2; default:

-- 2.9.3

This patch has already been rejected by Maxime in the threads http://www.spinics.net/lists/dmaengine/msg08610.html and http://www.spinics.net/lists/dmaengine/msg08719.html

I hope you will find the way he wants for this maxburst to be added.

I was about to reply to Mylene's e-mail, suggesting that she should add a comment in the code (and maybe in the commit log) to explain why this addition is needed, and also that even though the schematics say that value "1" (max burst size of 4 bytes) is reserved, it is in fact incorrect. The Allwinner BSP code is really using this value, and it's the value that makes audio work, so we believe the datasheet is simply incorrect.

We already discussed it with Maxime, so I believe he should agree this time. But I would suggest to have such details explained in the commit log and in a comment in the code.

Strange. Looking at the datasheets of the A23, A31, A33, A83T and H3 (these are the SoCs using the DMA sun6i), only the H3 can have 4 as the burst size (the doc is unclear for the A31).

Well, I was submitting for the H3, Mylène is submitting for the A33. So, what about the A23, A31 and A83T?

Since these are device properties, I feel we should move this to DT. That way any new controller can have any variation based on the mood of hw designer that day and we can hopefully cope with it :-)

But yes we would need to set the bursts supported in driver and allow above for supported bursts only.

On Tue, 4 Oct 2016 18:55:54 +0200 Maxime Ripard maxime.ripard@free-electrons.com wrote:

On Tue, Oct 04, 2016 at 12:40:11PM +0200, Jean-Francois Moine wrote:

...

On Tue, 4 Oct 2016 11:46:14 +0200 Mylène Josserand mylene.josserand@free-electrons.com wrote:

...

Add the case of a burst of 4 which is handled by the SoC.

Signed-off-by: Mylène Josserand mylene.josserand@free-electrons.com

drivers/dma/sun6i-dma.c | 2 ++ 1 file changed, 2 insertions(+)

diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index 8346199..0485204 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -240,6 +240,8 @@ static inline s8 convert_burst(u32 maxburst) switch (maxburst) { case 1: return 0;

• case 4:

• return 1;
  

  case 8: return 2; default:

-- 2.9.3

This patch has already been rejected by Maxime in the threads http://www.spinics.net/lists/dmaengine/msg08610.html and http://www.spinics.net/lists/dmaengine/msg08719.html

I hope you will find the way he wants for this maxburst to be added.

I was talking about something along these lines (not tested):

I wonder why you don't submit this yourself.

-------8<--------- diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index 83461994e418..573ac4608293 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -240,6 +240,8 @@ static inline s8 convert_burst(u32 maxburst) switch (maxburst) { case 1: return 0;

• case 4:

• return 1;
  

  case 8: return 2; default:

@@ -1110,11 +1112,19 @@ static int sun6i_dma_probe(struct platform_device *pdev) sdc->slave.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);

• sdc->slave.dst_bursts = BIT(1) | BIT(8);

• sdc->slave.src_bursts = BIT(1) | BIT(8); sdc->slave.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); sdc->slave.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST; sdc->slave.dev = &pdev->dev;

• if (of_device_is_compatible(pdev->dev.of_node,

• 		    "allwinner,sun8i-h3-dma")) {
  

• sdc->slave.dst_bursts |= BIT(4);
  

• sdc->slave.src_bursts |= BIT(4);
  

• }

• sdc->pchans = devm_kcalloc(&pdev->dev, sdc->cfg->nr_max_channels, sizeof(struct sun6i_pchan), GFP_KERNEL); if (!sdc->pchans)

diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index cc535a478bae..f7bbec24bb58 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -673,6 +673,8 @@ struct dma_filter {

• each type of direction, the dma controller should fill (1 <<
• <TYPE>) and same should be checked by controller as well
• @max_burst: max burst capability per-transfer

• • @dst_bursts: bitfield of the available burst sizes for the destination
• • @src_bursts: bitfield of the available burst sizes for the source

You did not define dst_bursts nor src_bursts.

• @residue_granularity: granularity of the transfer residue reported
• by tx_status
• @device_alloc_chan_resources: allocate resources and return the

@@ -800,6 +802,14 @@ struct dma_device { static inline int dmaengine_slave_config(struct dma_chan *chan, struct dma_slave_config *config) {

• if (config->src_maxburst && config->device->src_bursts &&

•    !(BIT(config->src_maxburst) & config->device->src_bursts))
  

The maxburst may be as big as 4Kibytes, then, I am not sure that this code will work!

• return -EINVAL;
  

• if (config->dst_maxburst && config->device->dst_bursts &&

•    !(BIT(config->dst_maxburst) & config->device->dst_bursts))
  

• return -EINVAL;
  

• if (chan->device->device_config) return chan->device->device_config(chan, config);

-------8<------------

Yes, I know that the burst size is always a power of 2. The best way to check it would be to change the {src,dts}_maxburst to a bitmap of the possible bursts as 0x0d for 1,4 and 8 bytes. But this asks for a lot of changes...

Hi,

On Fri, Oct 28, 2016 at 1:51 AM, Maxime Ripard maxime.ripard@free-electrons.com wrote:

On Sun, Oct 23, 2016 at 06:31:07PM +0200, Jean-Francois Moine wrote:

...

On Tue, 4 Oct 2016 18:55:54 +0200 Maxime Ripard maxime.ripard@free-electrons.com wrote:

...

On Tue, Oct 04, 2016 at 12:40:11PM +0200, Jean-Francois Moine wrote:

...

On Tue, 4 Oct 2016 11:46:14 +0200 Mylène Josserand mylene.josserand@free-electrons.com wrote:

...

Add the case of a burst of 4 which is handled by the SoC.

Signed-off-by: Mylène Josserand mylene.josserand@free-electrons.com

drivers/dma/sun6i-dma.c | 2 ++ 1 file changed, 2 insertions(+)

diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index 8346199..0485204 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -240,6 +240,8 @@ static inline s8 convert_burst(u32 maxburst) switch (maxburst) { case 1: return 0;

•   case 4:
  

•           return 1;
    case 8:
            return 2;
    default:
  

-- 2.9.3

This patch has already been rejected by Maxime in the threads http://www.spinics.net/lists/dmaengine/msg08610.html and http://www.spinics.net/lists/dmaengine/msg08719.html

I hope you will find the way he wants for this maxburst to be added.

I was talking about something along these lines (not tested):

I wonder why you don't submit this yourself.

I thought you were the one who cared. You asked for what I had in mind, here it is.

...

...

-------8<--------- diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index 83461994e418..573ac4608293 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -240,6 +240,8 @@ static inline s8 convert_burst(u32 maxburst) switch (maxburst) { case 1: return 0;

• case 4:

•       return 1;
  

  case 8: return 2; default:

@@ -1110,11 +1112,19 @@ static int sun6i_dma_probe(struct platform_device *pdev) sdc->slave.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);

• sdc->slave.dst_bursts = BIT(1) | BIT(8);

• sdc->slave.src_bursts = BIT(1) | BIT(8); sdc->slave.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); sdc->slave.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST; sdc->slave.dev = &pdev->dev;

• if (of_device_is_compatible(pdev->dev.of_node,

•                           "allwinner,sun8i-h3-dma")) {
  

•       sdc->slave.dst_bursts |= BIT(4);
  

•       sdc->slave.src_bursts |= BIT(4);
  

• }

• sdc->pchans = devm_kcalloc(&pdev->dev, sdc->cfg->nr_max_channels, sizeof(struct sun6i_pchan), GFP_KERNEL); if (!sdc->pchans)

diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index cc535a478bae..f7bbec24bb58 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -673,6 +673,8 @@ struct dma_filter {

•     each type of direction, the dma controller should fill (1 <<
  

•     <TYPE>) and same should be checked by controller as well
  

• @max_burst: max burst capability per-transfer

• • @dst_bursts: bitfield of the available burst sizes for the destination
• • @src_bursts: bitfield of the available burst sizes for the source

You did not define dst_bursts nor src_bursts.

...

• @residue_granularity: granularity of the transfer residue reported
• by tx_status
• @device_alloc_chan_resources: allocate resources and return the

@@ -800,6 +802,14 @@ struct dma_device { static inline int dmaengine_slave_config(struct dma_chan *chan, struct dma_slave_config *config) {

• if (config->src_maxburst && config->device->src_bursts &&

•   !(BIT(config->src_maxburst) & config->device->src_bursts))
  

The maxburst may be as big as 4Kibytes, then, I am not sure that this code will work!

...

•       return -EINVAL;
  

• if (config->dst_maxburst && config->device->dst_bursts &&

•   !(BIT(config->dst_maxburst) & config->device->dst_bursts))
  

•       return -EINVAL;
  

• if (chan->device->device_config) return chan->device->device_config(chan, config);

-------8<------------

Yes, I know that the burst size is always a power of 2. The best way to check it would be to change the {src,dts}_maxburst to a bitmap of the possible bursts as 0x0d for 1,4 and 8 bytes. But this asks for a lot of changes...

To be honest, I'm not really a big fan of those tree wide changes without any way to maintain compatibility. It ends up in a single, huge patch if we want to maintain bisectability that just isn't reviewable.

Looking at the dmaengine API, I believe we got it wrong.

max_burst in dma_slave_config denotes the largest amount of data a single transfer should be, as described in dmaengine.h:

* @src_maxburst: the maximum number of words (note: words, as in * units of the src_addr_width member, not bytes) that can be sent * in one burst to the device. Typically something like half the * FIFO depth on I/O peripherals so you don't overflow it. This * may or may not be applicable on memory sources. * @dst_maxburst: same as src_maxburst but for destination target * mutatis mutandis.

The DMA engine driver should be free to select whatever burst size that doesn't exceed this. So for max_burst = 4, the driver can select burst = 4 for controllers that do support it, or burst = 1 for those that don't, and do more bursts.

This also means we can increase max_burst for the audio codec, as the FIFO is 64 samples deep for stereo, or 128 samples for mono.

If we agree on the above I can send some patches for this.

Regards ChenYu

Hi,

On Tue, Oct 04, 2016 at 02:15:16PM +0200, Thomas Petazzoni wrote:

Hello,

On Tue, 4 Oct 2016 11:46:16 +0200, Mylène Josserand wrote:

...

#include <sound/dmaengine_pcm.h> #include <sound/pcm_params.h> @@ -589,6 +590,7 @@ static int sun4i_i2s_probe(struct platform_device *pdev) { struct sun4i_i2s *i2s; struct resource *res;

• struct reset_control *reset_apb; void __iomem *regs; int irq, ret;

@@ -626,7 +628,19 @@ static int sun4i_i2s_probe(struct platform_device *pdev) dev_err(&pdev->dev, "Can't get our mod clock\n"); return PTR_ERR(i2s->mod_clk); }

• reset_apb = devm_reset_control_get(&pdev->dev, "apb_reset");

I believe this is a change in the Device Tree binding, since you're adding support for a new resource. Perhaps the Device Tree binding documentation should be updated accordingly?

Indeed.

You have two solutions to do that: - Either mark it as optional and use reset_control_get_optional (because here, you broke the other SoCs that have that controller but no reset line) - Or introduce a new compatible, and make the reset property mandatory for that new compatible.

I prefer the latter, since you get a stricter error check, and you cannot end up in a situation where your driver probes but is useless. But you'll find both in our drivers.

...

• }
• ret = reset_control_deassert(reset_apb);
• if (ret < 0) {

• dev_err(&pdev->dev, "Can't deassert apb reset (%d)\n", ret);
  

• return ret;
  

• }

Do you need to re-assert the reset line in the ->remove() hook?

Even better, you can add it to the runtime_pm hooks! :)

Maxime

On 4 October 2016 at 11:46, Mylène Josserand mylene.josserand@free-electrons.com wrote:

Add APB deassert function for sun4i-i2s driver.

Signed-off-by: Mylène Josserand mylene.josserand@free-electrons.com

sound/soc/sunxi/sun4i-i2s.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c index 687a8f8..f3f7026 100644 --- a/sound/soc/sunxi/sun4i-i2s.c +++ b/sound/soc/sunxi/sun4i-i2s.c @@ -17,6 +17,7 @@ #include <linux/platform_device.h> #include <linux/pm_runtime.h> #include <linux/regmap.h> +#include <linux/reset.h>

#include <sound/dmaengine_pcm.h> #include <sound/pcm_params.h> @@ -589,6 +590,7 @@ static int sun4i_i2s_probe(struct platform_device *pdev) { struct sun4i_i2s *i2s; struct resource *res;

•   struct reset_control *reset_apb;
    void __iomem *regs;
    int irq, ret;
  
  

@@ -626,7 +628,19 @@ static int sun4i_i2s_probe(struct platform_device *pdev) dev_err(&pdev->dev, "Can't get our mod clock\n"); return PTR_ERR(i2s->mod_clk); }

•   reset_apb = devm_reset_control_get(&pdev->dev, "apb_reset");
  

•   if (IS_ERR(reset_apb)) {
  

•           dev_err(&pdev->dev, "Can't get apb reset\n");
  

•           return PTR_ERR(i2s->mod_clk);
  

•   }
  

•   ret = reset_control_deassert(reset_apb);
  

•   if (ret < 0) {
  

•           dev_err(&pdev->dev, "Can't deassert apb reset (%d)\n", ret);
  

•           return ret;
  

•   }
  

Is this functionality only required for A31 and onwards?, CK

    i2s->playback_dma_data.addr = res->start + SUN4I_I2S_FIFO_TX_REG;
    i2s->playback_dma_data.maxburst = 4;

-- 2.9.3

---

linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

On 4 October 2016 at 11:46, Mylène Josserand mylene.josserand@free-electrons.com wrote:

Add the analog part of the sun8i (A33) codec driver. This driver implements all the analog part of the codec using PRCM registers.

The read/write regmap functions must be handled in a custom way as the PRCM register behaves as "mailbox" register.

Signed-off-by: Mylène Josserand mylene.josserand@free-electrons.com

sound/soc/sunxi/Kconfig | 7 + sound/soc/sunxi/Makefile | 1 + sound/soc/sunxi/sun8i-codec-analog.c | 304 +++++++++++++++++++++++++++++++++++ 3 files changed, 312 insertions(+) create mode 100644 sound/soc/sunxi/sun8i-codec-analog.c

diff --git a/sound/soc/sunxi/Kconfig b/sound/soc/sunxi/Kconfig index dd23682..7aee95a 100644 --- a/sound/soc/sunxi/Kconfig +++ b/sound/soc/sunxi/Kconfig @@ -26,4 +26,11 @@ config SND_SUN4I_SPDIF help Say Y or M to add support for the S/PDIF audio block in the Allwinner A10 and affiliated SoCs.

+config SND_SUN8I_CODEC_ANALOG

•   tristate "Allwinner SUN8I analog codec"
  

•   select REGMAP_MMIO
  

•    help
  

•     Say Y or M if you want to add sun8i analog audiocodec support
  

endmenu diff --git a/sound/soc/sunxi/Makefile b/sound/soc/sunxi/Makefile index 604c7b84..241c0df 100644 --- a/sound/soc/sunxi/Makefile +++ b/sound/soc/sunxi/Makefile @@ -1,3 +1,4 @@ obj-$(CONFIG_SND_SUN4I_CODEC) += sun4i-codec.o obj-$(CONFIG_SND_SUN4I_I2S) += sun4i-i2s.o obj-$(CONFIG_SND_SUN4I_SPDIF) += sun4i-spdif.o +obj-$(CONFIG_SND_SUN8I_CODEC_ANALOG) += sun8i-codec-analog.o diff --git a/sound/soc/sunxi/sun8i-codec-analog.c b/sound/soc/sunxi/sun8i-codec-analog.c new file mode 100644 index 0000000..be3d540 --- /dev/null +++ b/sound/soc/sunxi/sun8i-codec-analog.c @@ -0,0 +1,304 @@ +/*

• • This driver supports the analog controls for the internal codec
• • found in Allwinner's A31s, A33 and A23 SoCs.
• • Copyright 2016 Chen-Yu Tsai wens@csie.org
• • Copyright 2016 Mylène Josserand mylene.josserand@free-electrons.com
• • This program is free software; you can redistribute it and/or modify
• • it under the terms of the GNU General Public License as published by
• • the Free Software Foundation; either version 2 of the License, or
• • (at your option) any later version.
• • This program is distributed in the hope that it will be useful,
• • but WITHOUT ANY WARRANTY; without even the implied warranty of
• • MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
• • GNU General Public License for more details.
• */

+#include <linux/module.h> +#include <linux/io.h> +#include <linux/platform_device.h> +#include <linux/regmap.h>

+#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/tlv.h>

+/* Codec analog control register offsets and bit fields */ +#define SUN8I_ADDA_HP_VOLC 0x00 +#define SUN8I_ADDA_HP_VOLC_PA_CLK_GATE 7 +#define SUN8I_ADDA_HP_VOLC_HP_VOL 0 +#define SUN8I_ADDA_LOMIXSC 0x01 +#define SUN8I_ADDA_LOMIXSC_MIC1 6 +#define SUN8I_ADDA_LOMIXSC_MIC2 5 +#define SUN8I_ADDA_LOMIXSC_PHONE 4 +#define SUN8I_ADDA_LOMIXSC_PHONEN 3 +#define SUN8I_ADDA_LOMIXSC_LINEINL 2 +#define SUN8I_ADDA_LOMIXSC_DACL 1 +#define SUN8I_ADDA_LOMIXSC_DACR 0 +#define SUN8I_ADDA_ROMIXSC 0x02 +#define SUN8I_ADDA_ROMIXSC_MIC1 6 +#define SUN8I_ADDA_ROMIXSC_MIC2 5 +#define SUN8I_ADDA_ROMIXSC_PHONE 4 +#define SUN8I_ADDA_ROMIXSC_PHONEP 3 +#define SUN8I_ADDA_ROMIXSC_LINEINR 2 +#define SUN8I_ADDA_ROMIXSC_DACR 1 +#define SUN8I_ADDA_ROMIXSC_DACL 0 +#define SUN8I_ADDA_DAC_PA_SRC 0x03 +#define SUN8I_ADDA_DAC_PA_SRC_DACAREN 7 +#define SUN8I_ADDA_DAC_PA_SRC_DACALEN 6 +#define SUN8I_ADDA_DAC_PA_SRC_RMIXEN 5 +#define SUN8I_ADDA_DAC_PA_SRC_LMIXEN 4 +#define SUN8I_ADDA_DAC_PA_SRC_RHPPAMUTE 3 +#define SUN8I_ADDA_DAC_PA_SRC_LHPPAMUTE 2 +#define SUN8I_ADDA_DAC_PA_SRC_RHPIS 1 +#define SUN8I_ADDA_DAC_PA_SRC_LHPIS 0 +#define SUN8I_ADDA_PHONEIN_GCTRL 0x04 +#define SUN8I_ADDA_PHONEIN_GCTRL_PHONEPG 4 +#define SUN8I_ADDA_PHONEIN_GCTRL_PHONENG 0 +#define SUN8I_ADDA_LINEIN_GCTRL 0x05 +#define SUN8I_ADDA_LINEIN_GCTRL_LINEING 4 +#define SUN8I_ADDA_LINEIN_GCTRL_PHONEG 0 +#define SUN8I_ADDA_MICIN_GCTRL 0x06 +#define SUN8I_ADDA_MICIN_GCTRL_MIC1G 4 +#define SUN8I_ADDA_MICIN_GCTRL_MIC2G 0 +#define SUN8I_ADDA_PAEN_HP_CTRL 0x07 +#define SUN8I_ADDA_PAEN_HP_CTRL_HPPAEN 7 +#define SUN8I_ADDA_PAEN_HP_CTRL_HPCOM_FC 5 +#define SUN8I_ADDA_PAEN_HP_CTRL_COMPTEN 4 +#define SUN8I_ADDA_PAEN_HP_CTRL_PA_ANTI_POP_CTRL 2 +#define SUN8I_ADDA_PAEN_HP_CTRL_LTRNMUTE 1 +#define SUN8I_ADDA_PAEN_HP_CTRL_RTLNMUTE 0 +#define SUN8I_ADDA_PHONEOUT_CTRL 0x08 +#define SUN8I_ADDA_PHONEOUT_CTRL_PHONEOUTG 5 +#define SUN8I_ADDA_PHONEOUT_CTRL_PHONEOUTEN 4 +#define SUN8I_ADDA_PHONEOUT_CTRL_PHONEOUTS3 3 +#define SUN8I_ADDA_PHONEOUT_CTRL_PHONEOUTS2 2 +#define SUN8I_ADDA_PHONEOUT_CTRL_PHONEOUTS1 1 +#define SUN8I_ADDA_PHONEOUT_CTRL_PHONEOUTS0 0 +#define SUN8I_ADDA_PHONE_GAIN_CTRL 0x09 +#define SUN8I_ADDA_PHONE_GAIN_CTRL_PHONEPREG 0 +#define SUN8I_ADDA_MIC2G_CTRL 0x0a +#define SUN8I_ADDA_MIC2G_CTRL_MIC2AMPEN 7 +#define SUN8I_ADDA_MIC2G_CTRL_MIC2BOOST 4 +#define SUN8I_ADDA_MIC1G_MICBIAS_CTRL 0x0b +#define SUN8I_ADDA_MIC1G_MICBIAS_CTRL_HMICBIASEN 7 +#define SUN8I_ADDA_MIC1G_MICBIAS_CTRL_MMICBIASEN 6 +#define SUN8I_ADDA_MIC1G_MICBIAS_CTRL_HMICBIAS_MODE 5 +#define SUN8I_ADDA_MIC1G_MICBIAS_CTRL_MIC1AMPEN 3 +#define SUN8I_ADDA_MIC1G_MICBIAS_CTRL_MIC1BOOST 0 +#define SUN8I_ADDA_PA_ANTI_POP_CTRL 0x0e +#define SUN8I_ADDA_ADC_AP_EN 0x0f

+/* Analog control register access bits */ +#define ADDA_PR 0x0 /* PRCM base + 0x1c0 */ +#define ADDA_PR_RESET BIT(28) +#define ADDA_PR_WRITE BIT(24) +#define ADDA_PR_ADDR_SHIFT 16 +#define ADDA_PR_ADDR_MASK GENMASK(4, 0) +#define ADDA_PR_DATA_IN_SHIFT 8 +#define ADDA_PR_DATA_IN_MASK GENMASK(7, 0) +#define ADDA_PR_DATA_OUT_SHIFT 0 +#define ADDA_PR_DATA_OUT_MASK GENMASK(7, 0)

+/* regmap access bits */ +static int adda_reg_read(void *context, unsigned int reg, unsigned int *val) +{

•   void __iomem *base = context;
  

•   u32 tmp;
  

•   tmp = readl(base);
  

•   /* De-assert reset */
  

•   writel(tmp | ADDA_PR_RESET, base);
  

•   tmp &= ~(ADDA_PR_ADDR_MASK << ADDA_PR_ADDR_SHIFT);
  

•   tmp |= reg << ADDA_PR_ADDR_SHIFT;
  

•   writel(tmp, base);
  

•   *val = readl(base) & ADDA_PR_DATA_OUT_MASK;
  

•   return 0;
  

+}

+static int adda_reg_write(void *context, unsigned int reg, unsigned int val) +{

•   void __iomem *base = context;
  

•   u32 tmp;
  

•   tmp = readl(base);
  

•   /* De-assert reset */
  

•   writel(tmp | ADDA_PR_RESET, base);
  

•   /* Write the address */
  

•   tmp &= ~(ADDA_PR_ADDR_MASK << ADDA_PR_ADDR_SHIFT);
  

•   tmp |= reg << ADDA_PR_ADDR_SHIFT;
  

•   writel(tmp, base);
  

•   /* Write the value */
  

•   tmp &= ~(ADDA_PR_DATA_IN_MASK << ADDA_PR_DATA_IN_SHIFT);
  

•   tmp |= val << ADDA_PR_DATA_IN_SHIFT;
  

•   writel(tmp, base);
  

•   /* Indicate that the previous value must be written */
  

•   writel(readl(base) | ADDA_PR_WRITE, base);
  

•   /* Reset the write bit */
  

•   writel(readl(base) & ~(ADDA_PR_WRITE), base);
  

•   return 0;
  

+}

+struct regmap_config adda_pr_regmap_cfg = {

•   .name           = "adda-pr",
  

•   .reg_bits       = 5,
  

•   .reg_stride     = 1,
  

•   .val_bits       = 8,
  

•   .reg_read       = adda_reg_read,
  

•   .reg_write      = adda_reg_write,
  

•   .fast_io        = true,
  

•   .max_register   = 24,
  

+};

+static DECLARE_TLV_DB_SCALE(sun8i_codec_headphone_volume_scale, -6300, 100, 1);

+static const struct snd_kcontrol_new sun8i_analog_widgets[] = {

•   SOC_SINGLE_TLV("Headphone Volume", SUN8I_ADDA_HP_VOLC,
  

•                  SUN8I_ADDA_HP_VOLC_HP_VOL, 0x3F, 0,
  

•                  sun8i_codec_headphone_volume_scale),
  

•   /* Playback Switch */
  

•   SOC_DOUBLE("DAC Playback Switch", SUN8I_ADDA_DAC_PA_SRC,
  

•              SUN8I_ADDA_DAC_PA_SRC_DACALEN, SUN8I_ADDA_DAC_PA_SRC_DACAREN,
  

•              1, 0),
  

•   SOC_DOUBLE("Headphone Playback Switch", SUN8I_ADDA_DAC_PA_SRC,
  

•              SUN8I_ADDA_DAC_PA_SRC_LHPPAMUTE,
  

•              SUN8I_ADDA_DAC_PA_SRC_RHPPAMUTE, 1, 0),
  

+};

+/* headphone controls */ +static const char * const sun8i_codec_hp_src_enum_text[] = {

•   "DAC", "Mixer",
  

+};

+static SOC_ENUM_DOUBLE_DECL(sun8i_codec_hp_src_enum,

•                       SUN8I_ADDA_DAC_PA_SRC,
  

•                       SUN8I_ADDA_DAC_PA_SRC_LHPIS,
  

•                       SUN8I_ADDA_DAC_PA_SRC_RHPIS,
  

•                       sun8i_codec_hp_src_enum_text);
  

+static const struct snd_kcontrol_new sun8i_codec_hp_src[] = {

•   SOC_DAPM_ENUM("Headphone Source Playback Route",
  

•                 sun8i_codec_hp_src_enum),
  

+};

+static const struct snd_kcontrol_new sun8i_codec_mixer_controls[] = {

•   SOC_DAPM_SINGLE("DAC Left Playback Switch",
  

•                   SUN8I_ADDA_LOMIXSC,
  

•                   SUN8I_ADDA_LOMIXSC_DACL, 1, 0),
  

•   SOC_DAPM_SINGLE("DAC Right Playback Switch",
  

•                   SUN8I_ADDA_ROMIXSC,
  

•                   SUN8I_ADDA_ROMIXSC_DACR, 1, 0),
  

•   SOC_DAPM_SINGLE("DAC Reversed Left Playback Switch",
  

•                   SUN8I_ADDA_LOMIXSC,
  

•                   SUN8I_ADDA_LOMIXSC_DACR, 1, 0),
  

•   SOC_DAPM_SINGLE("DAC Reversed Right Playback Switch",
  

•                   SUN8I_ADDA_ROMIXSC,
  

•                   SUN8I_ADDA_ROMIXSC_DACL, 1, 0),
  

+};

+static const struct snd_soc_dapm_widget sun8i_codec_analog_dapm_widgets[] = {

•   /* Mixers */
  

•   SOC_MIXER_ARRAY("Left Mixer", SUN8I_ADDA_DAC_PA_SRC,
  

•                   SUN8I_ADDA_DAC_PA_SRC_LMIXEN, 0,
  

•                   sun8i_codec_mixer_controls),
  

•   SOC_MIXER_ARRAY("Right Mixer", SUN8I_ADDA_DAC_PA_SRC,
  

•                   SUN8I_ADDA_DAC_PA_SRC_RMIXEN, 0,
  

•                   sun8i_codec_mixer_controls),
  

•   /* Headphone output path */
  

•   SND_SOC_DAPM_MUX("Headphone Source Playback Route",
  

•                    SND_SOC_NOPM, 0, 0, sun8i_codec_hp_src),
  

•   SND_SOC_DAPM_OUT_DRV("Headphone Amp", SUN8I_ADDA_PAEN_HP_CTRL,
  

•                        SUN8I_ADDA_PAEN_HP_CTRL_HPPAEN, 0, NULL, 0),
  

•   /* Headphone outputs */
  

•   SND_SOC_DAPM_OUTPUT("HP"),
  

+};

+static const struct snd_soc_dapm_route sun8i_codec_analog_dapm_routes[] = {

•   /* Left Mixer Routes */
  

•   { "Left Mixer", "DAC Playback Switch", "Left DAC" },
  

•   { "Left Mixer", "DAC Reversed Left Playback Switch", "Right DAC" },
  

•   /* Right Mixer Routes */
  

•   { "Right Mixer", "DAC Playback Switch", "Right DAC" },
  

•   { "Right Mixer", "DAC Reversed Right Playback Switch", "Left DAC" },
  

•   /* Headphone Routes */
  

•   { "Headphone Source Playback Route", "DAC", "Left DAC" },
  

•   { "Headphone Source Playback Route", "DAC", "Right DAC" },
  

•   { "Headphone Source Playback Route", "Mixer", "Left Mixer" },
  

•   { "Headphone Source Playback Route", "Mixer", "Right Mixer" },
  

•   { "Headphone Amp", NULL, "Headphone Source Playback Route" },
  

•   { "HP", NULL, "Headphone Amp" },
  

+};

+static const struct snd_soc_component_driver sun8i_codec_analog_cmpnt_drv = {

•   .name                   = "sun8i-codec-analog",
  

•   .controls               = sun8i_analog_widgets,
  

•   .num_controls           = ARRAY_SIZE(sun8i_analog_widgets),
  

•   .dapm_widgets           = sun8i_codec_analog_dapm_widgets,
  

•   .num_dapm_widgets       = ARRAY_SIZE(sun8i_codec_analog_dapm_widgets),
  

•   .dapm_routes            = sun8i_codec_analog_dapm_routes,
  

•   .num_dapm_routes        = ARRAY_SIZE(sun8i_codec_analog_dapm_routes),
  

+};

+static const struct of_device_id sun8i_codec_analog_of_match[] = {

•   { .compatible = "allwinner,sun8i-codec-analog", },
  

•   {}
  

+}; +MODULE_DEVICE_TABLE(of, sun8i_codec_analog_of_match);

+static int sun8i_codec_analog_probe(struct platform_device *pdev) +{

•   struct resource *res;
  

•   struct regmap *regmap;
  

•   void __iomem *base;
  

•   /* Get PRCM resources and registers */
  

•   res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  

•   base = devm_ioremap_resource(&pdev->dev, res);
  

•   if (IS_ERR(base)) {
  

•           dev_err(&pdev->dev, "Failed to map PRCM registers\n");
  

•           return PTR_ERR(base);
  

•   }
  

•   regmap = devm_regmap_init(&pdev->dev, NULL, base, &adda_pr_regmap_cfg);
  

•   if (IS_ERR(regmap)) {
  

•           dev_err(&pdev->dev, "Regmap initialisation failed\n");
  

•           return PTR_ERR(regmap);
  

•   }
  

•   return devm_snd_soc_register_component(&pdev->dev,
  

•                                          &sun8i_codec_analog_cmpnt_drv,
  

•                                          NULL, 0);
  

+}

+static struct platform_driver sun8i_codec_analog_driver = {

•   .driver = {
  

•           .name = "sun8i-codec-analog",
  

•           .of_match_table = sun8i_codec_analog_of_match,
  

•   },
  

•   .probe = sun8i_codec_analog_probe,
  

+}; +module_platform_driver(sun8i_codec_analog_driver);

+MODULE_DESCRIPTION("Allwinner A31s/A33/A23 codec analog controls driver");

Does the A31s have the prcm for the codec?, as I was under the impression that it was the same as the A31 and I can't seem to find a datasheet for that SoC. You could also add H3 and A64 here. CK

+MODULE_AUTHOR("Chen-Yu Tsai wens@csie.org"); +MODULE_AUTHOR("Mylène Josserand mylene.josserand@free-electrons.com"); +MODULE_LICENSE("GPL");

+MODULE_ALIAS("platform:sun8i-codec-analog");

2.9.3

---

linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

On Tue, 04 Oct 2016, Mylène Josserand wrote:

The sun8i audio codec is using PRCM registers to configure all the analog part of the audio codec. It is added as a subnode of the PRCM with his resource (offset of 0x1c0).

Signed-off-by: Mylène Josserand mylene.josserand@free-electrons.com

drivers/mfd/sun6i-prcm.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)

diff --git a/drivers/mfd/sun6i-prcm.c b/drivers/mfd/sun6i-prcm.c index 011fcc5..e0c6bf5 100644 --- a/drivers/mfd/sun6i-prcm.c +++ b/drivers/mfd/sun6i-prcm.c @@ -12,6 +12,8 @@ #include <linux/init.h> #include <linux/of.h>

+#define SUN6I_AUDIO_CODEC_ANALOG 0x1c0

struct prcm_data { int nsubdevs; const struct mfd_cell *subdevs; @@ -57,6 +59,14 @@ static const struct resource sun6i_a31_apb0_rstc_res[] = { }, };

+static const struct resource sun8i_adda_res[] = {

• {

• .start = SUN6I_AUDIO_CODEC_ANALOG,
  

• .end = 0x1c3,
  

This also needs defining. No magic numbers please.

• .flags = IORESOURCE_MEM,
  

• },

+};

static const struct mfd_cell sun6i_a31_prcm_subdevs[] = { { .name = "sun6i-a31-ar100-clk", @@ -109,6 +119,12 @@ static const struct mfd_cell sun8i_a23_prcm_subdevs[] = { .num_resources = ARRAY_SIZE(sun6i_a31_apb0_rstc_res), .resources = sun6i_a31_apb0_rstc_res, },

• {

• .name = "sun8i-codec-analog",
  

• .of_compatible = "allwinner,sun8i-codec-analog",
  

• .num_resources = ARRAY_SIZE(sun8i_adda_res),
  

• .resources = sun8i_adda_res,
  

• },

};

static const struct prcm_data sun6i_a31_prcm_data = {

Hello,

On Tue, 4 Oct 2016 11:46:19 +0200, Mylène Josserand wrote:

Add the digital sun8i audio codec which handles the base register (without DAI).

I'm not sure what you mean by "which handles the base register".

diff --git a/sound/soc/sunxi/Kconfig b/sound/soc/sunxi/Kconfig index 7aee95a..9e287b0 100644 --- a/sound/soc/sunxi/Kconfig +++ b/sound/soc/sunxi/Kconfig @@ -27,6 +27,15 @@ config SND_SUN4I_SPDIF Say Y or M to add support for the S/PDIF audio block in the Allwinner A10 and affiliated SoCs.

+config SND_SUN8I_CODEC

• tristate "Allwinner SUN8I audio codec"
• select REGMAP_MMIO

•    help
  

Indentation issue here, it should be intended with one tab, not spaces.

You probably also want a "depends on OF" here.

+/* CODEC_OFFSET represents the offset of the codec registers

• • and not all the DAI registers
• */

This is not the proper comment style I believe for audio code, it should be:

/* * ... */

+#define CODEC_OFFSET 0x200

Do you really need this CODEC_OFFSET macro? Why not simply use directly the right offsets? I.e instead of:

#define SUN8I_SYSCLK_CTL (0x20c - CODEC_OFFSET)

use:

#define SUN8I_SYSCLK_CTL 0xc

+#define CODEC_BASSADDRESS 0x01c22c00

This define is not used anywhere.

+#define SUN8I_SYSCLK_CTL (0x20c - CODEC_OFFSET) +#define SUN8I_SYSCLK_CTL_AIF1CLK_ENA (11) +#define SUN8I_SYSCLK_CTL_SYSCLK_ENA (3) +#define SUN8I_SYSCLK_CTL_SYSCLK_SRC (0)

Parenthesis around single values are not really useful.

+#define SUN8I_MOD_CLK_ENA (0x210 - CODEC_OFFSET) +#define SUN8I_MOD_CLK_ENA_AIF1 (15) +#define SUN8I_MOD_CLK_ENA_DAC (2) +#define SUN8I_MOD_RST_CTL (0x214 - CODEC_OFFSET) +#define SUN8I_MOD_RST_CTL_AIF1 (15) +#define SUN8I_MOD_RST_CTL_DAC (2) +#define SUN8I_SYS_SR_CTRL (0x218 - CODEC_OFFSET) +#define SUN8I_SYS_SR_CTRL_AIF1_FS (12) +#define SUN8I_SYS_SR_CTRL_AIF2_FS (8) +#define SUN8I_AIF1CLK_CTRL (0x240 - CODEC_OFFSET) +#define SUN8I_AIF1CLK_CTRL_AIF1_MSTR_MOD (15) +#define SUN8I_AIF1CLK_CTRL_AIF1_BCLK_INV (14) +#define SUN8I_AIF1CLK_CTRL_AIF1_LRCK_INV (13) +#define SUN8I_AIF1CLK_CTRL_AIF1_BCLK_DIV (9) +#define SUN8I_AIF1CLK_CTRL_AIF1_LRCK_DIV (6) +#define SUN8I_AIF1CLK_CTRL_AIF1_WORD_SIZ (4) +#define SUN8I_AIF1CLK_CTRL_AIF1_DATA_FMT (2) +#define SUN8I_AIF1_DACDAT_CTRL (0x248 - CODEC_OFFSET) +#define SUN8I_AIF1_DACDAT_CTRL_AIF1_DA0L_ENA (15) +#define SUN8I_AIF1_DACDAT_CTRL_AIF1_DA0R_ENA (14) +#define SUN8I_DAC_DIG_CTRL (0x320 - CODEC_OFFSET) +#define SUN8I_DAC_DIG_CTRL_ENDA (15) +#define SUN8I_DAC_MXR_SRC (0x330 - CODEC_OFFSET) +#define SUN8I_DAC_MXR_SRC_DACL_MXR_SRC_AIF1DA0L (15) +#define SUN8I_DAC_MXR_SRC_DACL_MXR_SRC_AIF1DA1L (14) +#define SUN8I_DAC_MXR_SRC_DACL_MXR_SRC_AIF2DACL (13) +#define SUN8I_DAC_MXR_SRC_DACL_MXR_SRC_ADCL (12) +#define SUN8I_DAC_MXR_SRC_DACR_MXR_SRC_AIF1DA0R (11) +#define SUN8I_DAC_MXR_SRC_DACR_MXR_SRC_AIF1DA1R (10) +#define SUN8I_DAC_MXR_SRC_DACR_MXR_SRC_AIF2DACR (9) +#define SUN8I_DAC_MXR_SRC_DACR_MXR_SRC_ADCR (8)

Indentation of the value is not very clean for those last defines.

+static int sun8i_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{

• struct sun8i_codec *scodec = snd_soc_codec_get_drvdata(dai->codec);
• unsigned long value;

I'm not sure "unsigned long" is a very good choice here, it's going to be a 64 bits integer on 64 bits platform. I'd suggest to use "u32", which also seems to be what's used in _set_fmt() function of the sun4i-i2s.c driver.

+static int sun8i_codec_hw_params(struct snd_pcm_substream *substream,

• 		 struct snd_pcm_hw_params *params,
  

• 		 struct snd_soc_dai *dai)
  

+{

• int rs_value = 0;

Two spaces before the = sign, not needed. Is the initialization to 0 really needed? Also, this should be a u32.

• regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL,

• 	   0x3 << SUN8I_AIF1CLK_CTRL_AIF1_WORD_SIZ,
  

Maybe a #define value to replace the hardcoded 0x3 ?

• 	   rs_value << SUN8I_AIF1CLK_CTRL_AIF1_WORD_SIZ);
  

• /* calculate bclk_lrck_div Ratio */
• bclk_lrck_div = sample_resolution * 2;
• switch (bclk_lrck_div) {
• case 16:

• bclk_lrck_div = 0;
  

• break;
  

• case 32:

• bclk_lrck_div = 1;
  

• break;
  

• case 64:

• bclk_lrck_div = 2;
  

• break;
  

• case 128:

• bclk_lrck_div = 3;
  

• break;
  

• case 256:

• bclk_lrck_div = 4;
  

• break;
  

This could quite easily be replaced by a formula, if you don't care about error checking:

bclk_lrck_div = log2(bclk_lrck_div) - 4;

Of course, if you care about error checking, this switch is nicer.

• default:

So there's no error checking if the value is not supported?

• break;
  

• }
• regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL,

• 	   0x7 << SUN8I_AIF1CLK_CTRL_AIF1_LRCK_DIV,
  

#define to replace the hard-coded 0x7 ?

• 	   bclk_lrck_div << SUN8I_AIF1CLK_CTRL_AIF1_LRCK_DIV);
  

• sample_rate = sun8i_codec_get_hw_rate(params);
• if (sample_rate < 0)

• return sample_rate;
  

• regmap_update_bits(scodec->regmap, SUN8I_SYS_SR_CTRL,

• 	   0xf << SUN8I_SYS_SR_CTRL_AIF1_FS,
  

Ditto 0xf

• 	   sample_rate << SUN8I_SYS_SR_CTRL_AIF1_FS);
  

• regmap_update_bits(scodec->regmap, SUN8I_SYS_SR_CTRL,

• 	   0xf << SUN8I_SYS_SR_CTRL_AIF2_FS,
  

Ditto 0xf.

+static struct snd_soc_dai_driver sun8i_codec_dai = {

• .name = "sun8i",
• /* playback capabilities */
• .playback = {

• .stream_name = "Playback",
  

• .channels_min = 1,
  

• .channels_max = 2,
  

• .rates = SNDRV_PCM_RATE_8000_192000 |
  

• 	SNDRV_PCM_RATE_KNOT,
  

• .formats = SNDRV_PCM_FMTBIT_S8 |
  

• 	SNDRV_PCM_FMTBIT_S16_LE |
  

• 	SNDRV_PCM_FMTBIT_S18_3LE |
  

• 	SNDRV_PCM_FMTBIT_S20_3LE |
  

• 	SNDRV_PCM_FMTBIT_S24_LE |
  

• 	SNDRV_PCM_FMTBIT_S32_LE,
  

• },
• /* pcm operations */
• .ops = &sun8i_codec_dai_ops,

+}; +EXPORT_SYMBOL(sun8i_codec_dai);

This EXPORT_SYMBOL looks wrong. First because it doesn't seem to be used outside of this module. And second because using EXPORT_SYMBOL on a function defined as static doesn't make much sense, as the "static" qualifier limits the visibility of the symbol to the current compilation unit.

+static int sun8i_soc_probe(struct snd_soc_codec *codec) +{

• return 0;

+}

+/* power down chip */ +static int sun8i_soc_remove(struct snd_soc_codec *codec) +{

• return 0;

+}

I believe you can remove those stub functions.

+static struct snd_soc_codec_driver sun8i_soc_codec = {

• .probe = sun8i_soc_probe,
• .remove = sun8i_soc_remove,

And remove these.

• .component_driver = {

• .dapm_widgets		= sun8i_codec_dapm_widgets,
  

• .num_dapm_widgets	= ARRAY_SIZE(sun8i_codec_dapm_widgets),
  

• .dapm_routes		= sun8i_codec_dapm_routes,
  

• .num_dapm_routes	= ARRAY_SIZE(sun8i_codec_dapm_routes),
  

I'm probably missing something, but in the sun4i-codec.c driver, those fields are initialized directly in the snd_soc_codec_driver structure, not in the .component_driver sub-structure.

+static int sun8i_codec_probe(struct platform_device *pdev) +{

• struct resource *res_base;
• struct sun8i_codec *scodec;
• void __iomem *base;
• scodec = devm_kzalloc(&pdev->dev, sizeof(*scodec), GFP_KERNEL);
• if (!scodec)

• return -ENOMEM;
  

• scodec->dev = &pdev->dev;
• /* Get the clocks from the DT */
• scodec->clk_module = devm_clk_get(&pdev->dev, "codec");
• if (IS_ERR(scodec->clk_module)) {

• dev_err(&pdev->dev, "Failed to get the module clock\n");
  

• return PTR_ERR(scodec->clk_module);
  

• }
• if (clk_prepare_enable(scodec->clk_module))

• pr_err("err:open failed;\n");
  

Grr, pr_err, not good. Plus you want to return with an error from the probe() function.

• scodec->clk_apb = devm_clk_get(&pdev->dev, "apb");
• if (IS_ERR(scodec->clk_apb)) {

• dev_err(&pdev->dev, "Failed to get the apb clock\n");
  

• return PTR_ERR(scodec->clk_apb);
  

• }
• if (clk_prepare_enable(scodec->clk_apb))

• pr_err("err:open failed;\n");
  

Ditto. + unprepare/disable the previous clock.

• /* Get base resources, registers and regmap */
• res_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "audio");
• base = devm_ioremap_resource(&pdev->dev, res_base);
• if (IS_ERR(base)) {

• dev_err(&pdev->dev, "Failed to map the registers\n");
  

• return PTR_ERR(base);
  

• }
• scodec->regmap = devm_regmap_init_mmio(&pdev->dev, base,

• 			       &sun8i_codec_regmap_config);
  

• if (IS_ERR(scodec->regmap)) {

• dev_err(&pdev->dev, "Failed to create our regmap\n");
  

• return PTR_ERR(scodec->regmap);
  

• }
• /* Set the codec data as driver data */
• dev_set_drvdata(&pdev->dev, scodec);

Use:

platform_set_drvdata(pdev, scodec)

• snd_soc_register_codec(&pdev->dev, &sun8i_soc_codec, &sun8i_codec_dai,

• 	       1);
  

That's a matter of taste, but I find the "1" alone on its own line a bit weird. Maybe move &sun8i_codec_dai on the second line as well. But again, it's mainly a matter of taste, so Mark might disagree here.

• return 0;

+}

+static int sun8i_codec_remove(struct platform_device *pdev) +{

• struct snd_soc_card *card = platform_get_drvdata(pdev);
• struct sun8i_codec *scodec = snd_soc_card_get_drvdata(card);
• snd_soc_unregister_codec(&pdev->dev);
• clk_disable_unprepare(scodec->clk_module);
• clk_disable_unprepare(scodec->clk_apb);
• return 0;

+}

+static const struct of_device_id sun8i_codec_of_match[] = {

• { .compatible = "allwinner,sun8i-a33-codec" },
• { .compatible = "allwinner,sun8i-a23-codec" },
• {}

+}; +MODULE_DEVICE_TABLE(of, sun8i_codec_of_match);

+static struct platform_driver sun8i_codec_driver = {

• .driver = {

• .name = "sun8i-codec",
  

• .owner = THIS_MODULE,
  

• .of_match_table = sun8i_codec_of_match,
  

• },
• .probe = sun8i_codec_probe,
• .remove = sun8i_codec_remove,

+}; +module_platform_driver(sun8i_codec_driver);

+MODULE_DESCRIPTION("Allwinner A33 (sun8i) codec driver"); +MODULE_AUTHOR("huanxinhuanxin@reuuimllatech.com");

Space between the name and the e-mail address.

+MODULE_AUTHOR("Mylène Josserand mylene.josserand@free-electrons.com"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:sun8i-codec");

Thanks,

Thomas

Hello,

On 04/10/2016 14:40, Thomas Petazzoni wrote:

Hello,

On Tue, 4 Oct 2016 11:46:19 +0200, Mylène Josserand wrote:

...

Add the digital sun8i audio codec which handles the base register (without DAI).

I'm not sure what you mean by "which handles the base register".

I wanted to explain that it is registers for audio codec and not PRCM ones. This is, maybe, unclear (and useless ?).

...

diff --git a/sound/soc/sunxi/Kconfig b/sound/soc/sunxi/Kconfig index 7aee95a..9e287b0 100644 --- a/sound/soc/sunxi/Kconfig +++ b/sound/soc/sunxi/Kconfig @@ -27,6 +27,15 @@ config SND_SUN4I_SPDIF Say Y or M to add support for the S/PDIF audio block in the Allwinner A10 and affiliated SoCs.

+config SND_SUN8I_CODEC

• tristate "Allwinner SUN8I audio codec"
• select REGMAP_MMIO

•    help
  

Indentation issue here, it should be intended with one tab, not spaces.

You probably also want a "depends on OF" here.

Yes, thanks !

...

+/* CODEC_OFFSET represents the offset of the codec registers

• • and not all the DAI registers
• */

This is not the proper comment style I believe for audio code, it should be:

/*

• ...

*/

...

+#define CODEC_OFFSET 0x200

Do you really need this CODEC_OFFSET macro? Why not simply use directly the right offsets? I.e instead of:

#define SUN8I_SYSCLK_CTL (0x20c - CODEC_OFFSET)

use:

#define SUN8I_SYSCLK_CTL 0xc

I thought it could be easier to find registers using offset but I guess that register's names are enough.

...

+#define CODEC_BASSADDRESS 0x01c22c00

This define is not used anywhere.

Yes, sorry, I forgot to remove it.

...

+#define SUN8I_SYSCLK_CTL (0x20c - CODEC_OFFSET) +#define SUN8I_SYSCLK_CTL_AIF1CLK_ENA (11) +#define SUN8I_SYSCLK_CTL_SYSCLK_ENA (3) +#define SUN8I_SYSCLK_CTL_SYSCLK_SRC (0)

Parenthesis around single values are not really useful.

...

+#define SUN8I_MOD_CLK_ENA (0x210 - CODEC_OFFSET) +#define SUN8I_MOD_CLK_ENA_AIF1 (15) +#define SUN8I_MOD_CLK_ENA_DAC (2) +#define SUN8I_MOD_RST_CTL (0x214 - CODEC_OFFSET) +#define SUN8I_MOD_RST_CTL_AIF1 (15) +#define SUN8I_MOD_RST_CTL_DAC (2) +#define SUN8I_SYS_SR_CTRL (0x218 - CODEC_OFFSET) +#define SUN8I_SYS_SR_CTRL_AIF1_FS (12) +#define SUN8I_SYS_SR_CTRL_AIF2_FS (8) +#define SUN8I_AIF1CLK_CTRL (0x240 - CODEC_OFFSET) +#define SUN8I_AIF1CLK_CTRL_AIF1_MSTR_MOD (15) +#define SUN8I_AIF1CLK_CTRL_AIF1_BCLK_INV (14) +#define SUN8I_AIF1CLK_CTRL_AIF1_LRCK_INV (13) +#define SUN8I_AIF1CLK_CTRL_AIF1_BCLK_DIV (9) +#define SUN8I_AIF1CLK_CTRL_AIF1_LRCK_DIV (6) +#define SUN8I_AIF1CLK_CTRL_AIF1_WORD_SIZ (4) +#define SUN8I_AIF1CLK_CTRL_AIF1_DATA_FMT (2) +#define SUN8I_AIF1_DACDAT_CTRL (0x248 - CODEC_OFFSET) +#define SUN8I_AIF1_DACDAT_CTRL_AIF1_DA0L_ENA (15) +#define SUN8I_AIF1_DACDAT_CTRL_AIF1_DA0R_ENA (14) +#define SUN8I_DAC_DIG_CTRL (0x320 - CODEC_OFFSET) +#define SUN8I_DAC_DIG_CTRL_ENDA (15) +#define SUN8I_DAC_MXR_SRC (0x330 - CODEC_OFFSET) +#define SUN8I_DAC_MXR_SRC_DACL_MXR_SRC_AIF1DA0L (15) +#define SUN8I_DAC_MXR_SRC_DACL_MXR_SRC_AIF1DA1L (14) +#define SUN8I_DAC_MXR_SRC_DACL_MXR_SRC_AIF2DACL (13) +#define SUN8I_DAC_MXR_SRC_DACL_MXR_SRC_ADCL (12) +#define SUN8I_DAC_MXR_SRC_DACR_MXR_SRC_AIF1DA0R (11) +#define SUN8I_DAC_MXR_SRC_DACR_MXR_SRC_AIF1DA1R (10) +#define SUN8I_DAC_MXR_SRC_DACR_MXR_SRC_AIF2DACR (9) +#define SUN8I_DAC_MXR_SRC_DACR_MXR_SRC_ADCR (8)

Indentation of the value is not very clean for those last defines.

...

+static int sun8i_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{

• struct sun8i_codec *scodec = snd_soc_codec_get_drvdata(dai->codec);
• unsigned long value;

I'm not sure "unsigned long" is a very good choice here, it's going to be a 64 bits integer on 64 bits platform. I'd suggest to use "u32", which also seems to be what's used in _set_fmt() function of the sun4i-i2s.c driver.

Agreed, thanks !

...

+static int sun8i_codec_hw_params(struct snd_pcm_substream *substream,

• 		 struct snd_pcm_hw_params *params,
  

• 		 struct snd_soc_dai *dai)
  

+{

• int rs_value = 0;

Two spaces before the = sign, not needed. Is the initialization to 0 really needed? Also, this should be a u32.

ditto

...

• regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL,

• 	   0x3 << SUN8I_AIF1CLK_CTRL_AIF1_WORD_SIZ,
  

Maybe a #define value to replace the hardcoded 0x3 ?

...

• 	   rs_value << SUN8I_AIF1CLK_CTRL_AIF1_WORD_SIZ);
  

• /* calculate bclk_lrck_div Ratio */
• bclk_lrck_div = sample_resolution * 2;
• switch (bclk_lrck_div) {
• case 16:

• bclk_lrck_div = 0;
  

• break;
  

• case 32:

• bclk_lrck_div = 1;
  

• break;
  

• case 64:

• bclk_lrck_div = 2;
  

• break;
  

• case 128:

• bclk_lrck_div = 3;
  

• break;
  

• case 256:

• bclk_lrck_div = 4;
  

• break;
  

This could quite easily be replaced by a formula, if you don't care about error checking:

bclk_lrck_div = log2(bclk_lrck_div) - 4;

Of course, if you care about error checking, this switch is nicer.

...

• default:

So there's no error checking if the value is not supported?

You are right. I guess it should return -EINVAL.

[snip]

...

+static struct snd_soc_dai_driver sun8i_codec_dai = {

• .name = "sun8i",
• /* playback capabilities */
• .playback = {

• .stream_name = "Playback",
  

• .channels_min = 1,
  

• .channels_max = 2,
  

• .rates = SNDRV_PCM_RATE_8000_192000 |
  

• 	SNDRV_PCM_RATE_KNOT,
  

• .formats = SNDRV_PCM_FMTBIT_S8 |
  

• 	SNDRV_PCM_FMTBIT_S16_LE |
  

• 	SNDRV_PCM_FMTBIT_S18_3LE |
  

• 	SNDRV_PCM_FMTBIT_S20_3LE |
  

• 	SNDRV_PCM_FMTBIT_S24_LE |
  

• 	SNDRV_PCM_FMTBIT_S32_LE,
  

• },
• /* pcm operations */
• .ops = &sun8i_codec_dai_ops,

+}; +EXPORT_SYMBOL(sun8i_codec_dai);

This EXPORT_SYMBOL looks wrong. First because it doesn't seem to be used outside of this module. And second because using EXPORT_SYMBOL on a function defined as static doesn't make much sense, as the "static" qualifier limits the visibility of the symbol to the current compilation unit.

Yes, sorry, I missed it from the clean-up of the original driver.

[snip]

...

+static int sun8i_codec_probe(struct platform_device *pdev) +{

• struct resource *res_base;
• struct sun8i_codec *scodec;
• void __iomem *base;
• scodec = devm_kzalloc(&pdev->dev, sizeof(*scodec), GFP_KERNEL);
• if (!scodec)

• return -ENOMEM;
  

• scodec->dev = &pdev->dev;
• /* Get the clocks from the DT */
• scodec->clk_module = devm_clk_get(&pdev->dev, "codec");
• if (IS_ERR(scodec->clk_module)) {

• dev_err(&pdev->dev, "Failed to get the module clock\n");
  

• return PTR_ERR(scodec->clk_module);
  

• }
• if (clk_prepare_enable(scodec->clk_module))

• pr_err("err:open failed;\n");
  

Grr, pr_err, not good. Plus you want to return with an error from the probe() function.

Oh, sorry for that ugly use :(

...

• scodec->clk_apb = devm_clk_get(&pdev->dev, "apb");
• if (IS_ERR(scodec->clk_apb)) {

• dev_err(&pdev->dev, "Failed to get the apb clock\n");
  

• return PTR_ERR(scodec->clk_apb);
  

• }
• if (clk_prepare_enable(scodec->clk_apb))

• pr_err("err:open failed;\n");
  

Ditto. + unprepare/disable the previous clock.

[snip]

ack, thank you for the review!

04.10.2016, 17:54, "Mylène Josserand" mylene.josserand@free-electrons.com:

Add the digital sun8i audio codec which handles the base register (without DAI). The driver handles only the basic playback of the A33 codec, from the DAC to the headphones. All other features (microphone, capture, etc) will be added later.

Signed-off-by: Mylène Josserand mylene.josserand@free-electrons.com

sound/soc/sunxi/Kconfig | 9 +  sound/soc/sunxi/Makefile | 1 +  sound/soc/sunxi/sun8i-codec.c | 492 ++++++++++++++++++++++++++++++++++++++++++  3 files changed, 502 insertions(+)  create mode 100644 sound/soc/sunxi/sun8i-codec.c

diff --git a/sound/soc/sunxi/Kconfig b/sound/soc/sunxi/Kconfig index 7aee95a..9e287b0 100644 --- a/sound/soc/sunxi/Kconfig +++ b/sound/soc/sunxi/Kconfig @@ -27,6 +27,15 @@ config SND_SUN4I_SPDIF            Say Y or M to add support for the S/PDIF audio block in the Allwinner            A10 and affiliated SoCs.

+config SND_SUN8I_CODEC

• tristate "Allwinner SUN8I audio codec"
• select REGMAP_MMIO
• help
• This option enables the digital part of the internal audio codec for
• Allwinner sun8i SoC.
• Say Y or M if you want to add sun8i digital audio codec support.

config SND_SUN8I_CODEC_ANALOG          tristate "Allwinner SUN8I analog codec"          select REGMAP_MMIO diff --git a/sound/soc/sunxi/Makefile b/sound/soc/sunxi/Makefile index 241c0df..1da63d3 100644 --- a/sound/soc/sunxi/Makefile +++ b/sound/soc/sunxi/Makefile @@ -1,4 +1,5 @@  obj-$(CONFIG_SND_SUN4I_CODEC) += sun4i-codec.o  obj-$(CONFIG_SND_SUN4I_I2S) += sun4i-i2s.o  obj-$(CONFIG_SND_SUN4I_SPDIF) += sun4i-spdif.o +obj-$(CONFIG_SND_SUN8I_CODEC) += sun8i-codec.o  obj-$(CONFIG_SND_SUN8I_CODEC_ANALOG) += sun8i-codec-analog.o diff --git a/sound/soc/sunxi/sun8i-codec.c b/sound/soc/sunxi/sun8i-codec.c new file mode 100644 index 0000000..e157f89 --- /dev/null +++ b/sound/soc/sunxi/sun8i-codec.c @@ -0,0 +1,492 @@ +/*

• • This driver supports the digital controls for the internal codec
• • found in Allwinner's A33 and A23 SoCs.
• • (C) Copyright 2010-2016
• • Reuuimlla Technology Co., Ltd. <www.reuuimllatech.com>
• • huangxin huangxin@Reuuimllatech.com
• • Mylène Josserand mylene.josserand@free-electrons.com
• • This program is free software; you can redistribute it and/or modify
• • it under the terms of the GNU General Public License as published by
• • the Free Software Foundation; either version 2 of the License, or
• • (at your option) any later version.
• • This program is distributed in the hope that it will be useful,
• • but WITHOUT ANY WARRANTY; without even the implied warranty of
• • MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
• • GNU General Public License for more details.
• */

+#include <linux/module.h> +#include <linux/delay.h> +#include <linux/clk.h> +#include <linux/io.h> +#include <linux/regmap.h>

+#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h>

+/* CODEC_OFFSET represents the offset of the codec registers

• • and not all the DAI registers
• */

+#define CODEC_OFFSET 0x200 +#define CODEC_BASSADDRESS 0x01c22c00

I don't think this kind of absolute address should exist here... It should exist in device tree...

+#define SUN8I_SYSCLK_CTL (0x20c - CODEC_OFFSET) +#define SUN8I_SYSCLK_CTL_AIF1CLK_ENA (11) +#define SUN8I_SYSCLK_CTL_SYSCLK_ENA (3) +#define SUN8I_SYSCLK_CTL_SYSCLK_SRC (0) +#define SUN8I_MOD_CLK_ENA (0x210 - CODEC_OFFSET) +#define SUN8I_MOD_CLK_ENA_AIF1 (15) +#define SUN8I_MOD_CLK_ENA_DAC (2) +#define SUN8I_MOD_RST_CTL (0x214 - CODEC_OFFSET) +#define SUN8I_MOD_RST_CTL_AIF1 (15) +#define SUN8I_MOD_RST_CTL_DAC (2) +#define SUN8I_SYS_SR_CTRL (0x218 - CODEC_OFFSET) +#define SUN8I_SYS_SR_CTRL_AIF1_FS (12) +#define SUN8I_SYS_SR_CTRL_AIF2_FS (8) +#define SUN8I_AIF1CLK_CTRL (0x240 - CODEC_OFFSET) +#define SUN8I_AIF1CLK_CTRL_AIF1_MSTR_MOD (15) +#define SUN8I_AIF1CLK_CTRL_AIF1_BCLK_INV (14) +#define SUN8I_AIF1CLK_CTRL_AIF1_LRCK_INV (13) +#define SUN8I_AIF1CLK_CTRL_AIF1_BCLK_DIV (9) +#define SUN8I_AIF1CLK_CTRL_AIF1_LRCK_DIV (6) +#define SUN8I_AIF1CLK_CTRL_AIF1_WORD_SIZ (4) +#define SUN8I_AIF1CLK_CTRL_AIF1_DATA_FMT (2) +#define SUN8I_AIF1_DACDAT_CTRL (0x248 - CODEC_OFFSET) +#define SUN8I_AIF1_DACDAT_CTRL_AIF1_DA0L_ENA (15) +#define SUN8I_AIF1_DACDAT_CTRL_AIF1_DA0R_ENA (14) +#define SUN8I_DAC_DIG_CTRL (0x320 - CODEC_OFFSET) +#define SUN8I_DAC_DIG_CTRL_ENDA (15) +#define SUN8I_DAC_MXR_SRC (0x330 - CODEC_OFFSET) +#define SUN8I_DAC_MXR_SRC_DACL_MXR_SRC_AIF1DA0L (15) +#define SUN8I_DAC_MXR_SRC_DACL_MXR_SRC_AIF1DA1L (14) +#define SUN8I_DAC_MXR_SRC_DACL_MXR_SRC_AIF2DACL (13) +#define SUN8I_DAC_MXR_SRC_DACL_MXR_SRC_ADCL (12) +#define SUN8I_DAC_MXR_SRC_DACR_MXR_SRC_AIF1DA0R (11) +#define SUN8I_DAC_MXR_SRC_DACR_MXR_SRC_AIF1DA1R (10) +#define SUN8I_DAC_MXR_SRC_DACR_MXR_SRC_AIF2DACR (9) +#define SUN8I_DAC_MXR_SRC_DACR_MXR_SRC_ADCR (8)

+struct sun8i_codec {

• struct device *dev;
• struct regmap *regmap;
• struct clk *clk_module;
• struct clk *clk_apb;

+};

+static int sun8i_codec_get_hw_rate(struct snd_pcm_hw_params *params) +{

• unsigned int rate = params_rate(params);
• switch (rate) {
• case 8000:
• case 7350:
• return 0x0;
• case 11025:
• return 0x1;
• case 12000:
• return 0x2;
• case 16000:
• return 0x3;
• case 22050:
• return 0x4;
• case 24000:
• return 0x5;
• case 32000:
• return 0x6;
• case 44100:
• return 0x7;
• case 48000:
• return 0x8;
• case 96000:
• return 0x9;
• case 192000:
• return 0xa;
• default:
• return -EINVAL;
• }

+}

+static int sun8i_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{

• struct sun8i_codec *scodec = snd_soc_codec_get_drvdata(dai->codec);
• unsigned long value;
• /* clock masters */
• switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
• case SND_SOC_DAIFMT_CBS_CFS: /* DAI Slave */
• value = 0x0; /* Codec Master */
• break;
• case SND_SOC_DAIFMT_CBM_CFM: /* DAI Master */
• value = 0x1; /* Codec Slave */
• break;
• default:
• return -EINVAL;
• }
• regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL,
• BIT(SUN8I_AIF1CLK_CTRL_AIF1_MSTR_MOD),
• value << SUN8I_AIF1CLK_CTRL_AIF1_MSTR_MOD);
• /* clock inversion */
• switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
• case SND_SOC_DAIFMT_NB_NF: /* Normal */
• value = 0x0;
• break;
• case SND_SOC_DAIFMT_IB_IF: /* Inversion */
• value = 0x1;
• break;
• default:
• return -EINVAL;
• }
• regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL,
• BIT(SUN8I_AIF1CLK_CTRL_AIF1_BCLK_INV),
• value << SUN8I_AIF1CLK_CTRL_AIF1_BCLK_INV);
• regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL,
• BIT(SUN8I_AIF1CLK_CTRL_AIF1_LRCK_INV),
• value << SUN8I_AIF1CLK_CTRL_AIF1_LRCK_INV);
• /* DAI format */
• switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
• case SND_SOC_DAIFMT_I2S:
• value = 0x0;
• break;
• case SND_SOC_DAIFMT_LEFT_J:
• value = 0x1;
• break;
• case SND_SOC_DAIFMT_RIGHT_J:
• value = 0x2;
• break;
• case SND_SOC_DAIFMT_DSP_A:
• case SND_SOC_DAIFMT_DSP_B:
• value = 0x3;
• break;
• default:
• return -EINVAL;
• }
• regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL,
• BIT(SUN8I_AIF1CLK_CTRL_AIF1_DATA_FMT),
• value << SUN8I_AIF1CLK_CTRL_AIF1_DATA_FMT);
• return 0;

+}

+static int sun8i_codec_hw_params(struct snd_pcm_substream *substream,

• struct snd_pcm_hw_params *params,
• struct snd_soc_dai *dai)

+{

• int rs_value = 0;
• u32 bclk_lrck_div = 0, sample_resolution;
• int sample_rate = 0;
• struct sun8i_codec *scodec = snd_soc_codec_get_drvdata(dai->codec);
• switch (params_format(params)) {
• case SNDRV_PCM_FORMAT_S16_LE:
• sample_resolution = 16;
• break;
• case SNDRV_PCM_FORMAT_S20_3LE:
• case SNDRV_PCM_FORMAT_S24_LE:
• case SNDRV_PCM_FORMAT_S32_LE:
• sample_resolution = 24;
• break;
• default:
• return -EINVAL;
• }
• /*calculate word select bit*/
• switch (sample_resolution) {
• case 8:
• rs_value = 0x0;
• break;
• case 16:
• rs_value = 0x1;
• break;
• case 20:
• rs_value = 0x2;
• break;
• case 24:
• rs_value = 0x3;
• break;
• default:
• break;
• }
• regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL,
• 0x3 << SUN8I_AIF1CLK_CTRL_AIF1_WORD_SIZ,
• rs_value << SUN8I_AIF1CLK_CTRL_AIF1_WORD_SIZ);
• /* calculate bclk_lrck_div Ratio */
• bclk_lrck_div = sample_resolution * 2;
• switch (bclk_lrck_div) {
• case 16:
• bclk_lrck_div = 0;
• break;
• case 32:
• bclk_lrck_div = 1;
• break;
• case 64:
• bclk_lrck_div = 2;
• break;
• case 128:
• bclk_lrck_div = 3;
• break;
• case 256:
• bclk_lrck_div = 4;
• break;
• default:
• break;
• }
• regmap_update_bits(scodec->regmap, SUN8I_AIF1CLK_CTRL,
• 0x7 << SUN8I_AIF1CLK_CTRL_AIF1_LRCK_DIV,
• bclk_lrck_div << SUN8I_AIF1CLK_CTRL_AIF1_LRCK_DIV);
• sample_rate = sun8i_codec_get_hw_rate(params);
• if (sample_rate < 0)
• return sample_rate;
• regmap_update_bits(scodec->regmap, SUN8I_SYS_SR_CTRL,
• 0xf << SUN8I_SYS_SR_CTRL_AIF1_FS,
• sample_rate << SUN8I_SYS_SR_CTRL_AIF1_FS);
• regmap_update_bits(scodec->regmap, SUN8I_SYS_SR_CTRL,
• 0xf << SUN8I_SYS_SR_CTRL_AIF2_FS,
• sample_rate << SUN8I_SYS_SR_CTRL_AIF2_FS);
• return 0;

+}

+static const struct snd_kcontrol_new sun8i_output_left_mixer_controls[] = {

• SOC_DAPM_SINGLE("LSlot 0", SUN8I_DAC_MXR_SRC,
• SUN8I_DAC_MXR_SRC_DACL_MXR_SRC_AIF1DA0L, 1, 0),
• SOC_DAPM_SINGLE("LSlot 1", SUN8I_DAC_MXR_SRC,
• SUN8I_DAC_MXR_SRC_DACL_MXR_SRC_AIF1DA1L, 1, 0),
• SOC_DAPM_SINGLE("DACL", SUN8I_DAC_MXR_SRC,
• SUN8I_DAC_MXR_SRC_DACL_MXR_SRC_AIF2DACL, 1, 0),
• SOC_DAPM_SINGLE("ADCL", SUN8I_DAC_MXR_SRC,
• SUN8I_DAC_MXR_SRC_DACL_MXR_SRC_ADCL, 1, 0),

+};

+static const struct snd_kcontrol_new sun8i_output_right_mixer_controls[] = {

• SOC_DAPM_SINGLE("RSlot 0", SUN8I_DAC_MXR_SRC,
• SUN8I_DAC_MXR_SRC_DACR_MXR_SRC_AIF1DA0R, 1, 0),
• SOC_DAPM_SINGLE("RSlot 1", SUN8I_DAC_MXR_SRC,
• SUN8I_DAC_MXR_SRC_DACR_MXR_SRC_AIF1DA1R, 1, 0),
• SOC_DAPM_SINGLE("DACR", SUN8I_DAC_MXR_SRC,
• SUN8I_DAC_MXR_SRC_DACR_MXR_SRC_AIF2DACR, 1, 0),
• SOC_DAPM_SINGLE("ADCR", SUN8I_DAC_MXR_SRC,
• SUN8I_DAC_MXR_SRC_DACR_MXR_SRC_ADCR, 1, 0),

+};

+static const struct snd_soc_dapm_widget sun8i_codec_dapm_widgets[] = {

• /* Digital parts of the DACs */
• SND_SOC_DAPM_SUPPLY("DAC", SUN8I_DAC_DIG_CTRL, SUN8I_DAC_DIG_CTRL_ENDA,
• 0, NULL, 0),
• /* Analog DAC */
• SND_SOC_DAPM_DAC("Left DAC", "Playback", SUN8I_AIF1_DACDAT_CTRL,
• SUN8I_AIF1_DACDAT_CTRL_AIF1_DA0L_ENA, 0),
• SND_SOC_DAPM_DAC("Right DAC", "Playback", SUN8I_AIF1_DACDAT_CTRL,
• SUN8I_AIF1_DACDAT_CTRL_AIF1_DA0R_ENA, 0),
• /* DAC Mixers */
• SND_SOC_DAPM_MIXER("Left DAC Mixer", SND_SOC_NOPM, 0, 0,
• sun8i_output_left_mixer_controls,
• ARRAY_SIZE(sun8i_output_left_mixer_controls)),
• SND_SOC_DAPM_MIXER("Right DAC Mixer", SND_SOC_NOPM, 0, 0,
• sun8i_output_right_mixer_controls,
• ARRAY_SIZE(sun8i_output_right_mixer_controls)),
• /* Clocks */
• SND_SOC_DAPM_SUPPLY("MODCLK AFI1", SUN8I_MOD_CLK_ENA,
• SUN8I_MOD_CLK_ENA_AIF1, 0, NULL, 0),
• SND_SOC_DAPM_SUPPLY("MODCLK DAC", SUN8I_MOD_CLK_ENA,
• SUN8I_MOD_CLK_ENA_DAC, 0, NULL, 0),
• SND_SOC_DAPM_SUPPLY("AIF1", SUN8I_SYSCLK_CTL,
• SUN8I_SYSCLK_CTL_AIF1CLK_ENA, 0, NULL, 0),
• SND_SOC_DAPM_SUPPLY("SYSCLK", SUN8I_SYSCLK_CTL,
• SUN8I_SYSCLK_CTL_SYSCLK_ENA, 0, NULL, 0),
• SND_SOC_DAPM_SUPPLY("AIF1 PLL", SUN8I_SYSCLK_CTL, 0x9, 0, NULL, 0),
• /* Inversion as 0=AIF1, 1=AIF2 */
• SND_SOC_DAPM_SUPPLY("SYSCLK AIF1", SUN8I_SYSCLK_CTL,
• SUN8I_SYSCLK_CTL_SYSCLK_SRC, 1, NULL, 0),
• /* Module reset */
• SND_SOC_DAPM_SUPPLY("RST AIF1", SUN8I_MOD_RST_CTL,
• SUN8I_MOD_RST_CTL_AIF1, 0, NULL, 0),
• SND_SOC_DAPM_SUPPLY("RST DAC", SUN8I_MOD_RST_CTL,
• SUN8I_MOD_RST_CTL_DAC, 0, NULL, 0),
• /* Headphone outputs */
• SND_SOC_DAPM_OUTPUT("HPOUTL"),
• SND_SOC_DAPM_OUTPUT("HPOUTR"),

+};

+static const struct snd_soc_dapm_route sun8i_codec_dapm_routes[] = {

• /* Clock Routes */
• { "AIF1", NULL, "SYSCLK AIF1" },
• { "AIF1 PLL", NULL, "AIF1" },
• { "RST AIF1", NULL, "AIF1 PLL" },
• { "MODCLK AFI1", NULL, "RST AIF1" },
• { "DAC", NULL, "MODCLK AFI1" },
• { "RST DAC", NULL, "SYSCLK" },
• { "MODCLK DAC", NULL, "RST DAC" },
• { "DAC", NULL, "MODCLK DAC" },
• /* DAC Routes */
• { "Left DAC", NULL, "DAC" },
• { "Right DAC", NULL, "DAC" },
• /* DAC Mixer Routes */
• { "Left DAC Mixer", "LSlot 0", "Left DAC"},
• { "Right DAC Mixer", "RSlot 0", "Right DAC"},
• /* End of route : HP out */
• { "HPOUTL", NULL, "Left DAC Mixer" },
• { "HPOUTR", NULL, "Right DAC Mixer" },

+};

+static struct snd_soc_dai_ops sun8i_codec_dai_ops = {

• .hw_params = sun8i_codec_hw_params,
• .set_fmt = sun8i_set_fmt,

+};

+static struct snd_soc_dai_driver sun8i_codec_dai = {

• .name = "sun8i",
• /* playback capabilities */
• .playback = {
• .stream_name = "Playback",
• .channels_min = 1,
• .channels_max = 2,
• .rates = SNDRV_PCM_RATE_8000_192000 |
• SNDRV_PCM_RATE_KNOT,
• .formats = SNDRV_PCM_FMTBIT_S8 |
• SNDRV_PCM_FMTBIT_S16_LE |
• SNDRV_PCM_FMTBIT_S18_3LE |
• SNDRV_PCM_FMTBIT_S20_3LE |
• SNDRV_PCM_FMTBIT_S24_LE |
• SNDRV_PCM_FMTBIT_S32_LE,
• },
• /* pcm operations */
• .ops = &sun8i_codec_dai_ops,

+}; +EXPORT_SYMBOL(sun8i_codec_dai);

+static int sun8i_soc_probe(struct snd_soc_codec *codec) +{

• return 0;

+}

+/* power down chip */ +static int sun8i_soc_remove(struct snd_soc_codec *codec) +{

• return 0;

+}

+static struct snd_soc_codec_driver sun8i_soc_codec = {

• .probe = sun8i_soc_probe,
• .remove = sun8i_soc_remove,
• .component_driver = {
• .dapm_widgets = sun8i_codec_dapm_widgets,
• .num_dapm_widgets = ARRAY_SIZE(sun8i_codec_dapm_widgets),
• .dapm_routes = sun8i_codec_dapm_routes,
• .num_dapm_routes = ARRAY_SIZE(sun8i_codec_dapm_routes),
• },

+};

+static const struct regmap_config sun8i_codec_regmap_config = {

• .reg_bits = 32,
• .reg_stride = 4,
• .val_bits = 32,
• .max_register = SUN8I_DAC_MXR_SRC,

+};

+static int sun8i_codec_probe(struct platform_device *pdev) +{

• struct resource *res_base;
• struct sun8i_codec *scodec;
• void __iomem *base;
• scodec = devm_kzalloc(&pdev->dev, sizeof(*scodec), GFP_KERNEL);
• if (!scodec)
• return -ENOMEM;
• scodec->dev = &pdev->dev;
• /* Get the clocks from the DT */
• scodec->clk_module = devm_clk_get(&pdev->dev, "codec");
• if (IS_ERR(scodec->clk_module)) {
• dev_err(&pdev->dev, "Failed to get the module clock\n");
• return PTR_ERR(scodec->clk_module);
• }
• if (clk_prepare_enable(scodec->clk_module))
• pr_err("err:open failed;\n");
• scodec->clk_apb = devm_clk_get(&pdev->dev, "apb");
• if (IS_ERR(scodec->clk_apb)) {
• dev_err(&pdev->dev, "Failed to get the apb clock\n");
• return PTR_ERR(scodec->clk_apb);
• }
• if (clk_prepare_enable(scodec->clk_apb))
• pr_err("err:open failed;\n");
• /* Get base resources, registers and regmap */
• res_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "audio");
• base = devm_ioremap_resource(&pdev->dev, res_base);
• if (IS_ERR(base)) {
• dev_err(&pdev->dev, "Failed to map the registers\n");
• return PTR_ERR(base);
• }
• scodec->regmap = devm_regmap_init_mmio(&pdev->dev, base,
• &sun8i_codec_regmap_config);
• if (IS_ERR(scodec->regmap)) {
• dev_err(&pdev->dev, "Failed to create our regmap\n");
• return PTR_ERR(scodec->regmap);
• }
• /* Set the codec data as driver data */
• dev_set_drvdata(&pdev->dev, scodec);
• snd_soc_register_codec(&pdev->dev, &sun8i_soc_codec, &sun8i_codec_dai,
• 1);
• return 0;

+}

+static int sun8i_codec_remove(struct platform_device *pdev) +{

• struct snd_soc_card *card = platform_get_drvdata(pdev);
• struct sun8i_codec *scodec = snd_soc_card_get_drvdata(card);
• snd_soc_unregister_codec(&pdev->dev);
• clk_disable_unprepare(scodec->clk_module);
• clk_disable_unprepare(scodec->clk_apb);
• return 0;

+}

+static const struct of_device_id sun8i_codec_of_match[] = {

• { .compatible = "allwinner,sun8i-a33-codec" },
• { .compatible = "allwinner,sun8i-a23-codec" },
• {}

+}; +MODULE_DEVICE_TABLE(of, sun8i_codec_of_match);

+static struct platform_driver sun8i_codec_driver = {

• .driver = {
• .name = "sun8i-codec",
• .owner = THIS_MODULE,
• .of_match_table = sun8i_codec_of_match,
• },
• .probe = sun8i_codec_probe,
• .remove = sun8i_codec_remove,

+}; +module_platform_driver(sun8i_codec_driver);

+MODULE_DESCRIPTION("Allwinner A33 (sun8i) codec driver"); +MODULE_AUTHOR("huanxinhuanxin@reuuimllatech.com"); +MODULE_AUTHOR("Mylène Josserand mylene.josserand@free-electrons.com"); +MODULE_LICENSE("GPL");

+MODULE_ALIAS("platform:sun8i-codec");

2.9.3

---

linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

On 4 October 2016 at 11:46, Mylène Josserand mylene.josserand@free-electrons.com wrote:

Add the audio card for sun8i SoC. This card links the codec driver (digital part) with the DAI driver. The analog codec driver is added as an aux_device.

Signed-off-by: Mylène Josserand mylene.josserand@free-electrons.com

sound/soc/sunxi/Kconfig | 14 +++++++ sound/soc/sunxi/Makefile | 1 + sound/soc/sunxi/sun8i.c | 101 +++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 116 insertions(+) create mode 100644 sound/soc/sunxi/sun8i.c

diff --git a/sound/soc/sunxi/Kconfig b/sound/soc/sunxi/Kconfig index 9e287b0..7b97395 100644 --- a/sound/soc/sunxi/Kconfig +++ b/sound/soc/sunxi/Kconfig @@ -27,6 +27,20 @@ config SND_SUN4I_SPDIF Say Y or M to add support for the S/PDIF audio block in the Allwinner A10 and affiliated SoCs.

+config SND_SUN8I

•   tristate "Allwinner SUN6I/SUN8I audio card support"
  

•   select SND_SUN8I_CODEC
  

•   select SND_SUN4I_I2S
  

•   select SND_SUN8I_CODEC_ANALOG
  

•   select REGMAP_MMIO
  

•   help
  

•     This option enables the audio card for Allwinner A33 (sun8i) SoC.
  

•     It enables the DAI driver (SND_SUN4I_I2S), the digital audio
  

•     codec driver (SND_SUN8I_CODEC) and the analog codec driver
  

•     (SND_SUN8I_CODEC_ANALOG).
  

•     Say Y or M if you want to add sun8i/6i card support
  

config SND_SUN8I_CODEC tristate "Allwinner SUN8I audio codec" select REGMAP_MMIO diff --git a/sound/soc/sunxi/Makefile b/sound/soc/sunxi/Makefile index 1da63d3..7f1bab9 100644 --- a/sound/soc/sunxi/Makefile +++ b/sound/soc/sunxi/Makefile @@ -1,5 +1,6 @@ obj-$(CONFIG_SND_SUN4I_CODEC) += sun4i-codec.o obj-$(CONFIG_SND_SUN4I_I2S) += sun4i-i2s.o obj-$(CONFIG_SND_SUN4I_SPDIF) += sun4i-spdif.o +obj-$(CONFIG_SND_SUN8I) += sun8i.o

Great work with this...I've been battling with the audio codec for the h3 for a while and it looks like almost everything that I need is delivered here.

obj-$(CONFIG_SND_SUN8I_CODEC) += sun8i-codec.o obj-$(CONFIG_SND_SUN8I_CODEC_ANALOG) += sun8i-codec-analog.o diff --git a/sound/soc/sunxi/sun8i.c b/sound/soc/sunxi/sun8i.c new file mode 100644 index 0000000..565cd88 --- /dev/null +++ b/sound/soc/sunxi/sun8i.c @@ -0,0 +1,101 @@ +/*

• • ALSA SoC driver for Allwinner sun8i SoC
• • Copyright (C) 2016 Mylène Josserand mylene.josserand@free-electrons.com
• • This program is free software; you can redistribute it and/or modify
• • it under the terms of the GNU General Public License as published by
• • the Free Software Foundation; either version 2 of the License, or
• • (at your option) any later version.
• • This program is distributed in the hope that it will be useful,
• • but WITHOUT ANY WARRANTY; without even the implied warranty of
• • MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
• • GNU General Public License for more details.
• */

+#include <linux/firmware.h> +#include <linux/module.h>

+#include <sound/soc.h>

+static struct snd_soc_aux_dev sun8i_audio_prcm_aux_devs[] = {

•   {
  

•           .name = "sun8i-codec-analog",
  

•           .codec_name = "sun8i-codec-analog.0",
  

•   },
  

+};

+static struct snd_soc_dai_link sun8i_dai_link = {

•   .name           = "sun4i-i2s",
  

•   .stream_name    = "Playback",
  

•   .codec_dai_name = "sun8i",
  

•   .dai_fmt        = SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_I2S |
  

•                   SND_SOC_DAIFMT_CBM_CFM,
  

+};

+static struct snd_soc_card sun8i_card = {

•   .name           = "sun8i-card",
  

•   .owner          = THIS_MODULE,
  

•   .dai_link       = &sun8i_dai_link,
  

•   .num_links      = 1,
  

•   .aux_dev        = sun8i_audio_prcm_aux_devs,
  

•   .num_aux_devs   = ARRAY_SIZE(sun8i_audio_prcm_aux_devs),
  

+};

+static int sun8i_probe(struct platform_device *pdev) +{

•   struct snd_soc_dai_link *link = &sun8i_dai_link;
  

•   struct device_node *np = pdev->dev.of_node;
  

•   int ret;
  

•   /* register the soc card */
  

•   sun8i_card.dev = &pdev->dev;
  

•   /* Retrieve the audio-codec from DT */
  

•   link->codec_of_node = of_parse_phandle(np, "allwinner,audio-codec", 0);
  

•   if (!link->codec_of_node) {
  

•           dev_err(&pdev->dev, "Missing audio codec\n");
  

•           return -EINVAL;
  

•   }
  

•   /* Retrieve DAI from DT */
  

•   link->cpu_of_node = of_parse_phandle(np, "allwinner,i2s-controller", 0);
  

•   if (!link->cpu_of_node) {
  

•           dev_err(&pdev->dev, "Missing I2S controller\n");
  

•           return -EINVAL;
  

•   }
  

My one question is that we have sun8i-a23 and sun8i-a33, and I think we need to distinguish them here. The sun8i-a23 doesn't use the i2s block but does use the prcm.

•   link->platform_of_node = link->cpu_of_node;
  

•   /* Register the sound card */
  

•   ret = devm_snd_soc_register_card(&pdev->dev, &sun8i_card);
  

•   if (ret) {
  

•           dev_err(&pdev->dev,
  

•                   "Soc register card failed %d\n", ret);
  

•           return ret;
  

•   }
  

•   return ret;
  

+}

+static const struct of_device_id sun8i_of_match[] = {

•   { .compatible = "allwinner,sun8i-audio", },
  

•   {},
  

+};

+MODULE_DEVICE_TABLE(of, sun8i_of_match);

+static struct platform_driver sun8i_card_driver = {

•   .probe = sun8i_probe,
  

•   .driver = {
  

•           .name   = "sun8i-audio",
  

•           .of_match_table = sun8i_of_match,
  

•   },
  

+};

+module_platform_driver(sun8i_card_driver);

+MODULE_AUTHOR("Mylène Josserand mylene.josserand@free-electrons.com"); +MODULE_DESCRIPTION("Allwinner sun8i machine ASoC driver");

+MODULE_LICENSE("GPL v2");

2.9.3

On Wed, Oct 5, 2016 at 12:24 AM, Maxime Ripard maxime.ripard@free-electrons.com wrote:

Hi,

On Tue, Oct 04, 2016 at 11:46:21AM +0200, Mylène Josserand wrote:

...

Add the documentation for dt-binding of the analog audiocodec driver for SUN8I SoC.

Signed-off-by: Mylène Josserand mylene.josserand@free-electrons.com

.../devicetree/bindings/sound/sun8i-codec-analog.txt | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/sun8i-codec-analog.txt

diff --git a/Documentation/devicetree/bindings/sound/sun8i-codec-analog.txt b/Documentation/devicetree/bindings/sound/sun8i-codec-analog.txt new file mode 100644 index 0000000..a03ec20 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/sun8i-codec-analog.txt @@ -0,0 +1,20 @@ +* Allwinner A23/A33 Analog Codec

+This codec must be handled as a PRCM subnode.

Like Mark was saying, you should probably reference the sun6i-prcm.txt binding here

...

+Required properties: +- compatible: must be either "allwinner,sun8i-codec-analog"

Our compatible prefix is <family>-<soc>, and using the older SoC that introduced that block.

In this case, that would be sun6i-a31, I think?

sun6i-a31s actually, but a31s has extra line out controls, so the right one would be sun8i-a23. Both are listed in my original driver.

ChenYu

Thanks, Maxime

-- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com