[alsa-devel] [PATCH] ASoC: Mediatek: MT8183: enable IIR filter
This patch is to enable IIR filter when DMIC of PMIC is enabled.
Signed-off-by: Shunli Wang shunli.wang@mediatek.com --- sound/soc/mediatek/mt8183/mt8183-dai-adda.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/sound/soc/mediatek/mt8183/mt8183-dai-adda.c b/sound/soc/mediatek/mt8183/mt8183-dai-adda.c index 017d7d1d9148..2b758a18c2ea 100644 --- a/sound/soc/mediatek/mt8183/mt8183-dai-adda.c +++ b/sound/soc/mediatek/mt8183/mt8183-dai-adda.c @@ -176,9 +176,6 @@ static int mtk_adda_ul_event(struct snd_soc_dapm_widget *w, case SND_SOC_DAPM_POST_PMD: /* should delayed 1/fs(smallest is 8k) = 125us before afe off */ usleep_range(125, 135); - - /* reset dmic */ - afe_priv->mtkaif_dmic = 0; break; default: break; @@ -426,6 +423,17 @@ static int mtk_dai_adda_hw_params(struct snd_pcm_substream *substream,
ul_src_con0 |= (voice_mode << 17) & (0x7 << 17);
+ /* enable iir */ + ul_src_con0 |= (1 << UL_IIR_ON_TMP_CTL_SFT) & + UL_IIR_ON_TMP_CTL_MASK_SFT; + + /* 35Hz @ 48k */ + regmap_write(afe->regmap, AFE_ADDA_IIR_COEF_02_01, 0x00000000); + regmap_write(afe->regmap, AFE_ADDA_IIR_COEF_04_03, 0x00003FB8); + regmap_write(afe->regmap, AFE_ADDA_IIR_COEF_06_05, 0x3FB80000); + regmap_write(afe->regmap, AFE_ADDA_IIR_COEF_08_07, 0x3FB80000); + regmap_write(afe->regmap, AFE_ADDA_IIR_COEF_10_09, 0x0000C048); + regmap_write(afe->regmap, AFE_ADDA_UL_SRC_CON0, ul_src_con0);
/* mtkaif_rxif_data_mode = 0, amic */
On Thu, 2019-05-16 at 11:16 +0100, Mark Brown wrote:
On Thu, May 16, 2019 at 06:15:15PM +0800, Shunli Wang wrote:
This patch is to enable IIR filter when DMIC of PMIC is enabled.
Should this not have a user control in case the user wants to avoid the filter for some reason?
The last commit message is incorrect,IIR filter is always required to open for DMIC and AMIC of PMIC.So we will send V2 which correct the commit message again.
participants (3)
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Jiaxin Yu
-
Mark Brown
-
Shunli Wang