[alsa-devel] [PATCH v6 0/10] Fix broken DMAFLUSHP on Rockchips platform
The purpose of the DMAFLUSHP instruction: - Tell the peripheral to clear its status and control registers. - Send a message to the peripheral to resend its level status.
There are 3 timings described in PL330 Technical Reference Manual: - Timing 1: Burst request, can work well without DMAFLUSHP. - Timing 2: Single and burst request, DMAC will ignore the single transfer request. This timing happens if there are single and burst request. - Timing 3: Single transfers for a burst request, DMAC should signals datype to request the peripheral to flush the contents of any control registers. This timing happens if there is not enough MFIFO to places the burst data.
A peripheral may signal a DMA request during the execution of DMAFLUSHP instruction, that cause DMA request being ignored by DMAC.
But DMAC and all peripherals on RK3X SoCs DO NOT support DMAFLUSHP. It can't send a message to the peripheral to resend DMA request, and the peripheral can't acknowledge a flush request from DMAC. So all DMA requests should NOT be ignored by DMAC, and DMAC will not notify the peripheral to flush.
To fix this problem, we need: - Do NOT execute DMAFLUSHP instruction. - Timing 2 and timing 3 should not happen.
Because on RK3X SoCs, there are 6 or below channels and 32 MFIFO depth for DMAC_BUS, and 8 channels and 64 MFIFO depth for DMAC_PERI, it is impossible to hit the timing 3 if burst length is equal or less than 4.
Since the request type signal by the peripheral can only be set by software. We can set Rockchip Soc's GRF_PERIDMAC_CON0[2:1] to select single or burst request, if it is set b01, all of the peripharals will signal a brust request. So the timing 2 will not happen, too.
So DMAC on RK3X can support single or burst transfer, but can't support mixed transfer.
Because burst transfer is more efficient than single transfer, this is confirmed by our ASIC team, who strongly suggest to use burst transfer. And this is confirmed by Addy's test on RK3288-Pink2 board, the speed of spi flash burst transfer will increase about two times than single transfer. Also, I have tested dw_mmc with pl330 on RK3188 platform to double confirm the result. That means burst transfer is reansonable.
So we need a quirk not to execute DMAFLUSHP instruction and to use burst transfer.
Note: - The Rockchip Soc default value of GRF_PERIDMAC_CON0[2:1] is b01. To support brust transfer, these bits should not be changed in bootloader.
Changes in v6: - remove expose quirk and add dma max_burst caps for clients - remove expose quirks and add max_burst for dmaengine - remove get quirks and add get slave caps - remove quirks and get dma caps in order to limit burst
Changes in v5: - add Mark's tag for spi changes - remove unnecessary whitespace change - use switch statement for i2s quirk - use switch statement for dma_quirk's manipulation
Changes in v4: - remove spi & i2s dts changes and query quirk from dmaengine API suggeseted by Mark. - fix typo - Add dmaengine_get_quirk hook and implement it for pl330
Changes in v3: - add Sunny's tag - add more rockchip drivers' changes in this patchset - add Reviewed-by: Sonny Rao sonnyrao@chromium.org
Changes in v2: - amend the author - reorder the patches suggested by Doug - add Reviewed-by: Doug Anderson dianders@chromium.org for rk3288.dtsi patch and arm-pl330.txt patch - fix Olof's mail address
Changes in v1: - add From original author. - remove Sunny's tag - rename broken-no-flushp to "arm,pl330-broken-no-flushp" suggested by Krzysztof.
Addy Ke (3): DMA: pl330: add quirk for broken no flushp ARM: dts: Add arm,pl330-broken-no-flushp quirk for rk3288 platform spi: rockchip: modify DMA max burst to 1
Boojin Kim (1): DMA: pl330: support burst mode for dev-to-mem and mem-to-dev transmit
Shawn Lin (5): Documentation: arm-pl330: add description of arm,pl330-broken-no-flushp ARM: dts: Add arm,pl330-broken-no-flushp quirk for rk3xxx platform DMA: dmaengine: expose max burst capability to clients DMA: pl330: add max burst for dmaengine snd: dmaengine-pcm: add snd_dmaengine_pcm_get_caps interface
Yiwei Cai (1): ASoC: rockchip_i2s: modify DMA max burst to 1
.../devicetree/bindings/dma/arm-pl330.txt | 1 + arch/arm/boot/dts/rk3288.dtsi | 3 + arch/arm/boot/dts/rk3xxx.dtsi | 3 + drivers/dma/dmaengine.c | 1 + drivers/dma/pl330.c | 106 +++++++++++++++------ drivers/spi/spi-rockchip.c | 12 ++- include/linux/dmaengine.h | 4 + sound/soc/rockchip/rockchip_i2s.c | 18 +++- sound/soc/soc-generic-dmaengine-pcm.c | 24 +++++ 9 files changed, 138 insertions(+), 34 deletions(-)
From: Boojin Kim boojin.kim@samsung.com
This patch adds to support burst mode for dev-to-mem and mem-to-dev transmit.
Signed-off-by: Boojin Kim boojin.kim@samsung.com Signed-off-by: Addy Ke addy.ke@rock-chips.com Signed-off-by: Shawn Lin shawn.lin@rock-chips.com cc: Heiko Stuebner heiko@sntech.de cc: Doug Anderson dianders@chromium.org cc: Olof Johansson olof@lixom.net
Reviewed-by: Sonny Rao sonnyrao@chromium.org ---
Changes in v6: None Changes in v5: - add Mark's tag for spi changes - remove unnecessary whitespace change - use switch statement for i2s quirk
Changes in v4: - remove spi & i2s dts changes and query quirk from dmaengine API suggeseted by Mark. - fix typo - Add dmaengine_get_quirk hook and implement it for pl330
Changes in v3: - add Sunny's tag - add more rockchip drivers' changes in this patchset
Changes in v2: - amend the author - reorder the patches suggested by Doug - add Reviewed-by: Doug Anderson dianders@chromium.org for rk3288.dtsi patch and arm-pl330.txt patch
Changes in v1: - rename broken-no-flushp to "arm,pl330-broken-no-flushp" suggested by Krzysztof. - add From original author. - remove Sunny's tag
drivers/dma/pl330.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c index 17ee758..7cdf8d4 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c @@ -1141,10 +1141,13 @@ static inline int _ldst_devtomem(unsigned dry_run, u8 buf[], const struct _xfer_spec *pxs, int cyc) { int off = 0; + enum pl330_cond cond; + + cond = (pxs->desc->rqcfg.brst_len == 1) ? SINGLE : BURST;
while (cyc--) { - off += _emit_WFP(dry_run, &buf[off], SINGLE, pxs->desc->peri); - off += _emit_LDP(dry_run, &buf[off], SINGLE, pxs->desc->peri); + off += _emit_WFP(dry_run, &buf[off], cond, pxs->desc->peri); + off += _emit_LDP(dry_run, &buf[off], cond, pxs->desc->peri); off += _emit_ST(dry_run, &buf[off], ALWAYS); off += _emit_FLUSHP(dry_run, &buf[off], pxs->desc->peri); } @@ -1156,11 +1159,14 @@ static inline int _ldst_memtodev(unsigned dry_run, u8 buf[], const struct _xfer_spec *pxs, int cyc) { int off = 0; + enum pl330_cond cond; + + cond = (pxs->desc->rqcfg.brst_len == 1) ? SINGLE : BURST;
while (cyc--) { - off += _emit_WFP(dry_run, &buf[off], SINGLE, pxs->desc->peri); + off += _emit_WFP(dry_run, &buf[off], cond, pxs->desc->peri); off += _emit_LD(dry_run, &buf[off], ALWAYS); - off += _emit_STP(dry_run, &buf[off], SINGLE, pxs->desc->peri); + off += _emit_STP(dry_run, &buf[off], cond, pxs->desc->peri); off += _emit_FLUSHP(dry_run, &buf[off], pxs->desc->peri); }
@@ -1199,7 +1205,7 @@ static inline int _loop(unsigned dry_run, u8 buf[], struct _arg_LPEND lpend;
if (*bursts == 1) - return _bursts(dry_run, buf, pxs, 1); + return _bursts(pl330, dry_run, buf, pxs, 1);
/* Max iterations possible in DMALP is 256 */ if (*bursts >= 256*256) { @@ -2560,7 +2566,7 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic(
desc->rqtype = direction; desc->rqcfg.brst_size = pch->burst_sz; - desc->rqcfg.brst_len = 1; + desc->rqcfg.brst_len = pch->burst_len; desc->bytes_requested = period_len; fill_px(&desc->px, dst, src, period_len);
@@ -2705,7 +2711,7 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, }
desc->rqcfg.brst_size = pch->burst_sz; - desc->rqcfg.brst_len = 1; + desc->rqcfg.brst_len = pch->burst_len; desc->rqtype = direction; desc->bytes_requested = sg_dma_len(sg); }
On Thu, Oct 15, 2015 at 09:35:12AM +0800, Shawn Lin wrote:
From: Boojin Kim boojin.kim@samsung.com
Please fix the subsystem name in this series. Its dmaengine:...
Git log should tell you the acceptable style for a subsystem
On 2015/10/15 12:08, Vinod Koul wrote:
On Thu, Oct 15, 2015 at 09:35:12AM +0800, Shawn Lin wrote:
From: Boojin Kim boojin.kim@samsung.com
Please fix the subsystem name in this series. Its dmaengine:...
Git log should tell you the acceptable style for a subsystem
Sorry for that, it will be fixed in the next version.
Signed-off-by: Shawn Lin shawn.lin@rock-chips.com
Reviewed-by: Doug Anderson dianders@chromium.org Reviewed-by: Sonny Rao sonnyrao@chromium.org ---
Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: - add Reviewed-by: Sonny Rao sonnyrao@chromium.org
Changes in v2: - add Reviewed-by: Doug Anderson dianders@chromium.org
Changes in v1: - rename broken-no-flushp to "arm,pl330-broken-no-flushp" suggested by Krzysztof.
Documentation/devicetree/bindings/dma/arm-pl330.txt | 1 + 1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/dma/arm-pl330.txt b/Documentation/devicetree/bindings/dma/arm-pl330.txt index 2675658..db7e226 100644 --- a/Documentation/devicetree/bindings/dma/arm-pl330.txt +++ b/Documentation/devicetree/bindings/dma/arm-pl330.txt @@ -15,6 +15,7 @@ Optional properties: cells in the dmas property of client device. - dma-channels: contains the total number of DMA channels supported by the DMAC - dma-requests: contains the total number of DMA requests supported by the DMAC + - arm,pl330-broken-no-flushp: quirk for avoiding to execute DMAFLUSHP
Example:
From: Addy Ke addy.ke@rock-chips.com
This patch add "arm,pl330-broken-no-flushp" quirk to avoid execute DMAFLUSHP if Soc doesn't support it.
Signed-off-by: Addy Ke addy.ke@rock-chips.com Signed-off-by: Shawn Lin shawn.lin@rock-chips.com cc: Doug Anderson dianders@chromium.org cc: Heiko Stuebner heiko@sntech.de cc: Olof Johansson olof@lixom.net
Reviewed-by: Sonny Rao sonnyrao@chromium.org ---
Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: - add Reviewed-by: Sonny Rao sonnyrao@chromium.org
Changes in v2: - amend the author - fix Olof's mail address
Changes in v1: - rename broken-no-flushp to "arm,pl330-broken-no-flushp" suggested by Krzysztof. - remove Sunny's tag
drivers/dma/pl330.c | 87 ++++++++++++++++++++++++++++++++++++++--------------- 1 file changed, 62 insertions(+), 25 deletions(-)
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c index 7cdf8d4..008408d 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c @@ -34,6 +34,8 @@ #define PL330_MAX_IRQS 32 #define PL330_MAX_PERI 32
+#define PL330_QUIRK_BROKEN_NO_FLUSHP BIT(0) + enum pl330_cachectrl { CCTRL0, /* Noncacheable and nonbufferable */ CCTRL1, /* Bufferable only */ @@ -488,6 +490,17 @@ struct pl330_dmac { /* Peripheral channels connected to this DMAC */ unsigned int num_peripherals; struct dma_pl330_chan *peripherals; /* keep at end */ + int quirks; +}; + +static struct pl330_of_quirks { + char *quirk; + int id; +} of_quirks[] = { + { + .quirk = "arm,pl330-broken-no-flushp", + .id = PL330_QUIRK_BROKEN_NO_FLUSHP, + } };
struct dma_pl330_desc { @@ -1137,53 +1150,68 @@ static inline int _ldst_memtomem(unsigned dry_run, u8 buf[], return off; }
-static inline int _ldst_devtomem(unsigned dry_run, u8 buf[], - const struct _xfer_spec *pxs, int cyc) +static inline int _ldst_devtomem(struct pl330_dmac *pl330, unsigned dry_run, + u8 buf[], const struct _xfer_spec *pxs, + int cyc) { int off = 0; enum pl330_cond cond;
- cond = (pxs->desc->rqcfg.brst_len == 1) ? SINGLE : BURST; + if (pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP) + cond = BURST; + else + cond = (pxs->desc->rqcfg.brst_len == 1) ? SINGLE : BURST;
while (cyc--) { off += _emit_WFP(dry_run, &buf[off], cond, pxs->desc->peri); off += _emit_LDP(dry_run, &buf[off], cond, pxs->desc->peri); off += _emit_ST(dry_run, &buf[off], ALWAYS); - off += _emit_FLUSHP(dry_run, &buf[off], pxs->desc->peri); + + if (!(pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP)) + off += _emit_FLUSHP(dry_run, &buf[off], + pxs->desc->peri); }
return off; }
-static inline int _ldst_memtodev(unsigned dry_run, u8 buf[], - const struct _xfer_spec *pxs, int cyc) +static inline int _ldst_memtodev(struct pl330_dmac *pl330, + unsigned dry_run, u8 buf[], + const struct _xfer_spec *pxs, int cyc) { int off = 0; enum pl330_cond cond;
- cond = (pxs->desc->rqcfg.brst_len == 1) ? SINGLE : BURST; + if (pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP) + cond = BURST; + else + cond = (pxs->desc->rqcfg.brst_len == 1) ? SINGLE : BURST; +
while (cyc--) { off += _emit_WFP(dry_run, &buf[off], cond, pxs->desc->peri); off += _emit_LD(dry_run, &buf[off], ALWAYS); off += _emit_STP(dry_run, &buf[off], cond, pxs->desc->peri); - off += _emit_FLUSHP(dry_run, &buf[off], pxs->desc->peri); + + if (!(pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP)) + off += _emit_FLUSHP(dry_run, &buf[off], + pxs->desc->peri); }
return off; }
-static int _bursts(unsigned dry_run, u8 buf[], +static int _bursts(struct pl330_dmac *pl330, unsigned dry_run, u8 buf[], const struct _xfer_spec *pxs, int cyc) { int off = 0;
switch (pxs->desc->rqtype) { case DMA_MEM_TO_DEV: - off += _ldst_memtodev(dry_run, &buf[off], pxs, cyc); + off += _ldst_memtodev(pl330, dry_run, &buf[off], pxs, cyc); break; case DMA_DEV_TO_MEM: - off += _ldst_devtomem(dry_run, &buf[off], pxs, cyc); + off += _ldst_devtomem(pl330, dry_run, &buf[off], pxs, cyc); break; case DMA_MEM_TO_MEM: off += _ldst_memtomem(dry_run, &buf[off], pxs, cyc); @@ -1197,7 +1225,7 @@ static int _bursts(unsigned dry_run, u8 buf[], }
/* Returns bytes consumed and updates bursts */ -static inline int _loop(unsigned dry_run, u8 buf[], +static inline int _loop(struct pl330_dmac *pl330, unsigned dry_run, u8 buf[], unsigned long *bursts, const struct _xfer_spec *pxs) { int cyc, cycmax, szlp, szlpend, szbrst, off; @@ -1223,7 +1251,7 @@ static inline int _loop(unsigned dry_run, u8 buf[], }
szlp = _emit_LP(1, buf, 0, 0); - szbrst = _bursts(1, buf, pxs, 1); + szbrst = _bursts(pl330, 1, buf, pxs, 1);
lpend.cond = ALWAYS; lpend.forever = false; @@ -1255,7 +1283,7 @@ static inline int _loop(unsigned dry_run, u8 buf[], off += _emit_LP(dry_run, &buf[off], 1, lcnt1); ljmp1 = off;
- off += _bursts(dry_run, &buf[off], pxs, cyc); + off += _bursts(pl330, dry_run, &buf[off], pxs, cyc);
lpend.cond = ALWAYS; lpend.forever = false; @@ -1278,8 +1306,9 @@ static inline int _loop(unsigned dry_run, u8 buf[], return off; }
-static inline int _setup_loops(unsigned dry_run, u8 buf[], - const struct _xfer_spec *pxs) +static inline int _setup_loops(struct pl330_dmac *pl330, + unsigned dry_run, u8 buf[], + const struct _xfer_spec *pxs) { struct pl330_xfer *x = &pxs->desc->px; u32 ccr = pxs->ccr; @@ -1288,15 +1317,16 @@ static inline int _setup_loops(unsigned dry_run, u8 buf[],
while (bursts) { c = bursts; - off += _loop(dry_run, &buf[off], &c, pxs); + off += _loop(pl330, dry_run, &buf[off], &c, pxs); bursts -= c; }
return off; }
-static inline int _setup_xfer(unsigned dry_run, u8 buf[], - const struct _xfer_spec *pxs) +static inline int _setup_xfer(struct pl330_dmac *pl330, + unsigned dry_run, u8 buf[], + const struct _xfer_spec *pxs) { struct pl330_xfer *x = &pxs->desc->px; int off = 0; @@ -1307,7 +1337,7 @@ static inline int _setup_xfer(unsigned dry_run, u8 buf[], off += _emit_MOV(dry_run, &buf[off], DAR, x->dst_addr);
/* Setup Loop(s) */ - off += _setup_loops(dry_run, &buf[off], pxs); + off += _setup_loops(pl330, dry_run, &buf[off], pxs);
return off; } @@ -1316,8 +1346,9 @@ static inline int _setup_xfer(unsigned dry_run, u8 buf[], * A req is a sequence of one or more xfer units. * Returns the number of bytes taken to setup the MC for the req. */ -static int _setup_req(unsigned dry_run, struct pl330_thread *thrd, - unsigned index, struct _xfer_spec *pxs) +static int _setup_req(struct pl330_dmac *pl330, unsigned dry_run, + struct pl330_thread *thrd, unsigned index, + struct _xfer_spec *pxs) { struct _pl330_req *req = &thrd->req[index]; struct pl330_xfer *x; @@ -1334,7 +1365,7 @@ static int _setup_req(unsigned dry_run, struct pl330_thread *thrd, if (x->bytes % (BRST_SIZE(pxs->ccr) * BRST_LEN(pxs->ccr))) return -EINVAL;
- off += _setup_xfer(dry_run, &buf[off], pxs); + off += _setup_xfer(pl330, dry_run, &buf[off], pxs);
/* DMASEV peripheral/event */ off += _emit_SEV(dry_run, &buf[off], thrd->ev); @@ -1428,7 +1459,7 @@ static int pl330_submit_req(struct pl330_thread *thrd, xs.desc = desc;
/* First dry run to check if req is acceptable */ - ret = _setup_req(1, thrd, idx, &xs); + ret = _setup_req(pl330, 1, thrd, idx, &xs); if (ret < 0) goto xfer_exit;
@@ -1442,7 +1473,7 @@ static int pl330_submit_req(struct pl330_thread *thrd, /* Hook the request */ thrd->lstenq = idx; thrd->req[idx].desc = desc; - _setup_req(0, thrd, idx, &xs); + _setup_req(pl330, 0, thrd, idx, &xs);
ret = 0;
@@ -2787,6 +2818,7 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) struct resource *res; int i, ret, irq; int num_chan; + struct device_node *np = adev->dev.of_node;
pdat = dev_get_platdata(&adev->dev);
@@ -2806,6 +2838,11 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
pl330->mcbufsz = pdat ? pdat->mcbuf_sz : 0;
+ /* get quirk */ + for (i = 0; i < ARRAY_SIZE(of_quirks); i++) + if (of_property_read_bool(np, of_quirks[i].quirk)) + pl330->quirks |= of_quirks[i].id; + res = &adev->res; pl330->base = devm_ioremap_resource(&adev->dev, res); if (IS_ERR(pl330->base))
From: Addy Ke addy.ke@rock-chips.com
Pl330 integrated in rk3288 platform doesn't support DMAFLUSHP function. So we add arm,pl330-broken-no-flushp quirk for it.
Signed-off-by: Addy Ke addy.ke@rock-chips.com Signed-off-by: Shawn Lin shawn.lin@rock-chips.com cc: Heiko Stuebner heiko@sntech.de cc: Olof Johansson olof@lixom.net cc: Sonny Rao sonnyrao@chromium.org
Reviewed-by: Doug Anderson dianders@chromium.org Reviewed-by: Sonny Rao sonnyrao@chromium.org ---
Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: - add Reviewed-by: Sonny Rao sonnyrao@chromium.org
Changes in v2: - amend the author - add Reviewed-by: Doug Anderson dianders@chromium.org - amend Olof's mail address
Changes in v1: - rename broken-no-flushp to "arm,pl330-broken-no-flushp" suggested by Krzysztof. - remove Sunny's tag
arch/arm/boot/dts/rk3288.dtsi | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 906e938..6978ff6 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -145,6 +145,7 @@ #dma-cells = <1>; clocks = <&cru ACLK_DMAC2>; clock-names = "apb_pclk"; + arm,pl330-broken-no-flushp; };
dmac_bus_ns: dma-controller@ff600000 { @@ -156,6 +157,7 @@ clocks = <&cru ACLK_DMAC1>; clock-names = "apb_pclk"; status = "disabled"; + arm,pl330-broken-no-flushp; };
dmac_bus_s: dma-controller@ffb20000 { @@ -166,6 +168,7 @@ #dma-cells = <1>; clocks = <&cru ACLK_DMAC1>; clock-names = "apb_pclk"; + arm,pl330-broken-no-flushp; }; };
Pl330 integrated in rk3xxx platform doesn't support DMAFLUSHP function. So we add arm,pl330-broken-no-flushp quirk for it.
Signed-off-by: Shawn Lin shawn.lin@rock-chips.com cc: Heiko Stuebner heiko@sntech.de cc: Doug Anderson dianders@chromium.org cc: Olof Johansson olof@lixom.net
---
Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None Changes in v1: - rename broken-no-flushp to "arm,pl330-broken-no-flushp" suggested by Krzysztof.
arch/arm/boot/dts/rk3xxx.dtsi | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index 4497d28..f3d419b 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -79,6 +79,7 @@ #dma-cells = <1>; clocks = <&cru ACLK_DMA1>; clock-names = "apb_pclk"; + arm,pl330-broken-no-flushp; };
dmac1_ns: dma-controller@2001c000 { @@ -89,6 +90,7 @@ #dma-cells = <1>; clocks = <&cru ACLK_DMA1>; clock-names = "apb_pclk"; + arm,pl330-broken-no-flushp; status = "disabled"; };
@@ -100,6 +102,7 @@ #dma-cells = <1>; clocks = <&cru ACLK_DMA2>; clock-names = "apb_pclk"; + arm,pl330-broken-no-flushp; }; };
This patch add max_burst to dma_get_slave_caps for clients to get the burst capability of slave dma controller.
Signed-off-by: Shawn Lin shawn.lin@rock-chips.com
---
Changes in v6: - remove expose quirk and add dma max_burst caps for clients
Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None Changes in v1: None
drivers/dma/dmaengine.c | 1 + include/linux/dmaengine.h | 4 ++++ 2 files changed, 5 insertions(+)
diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c index 3ecec14..1ccf64b 100644 --- a/drivers/dma/dmaengine.c +++ b/drivers/dma/dmaengine.c @@ -492,6 +492,7 @@ int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps) caps->src_addr_widths = device->src_addr_widths; caps->dst_addr_widths = device->dst_addr_widths; caps->directions = device->directions; + caps->max_burst = device->max_burst; caps->residue_granularity = device->residue_granularity;
/* diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 7ea9184..b6bc79e 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -401,6 +401,7 @@ enum dma_residue_granularity { * since the enum dma_transfer_direction is not defined as bits for each * type of direction, the dma controller should fill (1 << <TYPE>) and same * should be checked by controller as well + * @max_burst: max burst capability per-transfer * @cmd_pause: true, if pause and thereby resume is supported * @cmd_terminate: true, if terminate cmd is supported * @residue_granularity: granularity of the reported transfer residue @@ -411,6 +412,7 @@ struct dma_slave_caps { u32 src_addr_widths; u32 dst_addr_widths; u32 directions; + u32 max_burst; bool cmd_pause; bool cmd_terminate; enum dma_residue_granularity residue_granularity; @@ -627,6 +629,7 @@ enum dmaengine_alignment { * the enum dma_transfer_direction is not defined as bits for * each type of direction, the dma controller should fill (1 << * <TYPE>) and same should be checked by controller as well + * @max_burst: max burst capability per-transfer * @residue_granularity: granularity of the transfer residue reported * by tx_status * @device_alloc_chan_resources: allocate resources and return the @@ -680,6 +683,7 @@ struct dma_device { u32 src_addr_widths; u32 dst_addr_widths; u32 directions; + u32 max_burst; enum dma_residue_granularity residue_granularity;
int (*device_alloc_chan_resources)(struct dma_chan *chan);
This patch add max burst capability for dmaengine and limit burst capability to one for PL330_QUIRK_BROKEN_NO_FLUSHP
Signed-off-by: Shawn Lin shawn.lin@rock-chips.com
---
Changes in v6: - remove expose quirks and add max_burst for dmaengine
Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None Changes in v1: None
drivers/dma/pl330.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c index 008408d..1b0453b 100644 --- a/drivers/dma/pl330.c +++ b/drivers/dma/pl330.c @@ -33,6 +33,7 @@ #define PL330_MAX_CHAN 8 #define PL330_MAX_IRQS 32 #define PL330_MAX_PERI 32 +#define PL330_MAX_BURST 16
#define PL330_QUIRK_BROKEN_NO_FLUSHP BIT(0)
@@ -2938,6 +2939,8 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) pd->dst_addr_widths = PL330_DMA_BUSWIDTHS; pd->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); pd->residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT; + pd->max_burst = ((pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP) ? + 1 : PL330_MAX_BURST);
ret = dma_async_device_register(pd); if (ret) {
From: Addy Ke addy.ke@rock-chips.com
Generic dma controller on Rockchips' platform cannot support DMAFLUSHP instruction which make dma to flush the req of non-aligned or non-multiple of what we need. That will cause an unrecoverable dma bus error. The saftest way is to set dma max burst to 1.
Signed-off-by: Addy ke addy.ke@rock-chips.com Fixes: 64e36824b32b06 ("spi/rockchip: add driver for Rockchip...") Signed-off-by: Shawn Lin shawn.lin@rock-chips.com cc: Heiko Stuebner heiko@sntech.de cc: Olof Johansson olof@lixom.net cc: Doug Anderson dianders@chromium.org cc: Sonny Rao sonnyrao@chromium.org
Acked-by: Mark Brown broonie@kernel.org ---
Changes in v6: - remove quirks and get dma caps in order to limit burst
Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None Changes in v1: None
drivers/spi/spi-rockchip.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index 79a8bc4..aa9561f 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -199,6 +199,7 @@ struct rockchip_spi { struct sg_table rx_sg; struct rockchip_spi_dma_data dma_rx; struct rockchip_spi_dma_data dma_tx; + struct dma_slave_caps dma_caps; };
static inline void spi_enable_chip(struct rockchip_spi *rs, int enable) @@ -449,7 +450,10 @@ static void rockchip_spi_prepare_dma(struct rockchip_spi *rs) rxconf.direction = rs->dma_rx.direction; rxconf.src_addr = rs->dma_rx.addr; rxconf.src_addr_width = rs->n_bytes; - rxconf.src_maxburst = rs->n_bytes; + if (rs->dma_caps.max_burst > 4) + rxconf.src_maxburst = 4; + else + rxconf.src_maxburst = 1; dmaengine_slave_config(rs->dma_rx.ch, &rxconf);
rxdesc = dmaengine_prep_slave_sg( @@ -466,7 +470,10 @@ static void rockchip_spi_prepare_dma(struct rockchip_spi *rs) txconf.direction = rs->dma_tx.direction; txconf.dst_addr = rs->dma_tx.addr; txconf.dst_addr_width = rs->n_bytes; - txconf.dst_maxburst = rs->n_bytes; + if (rs->dma_caps.max_burst > 4) + txconf.dst_maxburst = 4; + else + txconf.dst_maxburst = 1; dmaengine_slave_config(rs->dma_tx.ch, &txconf);
txdesc = dmaengine_prep_slave_sg( @@ -730,6 +737,7 @@ static int rockchip_spi_probe(struct platform_device *pdev) }
if (rs->dma_tx.ch && rs->dma_rx.ch) { + dma_get_slave_caps(rs->dma_rx.ch, &(rs->dma_caps)); rs->dma_tx.addr = (dma_addr_t)(mem->start + ROCKCHIP_SPI_TXDR); rs->dma_rx.addr = (dma_addr_t)(mem->start + ROCKCHIP_SPI_RXDR); rs->dma_tx.direction = DMA_MEM_TO_DEV;
Add snd_dmaengine_pcm_get_caps for I2S devices to query dma controller's caps if they need it to make special limitation due to specific dma controller design
Signed-off-by: Shawn Lin shawn.lin@rock-chips.com
---
Changes in v6: - remove get quirks and add get slave caps
Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None Changes in v1: None
sound/soc/soc-generic-dmaengine-pcm.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+)
diff --git a/sound/soc/soc-generic-dmaengine-pcm.c b/sound/soc/soc-generic-dmaengine-pcm.c index 6fd1906..225c933 100644 --- a/sound/soc/soc-generic-dmaengine-pcm.c +++ b/sound/soc/soc-generic-dmaengine-pcm.c @@ -466,4 +466,28 @@ void snd_dmaengine_pcm_unregister(struct device *dev) } EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_unregister);
+ +/** + * snd_dmaengine_pcm_get_caps - Get slave dma caps based PCM device + * @dev: Parent device the PCM was register with + */ +int snd_dmaengine_pcm_get_caps(struct device *dev, struct dma_slave_caps *caps) +{ + struct snd_soc_platform *platform; + struct dmaengine_pcm *pcm; + int ret = -ENODEV; + + platform = snd_soc_lookup_platform(dev); + if (!platform) + return ret; + + pcm = soc_platform_to_pcm(platform); + + if (pcm->chan) + ret = dma_get_slave_caps(pcm->chan[0], caps); + + return ret; +} +EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_get_caps); + MODULE_LICENSE("GPL");
On Thu, Oct 15, 2015 at 09:36:38AM +0800, Shawn Lin wrote:
+int snd_dmaengine_pcm_get_caps(struct device *dev, struct dma_slave_caps *caps) +{
- struct snd_soc_platform *platform;
- struct dmaengine_pcm *pcm;
- int ret = -ENODEV;
- platform = snd_soc_lookup_platform(dev);
- if (!platform)
return ret;- pcm = soc_platform_to_pcm(platform);
- if (pcm->chan)
ret = dma_get_slave_caps(pcm->chan[0], caps);- return ret;
+} +EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_get_caps);
I don't see the need of this wrapper if you are not going to use this inside common code.. Why not read this in driver, anyway you setting taht up in next patch
On 2015/10/15 12:05, Vinod Koul wrote:
On Thu, Oct 15, 2015 at 09:36:38AM +0800, Shawn Lin wrote:
+int snd_dmaengine_pcm_get_caps(struct device *dev, struct dma_slave_caps *caps) +{
- struct snd_soc_platform *platform;
- struct dmaengine_pcm *pcm;
- int ret = -ENODEV;
- platform = snd_soc_lookup_platform(dev);
- if (!platform)
return ret;- pcm = soc_platform_to_pcm(platform);
- if (pcm->chan)
ret = dma_get_slave_caps(pcm->chan[0], caps);- return ret;
+} +EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_get_caps);
I don't see the need of this wrapper if you are not going to use this inside common code.. Why not read this in driver, anyway you setting taht up in next patch
okay, I will read it in driver directly.
Thanks.
From: Yiwei Cai cain.cai@rock-chips.com
Test with command - arecord -D hw:0,0 /tmp/a.wav, there are the error dump: dma-pl330 ffb20000.dma-controller: fill_queue:2251 Bad Desc(7)
This error is happening when no a multiple of burst size * burst length are coming in. The root cause is pl330 dma controller on Rockchips' platform cannot support DMAFLUSHP instruction which make dma to flush the req of non-aligned or non-multiple of what we set before. The saftest way is to set dma max burst to 1.
Signed-off-by: Yiwei Cai cain.cai@rock-chips.com Fixes: 4495c89fc ("ASoC: add driver for Rockchip RK3xxx I2S") Signed-off-by: Shawn Lin shawn.lin@rock-chips.com cc: Addy Ke addy.ke@rock-chips.com cc: Jianqun Xu xjq@rock-chips.com cc: Heiko Stuebner heiko@sntech.de cc: Olof Johansson olof@lixom.net cc: Doug Anderson dianders@chromium.org cc: Sonny Rao sonnyrao@chromium.org
Acked-by: Mark Brown broonie@kernel.org ---
Changes in v6: - remove quirks and get dma caps in order to limit burst
Changes in v5: - use switch statement for dma_quirk's manipulation
Changes in v4: None Changes in v3: None Changes in v2: None Changes in v1: None
sound/soc/rockchip/rockchip_i2s.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c index b936102..f00200a 100644 --- a/sound/soc/rockchip/rockchip_i2s.c +++ b/sound/soc/rockchip/rockchip_i2s.c @@ -418,6 +418,7 @@ static int rockchip_i2s_probe(struct platform_device *pdev) struct rk_i2s_dev *i2s; struct resource *res; void __iomem *regs; + struct dma_slave_caps *dma_caps; int ret;
i2s = devm_kzalloc(&pdev->dev, sizeof(*i2s), GFP_KERNEL); @@ -459,11 +460,24 @@ static int rockchip_i2s_probe(struct platform_device *pdev)
i2s->playback_dma_data.addr = res->start + I2S_TXDR; i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; - i2s->playback_dma_data.maxburst = 4;
i2s->capture_dma_data.addr = res->start + I2S_RXDR; i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; - i2s->capture_dma_data.maxburst = 4; + + if (snd_dmaengine_pcm_get_caps(&pdev->dev, &dma_caps) == 0) { + if (dma_caps.max_burst > 4) { + i2s->playback_dma_data.maxburst = 4; + i2s->capture_dma_data.maxburst = 4; + } else { + i2s->playback_dma_data.maxburst = 1; + i2s->capture_dma_data.maxburst = 1; + } + } else { + i2s->playback_dma_data.maxburst = 1; + i2s->capture_dma_data.maxburst = 1; + dev_info(&pdev->dev, + "Can't get dma caps, default limit maxburst to 1.\n"); + }
i2s->dev = &pdev->dev; dev_set_drvdata(&pdev->dev, i2s);
On 10/15/2015 03:36 AM, Shawn Lin wrote: [...]
- if (snd_dmaengine_pcm_get_caps(&pdev->dev, &dma_caps) == 0) {
if (dma_caps.max_burst > 4) {i2s->playback_dma_data.maxburst = 4;i2s->capture_dma_data.maxburst = 4;} else {i2s->playback_dma_data.maxburst = 1;i2s->capture_dma_data.maxburst = 1;
So this is what this is all about? I though you might have to program some FIFO threshold registers in the peripheral itself.
But it seems all this does is to read the maximum burst length from the DMA controller only to tell the DMA controller that this is the maximum burst length it should use. That seems rather unnecessary.
The maxburst field of the dma_data indicates the maximum burst length that the audio peripheral can handle. Typically this is the number of samples the audio FIFO can receive without overflowing after sending the DMA request signal. Since as the name suggests this is the maximum burst size the DMA controller is free to choose a burst size smaller than this when writing data to the peripheral.
So in your case instead of introducing all these facilities to query the maximum burst size it should be OK to simply reduce the burst size in the DMA controller itself when it gets a request with a burst size larger than it can handle, or is there a reason why this is not possible?
- Lars
在 2015年10月15日 16:53, Lars-Peter Clausen 写道:
On 10/15/2015 03:36 AM, Shawn Lin wrote: [...]
- if (snd_dmaengine_pcm_get_caps(&pdev->dev, &dma_caps) == 0) {
if (dma_caps.max_burst > 4) {i2s->playback_dma_data.maxburst = 4;i2s->capture_dma_data.maxburst = 4;} else {i2s->playback_dma_data.maxburst = 1;i2s->capture_dma_data.maxburst = 1;So this is what this is all about? I though you might have to program some FIFO threshold registers in the peripheral itself.
But it seems all this does is to read the maximum burst length from the DMA controller only to tell the DMA controller that this is the maximum burst length it should use. That seems rather unnecessary.
The maxburst field of the dma_data indicates the maximum burst length that the audio peripheral can handle. Typically this is the number of samples the audio FIFO can receive without overflowing after sending the DMA request signal. Since as the name suggests this is the maximum burst size the DMA controller is free to choose a burst size smaller than this when writing data to the peripheral.
So in your case instead of introducing all these facilities to query the maximum burst size it should be OK to simply reduce the burst size in the DMA controller itself when it gets a request with a burst size larger than it can handle, or is there a reason why this is not possible?
Agree with Lars, it's better to fix on DMA driver side since issue caused by dma-controller instead of i2s controller
- Lars
participants (4)
-
Jianqun Xu -
Lars-Peter Clausen -
Shawn Lin -
Vinod Koul