CPU support for TX49xx is getting removed, so remove support in network drivers for it.

Signed-off-by: Thomas Bogendoerfer tsbogend@alpha.franken.de --- drivers/net/ethernet/toshiba/tc35815.c | 29 -------------------------- 1 file changed, 29 deletions(-)

diff --git a/drivers/net/ethernet/toshiba/tc35815.c b/drivers/net/ethernet/toshiba/tc35815.c index 7a6e5ff8e5d4..d4712cd2e28c 100644 --- a/drivers/net/ethernet/toshiba/tc35815.c +++ b/drivers/net/ethernet/toshiba/tc35815.c @@ -687,39 +687,10 @@ static int tc_mii_init(struct net_device *dev) return err; }

-#ifdef CONFIG_CPU_TX49XX -/* - * Find a platform_device providing a MAC address. The platform code - * should provide a "tc35815-mac" device with a MAC address in its - * platform_data. - */ -static int tc35815_mac_match(struct device *dev, const void *data) -{ - struct platform_device *plat_dev = to_platform_device(dev); - const struct pci_dev *pci_dev = data; - unsigned int id = pci_dev->irq; - return !strcmp(plat_dev->name, "tc35815-mac") && plat_dev->id == id; -} - static int tc35815_read_plat_dev_addr(struct net_device *dev) { - struct tc35815_local *lp = netdev_priv(dev); - struct device *pd = bus_find_device(&platform_bus_type, NULL, - lp->pci_dev, tc35815_mac_match); - if (pd) { - if (pd->platform_data) - memcpy(dev->dev_addr, pd->platform_data, ETH_ALEN); - put_device(pd); - return is_valid_ether_addr(dev->dev_addr) ? 0 : -ENODEV; - } return -ENODEV; } -#else -static int tc35815_read_plat_dev_addr(struct net_device *dev) -{ - return -ENODEV; -} -#endif

static int tc35815_init_dev_addr(struct net_device *dev) {

CPU support for TX49xx is getting removed, so remove support SPI driver for it.

Signed-off-by: Thomas Bogendoerfer tsbogend@alpha.franken.de --- drivers/spi/Kconfig | 6 - drivers/spi/Makefile | 1 - drivers/spi/spi-txx9.c | 477 ----------------------------------------- 3 files changed, 484 deletions(-) delete mode 100644 drivers/spi/spi-txx9.c

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index aadaea052f51..7e9d91bbb996 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -885,12 +885,6 @@ config SPI_TOPCLIFF_PCH This driver also supports the ML7213/ML7223/ML7831, a companion chip for the Atom E6xx series and compatible with the Intel EG20T PCH.

-config SPI_TXX9 - tristate "Toshiba TXx9 SPI controller" - depends on GPIOLIB && (CPU_TX49XX || COMPILE_TEST) - help - SPI driver for Toshiba TXx9 MIPS SoCs - config SPI_UNIPHIER tristate "Socionext UniPhier SPI Controller" depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 6fea5821662e..9578b40e7800 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -122,7 +122,6 @@ obj-$(CONFIG_SPI_TLE62X0) += spi-tle62x0.o spi-thunderx-objs := spi-cavium.o spi-cavium-thunderx.o obj-$(CONFIG_SPI_THUNDERX) += spi-thunderx.o obj-$(CONFIG_SPI_TOPCLIFF_PCH) += spi-topcliff-pch.o -obj-$(CONFIG_SPI_TXX9) += spi-txx9.o obj-$(CONFIG_SPI_UNIPHIER) += spi-uniphier.o obj-$(CONFIG_SPI_XCOMM) += spi-xcomm.o obj-$(CONFIG_SPI_XILINX) += spi-xilinx.o diff --git a/drivers/spi/spi-txx9.c b/drivers/spi/spi-txx9.c deleted file mode 100644 index 3606232f190f..000000000000 --- a/drivers/spi/spi-txx9.c +++ /dev/null @@ -1,477 +0,0 @@ -/* - * TXx9 SPI controller driver. - * - * Based on linux/arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c - * Copyright (C) 2000-2001 Toshiba Corporation - * - * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the - * terms of the GNU General Public License version 2. This program is - * licensed "as is" without any warranty of any kind, whether express - * or implied. - * - * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com) - * - * Convert to generic SPI framework - Atsushi Nemoto (anemo@mba.ocn.ne.jp) - */ -#include <linux/init.h> -#include <linux/delay.h> -#include <linux/errno.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <linux/sched.h> -#include <linux/spinlock.h> -#include <linux/workqueue.h> -#include <linux/spi/spi.h> -#include <linux/err.h> -#include <linux/clk.h> -#include <linux/io.h> -#include <linux/module.h> -#include <linux/gpio/machine.h> -#include <linux/gpio/consumer.h> - - -#define SPI_FIFO_SIZE 4 -#define SPI_MAX_DIVIDER 0xff /* Max. value for SPCR1.SER */ -#define SPI_MIN_DIVIDER 1 /* Min. value for SPCR1.SER */ - -#define TXx9_SPMCR 0x00 -#define TXx9_SPCR0 0x04 -#define TXx9_SPCR1 0x08 -#define TXx9_SPFS 0x0c -#define TXx9_SPSR 0x14 -#define TXx9_SPDR 0x18 - -/* SPMCR : SPI Master Control */ -#define TXx9_SPMCR_OPMODE 0xc0 -#define TXx9_SPMCR_CONFIG 0x40 -#define TXx9_SPMCR_ACTIVE 0x80 -#define TXx9_SPMCR_SPSTP 0x02 -#define TXx9_SPMCR_BCLR 0x01 - -/* SPCR0 : SPI Control 0 */ -#define TXx9_SPCR0_TXIFL_MASK 0xc000 -#define TXx9_SPCR0_RXIFL_MASK 0x3000 -#define TXx9_SPCR0_SIDIE 0x0800 -#define TXx9_SPCR0_SOEIE 0x0400 -#define TXx9_SPCR0_RBSIE 0x0200 -#define TXx9_SPCR0_TBSIE 0x0100 -#define TXx9_SPCR0_IFSPSE 0x0010 -#define TXx9_SPCR0_SBOS 0x0004 -#define TXx9_SPCR0_SPHA 0x0002 -#define TXx9_SPCR0_SPOL 0x0001 - -/* SPSR : SPI Status */ -#define TXx9_SPSR_TBSI 0x8000 -#define TXx9_SPSR_RBSI 0x4000 -#define TXx9_SPSR_TBS_MASK 0x3800 -#define TXx9_SPSR_RBS_MASK 0x0700 -#define TXx9_SPSR_SPOE 0x0080 -#define TXx9_SPSR_IFSD 0x0008 -#define TXx9_SPSR_SIDLE 0x0004 -#define TXx9_SPSR_STRDY 0x0002 -#define TXx9_SPSR_SRRDY 0x0001 - - -struct txx9spi { - struct work_struct work; - spinlock_t lock; /* protect 'queue' */ - struct list_head queue; - wait_queue_head_t waitq; - void __iomem *membase; - int baseclk; - struct clk *clk; - struct gpio_desc *last_chipselect; - int last_chipselect_val; -}; - -static u32 txx9spi_rd(struct txx9spi *c, int reg) -{ - return __raw_readl(c->membase + reg); -} -static void txx9spi_wr(struct txx9spi *c, u32 val, int reg) -{ - __raw_writel(val, c->membase + reg); -} - -static void txx9spi_cs_func(struct spi_device *spi, struct txx9spi *c, - int on, unsigned int cs_delay) -{ - /* - * The GPIO descriptor will track polarity inversion inside - * gpiolib. - */ - if (on) { - /* deselect the chip with cs_change hint in last transfer */ - if (c->last_chipselect) - gpiod_set_value(c->last_chipselect, - !c->last_chipselect_val); - c->last_chipselect = spi->cs_gpiod; - c->last_chipselect_val = on; - } else { - c->last_chipselect = NULL; - ndelay(cs_delay); /* CS Hold Time */ - } - gpiod_set_value(spi->cs_gpiod, on); - ndelay(cs_delay); /* CS Setup Time / CS Recovery Time */ -} - -static int txx9spi_setup(struct spi_device *spi) -{ - struct txx9spi *c = spi_master_get_devdata(spi->master); - - if (!spi->max_speed_hz) - return -EINVAL; - - /* deselect chip */ - spin_lock(&c->lock); - txx9spi_cs_func(spi, c, 0, (NSEC_PER_SEC / 2) / spi->max_speed_hz); - spin_unlock(&c->lock); - - return 0; -} - -static irqreturn_t txx9spi_interrupt(int irq, void *dev_id) -{ - struct txx9spi *c = dev_id; - - /* disable rx intr */ - txx9spi_wr(c, txx9spi_rd(c, TXx9_SPCR0) & ~TXx9_SPCR0_RBSIE, - TXx9_SPCR0); - wake_up(&c->waitq); - return IRQ_HANDLED; -} - -static void txx9spi_work_one(struct txx9spi *c, struct spi_message *m) -{ - struct spi_device *spi = m->spi; - struct spi_transfer *t; - unsigned int cs_delay; - unsigned int cs_change = 1; - int status = 0; - u32 mcr; - u32 prev_speed_hz = 0; - u8 prev_bits_per_word = 0; - - /* CS setup/hold/recovery time in nsec */ - cs_delay = 100 + (NSEC_PER_SEC / 2) / spi->max_speed_hz; - - mcr = txx9spi_rd(c, TXx9_SPMCR); - if (unlikely((mcr & TXx9_SPMCR_OPMODE) == TXx9_SPMCR_ACTIVE)) { - dev_err(&spi->dev, "Bad mode.\n"); - status = -EIO; - goto exit; - } - mcr &= ~(TXx9_SPMCR_OPMODE | TXx9_SPMCR_SPSTP | TXx9_SPMCR_BCLR); - - /* enter config mode */ - txx9spi_wr(c, mcr | TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR, TXx9_SPMCR); - txx9spi_wr(c, TXx9_SPCR0_SBOS - | ((spi->mode & SPI_CPOL) ? TXx9_SPCR0_SPOL : 0) - | ((spi->mode & SPI_CPHA) ? TXx9_SPCR0_SPHA : 0) - | 0x08, - TXx9_SPCR0); - - list_for_each_entry(t, &m->transfers, transfer_list) { - const void *txbuf = t->tx_buf; - void *rxbuf = t->rx_buf; - u32 data; - unsigned int len = t->len; - unsigned int wsize; - u32 speed_hz = t->speed_hz; - u8 bits_per_word = t->bits_per_word; - - wsize = bits_per_word >> 3; /* in bytes */ - - if (prev_speed_hz != speed_hz - || prev_bits_per_word != bits_per_word) { - int n = DIV_ROUND_UP(c->baseclk, speed_hz) - 1; - - n = clamp(n, SPI_MIN_DIVIDER, SPI_MAX_DIVIDER); - /* enter config mode */ - txx9spi_wr(c, mcr | TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR, - TXx9_SPMCR); - txx9spi_wr(c, (n << 8) | bits_per_word, TXx9_SPCR1); - /* enter active mode */ - txx9spi_wr(c, mcr | TXx9_SPMCR_ACTIVE, TXx9_SPMCR); - - prev_speed_hz = speed_hz; - prev_bits_per_word = bits_per_word; - } - - if (cs_change) - txx9spi_cs_func(spi, c, 1, cs_delay); - cs_change = t->cs_change; - while (len) { - unsigned int count = SPI_FIFO_SIZE; - int i; - u32 cr0; - - if (len < count * wsize) - count = len / wsize; - /* now tx must be idle... */ - while (!(txx9spi_rd(c, TXx9_SPSR) & TXx9_SPSR_SIDLE)) - cpu_relax(); - cr0 = txx9spi_rd(c, TXx9_SPCR0); - cr0 &= ~TXx9_SPCR0_RXIFL_MASK; - cr0 |= (count - 1) << 12; - /* enable rx intr */ - cr0 |= TXx9_SPCR0_RBSIE; - txx9spi_wr(c, cr0, TXx9_SPCR0); - /* send */ - for (i = 0; i < count; i++) { - if (txbuf) { - data = (wsize == 1) - ? *(const u8 *)txbuf - : *(const u16 *)txbuf; - txx9spi_wr(c, data, TXx9_SPDR); - txbuf += wsize; - } else - txx9spi_wr(c, 0, TXx9_SPDR); - } - /* wait all rx data */ - wait_event(c->waitq, - txx9spi_rd(c, TXx9_SPSR) & TXx9_SPSR_RBSI); - /* receive */ - for (i = 0; i < count; i++) { - data = txx9spi_rd(c, TXx9_SPDR); - if (rxbuf) { - if (wsize == 1) - *(u8 *)rxbuf = data; - else - *(u16 *)rxbuf = data; - rxbuf += wsize; - } - } - len -= count * wsize; - } - m->actual_length += t->len; - spi_transfer_delay_exec(t); - - if (!cs_change) - continue; - if (t->transfer_list.next == &m->transfers) - break; - /* sometimes a short mid-message deselect of the chip - * may be needed to terminate a mode or command - */ - txx9spi_cs_func(spi, c, 0, cs_delay); - } - -exit: - m->status = status; - if (m->complete) - m->complete(m->context); - - /* normally deactivate chipselect ... unless no error and - * cs_change has hinted that the next message will probably - * be for this chip too. - */ - if (!(status == 0 && cs_change)) - txx9spi_cs_func(spi, c, 0, cs_delay); - - /* enter config mode */ - txx9spi_wr(c, mcr | TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR, TXx9_SPMCR); -} - -static void txx9spi_work(struct work_struct *work) -{ - struct txx9spi *c = container_of(work, struct txx9spi, work); - unsigned long flags; - - spin_lock_irqsave(&c->lock, flags); - while (!list_empty(&c->queue)) { - struct spi_message *m; - - m = container_of(c->queue.next, struct spi_message, queue); - list_del_init(&m->queue); - spin_unlock_irqrestore(&c->lock, flags); - - txx9spi_work_one(c, m); - - spin_lock_irqsave(&c->lock, flags); - } - spin_unlock_irqrestore(&c->lock, flags); -} - -static int txx9spi_transfer(struct spi_device *spi, struct spi_message *m) -{ - struct spi_master *master = spi->master; - struct txx9spi *c = spi_master_get_devdata(master); - struct spi_transfer *t; - unsigned long flags; - - m->actual_length = 0; - - /* check each transfer's parameters */ - list_for_each_entry(t, &m->transfers, transfer_list) { - if (!t->tx_buf && !t->rx_buf && t->len) - return -EINVAL; - } - - spin_lock_irqsave(&c->lock, flags); - list_add_tail(&m->queue, &c->queue); - schedule_work(&c->work); - spin_unlock_irqrestore(&c->lock, flags); - - return 0; -} - -/* - * Chip select uses GPIO only, further the driver is using the chip select - * numer (from the device tree "reg" property, and this can only come from - * device tree since this i MIPS and there is no way to pass platform data) as - * the GPIO number. As the platform has only one GPIO controller (the txx9 GPIO - * chip) it is thus using the chip select number as an offset into that chip. - * This chip has a maximum of 16 GPIOs 0..15 and this is what all platforms - * register. - * - * We modernized this behaviour by explicitly converting that offset to an - * offset on the GPIO chip using a GPIO descriptor machine table of the same - * size as the txx9 GPIO chip with a 1-to-1 mapping of chip select to GPIO - * offset. - * - * This is admittedly a hack, but it is countering the hack of using "reg" to - * contain a GPIO offset when it should be using "cs-gpios" as the SPI bindings - * state. - */ -static struct gpiod_lookup_table txx9spi_cs_gpio_table = { - .dev_id = "spi0", - .table = { - GPIO_LOOKUP_IDX("TXx9", 0, "cs", 0, GPIO_ACTIVE_LOW), - GPIO_LOOKUP_IDX("TXx9", 1, "cs", 1, GPIO_ACTIVE_LOW), - GPIO_LOOKUP_IDX("TXx9", 2, "cs", 2, GPIO_ACTIVE_LOW), - GPIO_LOOKUP_IDX("TXx9", 3, "cs", 3, GPIO_ACTIVE_LOW), - GPIO_LOOKUP_IDX("TXx9", 4, "cs", 4, GPIO_ACTIVE_LOW), - GPIO_LOOKUP_IDX("TXx9", 5, "cs", 5, GPIO_ACTIVE_LOW), - GPIO_LOOKUP_IDX("TXx9", 6, "cs", 6, GPIO_ACTIVE_LOW), - GPIO_LOOKUP_IDX("TXx9", 7, "cs", 7, GPIO_ACTIVE_LOW), - GPIO_LOOKUP_IDX("TXx9", 8, "cs", 8, GPIO_ACTIVE_LOW), - GPIO_LOOKUP_IDX("TXx9", 9, "cs", 9, GPIO_ACTIVE_LOW), - GPIO_LOOKUP_IDX("TXx9", 10, "cs", 10, GPIO_ACTIVE_LOW), - GPIO_LOOKUP_IDX("TXx9", 11, "cs", 11, GPIO_ACTIVE_LOW), - GPIO_LOOKUP_IDX("TXx9", 12, "cs", 12, GPIO_ACTIVE_LOW), - GPIO_LOOKUP_IDX("TXx9", 13, "cs", 13, GPIO_ACTIVE_LOW), - GPIO_LOOKUP_IDX("TXx9", 14, "cs", 14, GPIO_ACTIVE_LOW), - GPIO_LOOKUP_IDX("TXx9", 15, "cs", 15, GPIO_ACTIVE_LOW), - { }, - }, -}; - -static int txx9spi_probe(struct platform_device *dev) -{ - struct spi_master *master; - struct txx9spi *c; - struct resource *res; - int ret = -ENODEV; - u32 mcr; - int irq; - - master = spi_alloc_master(&dev->dev, sizeof(*c)); - if (!master) - return ret; - c = spi_master_get_devdata(master); - platform_set_drvdata(dev, master); - - INIT_WORK(&c->work, txx9spi_work); - spin_lock_init(&c->lock); - INIT_LIST_HEAD(&c->queue); - init_waitqueue_head(&c->waitq); - - c->clk = devm_clk_get(&dev->dev, "spi-baseclk"); - if (IS_ERR(c->clk)) { - ret = PTR_ERR(c->clk); - c->clk = NULL; - goto exit; - } - ret = clk_prepare_enable(c->clk); - if (ret) { - c->clk = NULL; - goto exit; - } - c->baseclk = clk_get_rate(c->clk); - master->min_speed_hz = DIV_ROUND_UP(c->baseclk, SPI_MAX_DIVIDER + 1); - master->max_speed_hz = c->baseclk / (SPI_MIN_DIVIDER + 1); - - res = platform_get_resource(dev, IORESOURCE_MEM, 0); - c->membase = devm_ioremap_resource(&dev->dev, res); - if (IS_ERR(c->membase)) - goto exit_busy; - - /* enter config mode */ - mcr = txx9spi_rd(c, TXx9_SPMCR); - mcr &= ~(TXx9_SPMCR_OPMODE | TXx9_SPMCR_SPSTP | TXx9_SPMCR_BCLR); - txx9spi_wr(c, mcr | TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR, TXx9_SPMCR); - - irq = platform_get_irq(dev, 0); - if (irq < 0) - goto exit_busy; - ret = devm_request_irq(&dev->dev, irq, txx9spi_interrupt, 0, - "spi_txx9", c); - if (ret) - goto exit; - - c->last_chipselect = NULL; - - dev_info(&dev->dev, "at %#llx, irq %d, %dMHz\n", - (unsigned long long)res->start, irq, - (c->baseclk + 500000) / 1000000); - - gpiod_add_lookup_table(&txx9spi_cs_gpio_table); - - /* the spi->mode bits understood by this driver: */ - master->mode_bits = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA; - - master->bus_num = dev->id; - master->setup = txx9spi_setup; - master->transfer = txx9spi_transfer; - master->num_chipselect = (u16)UINT_MAX; /* any GPIO numbers */ - master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16); - master->use_gpio_descriptors = true; - - ret = devm_spi_register_master(&dev->dev, master); - if (ret) - goto exit; - return 0; -exit_busy: - ret = -EBUSY; -exit: - clk_disable_unprepare(c->clk); - spi_master_put(master); - return ret; -} - -static int txx9spi_remove(struct platform_device *dev) -{ - struct spi_master *master = platform_get_drvdata(dev); - struct txx9spi *c = spi_master_get_devdata(master); - - flush_work(&c->work); - clk_disable_unprepare(c->clk); - return 0; -} - -/* work with hotplug and coldplug */ -MODULE_ALIAS("platform:spi_txx9"); - -static struct platform_driver txx9spi_driver = { - .probe = txx9spi_probe, - .remove = txx9spi_remove, - .driver = { - .name = "spi_txx9", - }, -}; - -static int __init txx9spi_init(void) -{ - return platform_driver_register(&txx9spi_driver); -} -subsys_initcall(txx9spi_init); - -static void __exit txx9spi_exit(void) -{ - platform_driver_unregister(&txx9spi_driver); -} -module_exit(txx9spi_exit); - -MODULE_DESCRIPTION("TXx9 SPI Driver"); -MODULE_LICENSE("GPL");

CPU support for TX49xx is getting removed, so remove MTD support for it.

Signed-off-by: Thomas Bogendoerfer tsbogend@alpha.franken.de --- drivers/mtd/maps/Kconfig | 6 - drivers/mtd/maps/Makefile | 1 - drivers/mtd/maps/rbtx4939-flash.c | 133 ------- drivers/mtd/nand/raw/Kconfig | 7 - drivers/mtd/nand/raw/Makefile | 1 - drivers/mtd/nand/raw/txx9ndfmc.c | 423 ----------------------- include/linux/platform_data/txx9/ndfmc.h | 28 -- 7 files changed, 599 deletions(-) delete mode 100644 drivers/mtd/maps/rbtx4939-flash.c delete mode 100644 drivers/mtd/nand/raw/txx9ndfmc.c delete mode 100644 include/linux/platform_data/txx9/ndfmc.h

diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig index 6650acbc961e..17579ce04922 100644 --- a/drivers/mtd/maps/Kconfig +++ b/drivers/mtd/maps/Kconfig @@ -380,12 +380,6 @@ config MTD_INTEL_VR_NOR Map driver for a NOR flash bank located on the Expansion Bus of the Intel Vermilion Range chipset.

-config MTD_RBTX4939 - tristate "Map driver for RBTX4939 board" - depends on TOSHIBA_RBTX4939 && MTD_CFI && MTD_COMPLEX_MAPPINGS - help - Map driver for NOR flash chips on RBTX4939 board. - config MTD_PLATRAM tristate "Map driver for platform device RAM (mtd-ram)" select MTD_RAM diff --git a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile index 79f018cf412f..408a2217b0f2 100644 --- a/drivers/mtd/maps/Makefile +++ b/drivers/mtd/maps/Makefile @@ -43,6 +43,5 @@ obj-$(CONFIG_MTD_SCB2_FLASH) += scb2_flash.o obj-$(CONFIG_MTD_IXP4XX) += ixp4xx.o obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o obj-$(CONFIG_MTD_INTEL_VR_NOR) += intel_vr_nor.o -obj-$(CONFIG_MTD_RBTX4939) += rbtx4939-flash.o obj-$(CONFIG_MTD_VMU) += vmu-flash.o obj-$(CONFIG_MTD_LANTIQ) += lantiq-flash.o diff --git a/drivers/mtd/maps/rbtx4939-flash.c b/drivers/mtd/maps/rbtx4939-flash.c deleted file mode 100644 index 39c86c0b0ec1..000000000000 --- a/drivers/mtd/maps/rbtx4939-flash.c +++ /dev/null @@ -1,133 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * rbtx4939-flash (based on physmap.c) - * - * This is a simplified physmap driver with map_init callback function. - * - * Copyright (C) 2009 Atsushi Nemoto anemo@mba.ocn.ne.jp - */ - -#include <linux/module.h> -#include <linux/types.h> -#include <linux/kernel.h> -#include <linux/slab.h> -#include <linux/device.h> -#include <linux/platform_device.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/map.h> -#include <linux/mtd/partitions.h> -#include <asm/txx9/rbtx4939.h> - -struct rbtx4939_flash_info { - struct mtd_info *mtd; - struct map_info map; -}; - -static int rbtx4939_flash_remove(struct platform_device *dev) -{ - struct rbtx4939_flash_info *info; - - info = platform_get_drvdata(dev); - if (!info) - return 0; - - if (info->mtd) { - mtd_device_unregister(info->mtd); - map_destroy(info->mtd); - } - return 0; -} - -static const char * const rom_probe_types[] = { - "cfi_probe", "jedec_probe", NULL }; - -static int rbtx4939_flash_probe(struct platform_device *dev) -{ - struct rbtx4939_flash_data *pdata; - struct rbtx4939_flash_info *info; - struct resource *res; - const char * const *probe_type; - int err = 0; - unsigned long size; - - pdata = dev_get_platdata(&dev->dev); - if (!pdata) - return -ENODEV; - - res = platform_get_resource(dev, IORESOURCE_MEM, 0); - if (!res) - return -ENODEV; - info = devm_kzalloc(&dev->dev, sizeof(struct rbtx4939_flash_info), - GFP_KERNEL); - if (!info) - return -ENOMEM; - - platform_set_drvdata(dev, info); - - size = resource_size(res); - pr_notice("rbtx4939 platform flash device: %pR\n", res); - - if (!devm_request_mem_region(&dev->dev, res->start, size, - dev_name(&dev->dev))) - return -EBUSY; - - info->map.name = dev_name(&dev->dev); - info->map.phys = res->start; - info->map.size = size; - info->map.bankwidth = pdata->width; - - info->map.virt = devm_ioremap(&dev->dev, info->map.phys, size); - if (!info->map.virt) - return -EBUSY; - - if (pdata->map_init) - (*pdata->map_init)(&info->map); - else - simple_map_init(&info->map); - - probe_type = rom_probe_types; - for (; !info->mtd && *probe_type; probe_type++) - info->mtd = do_map_probe(*probe_type, &info->map); - if (!info->mtd) { - dev_err(&dev->dev, "map_probe failed\n"); - err = -ENXIO; - goto err_out; - } - info->mtd->dev.parent = &dev->dev; - err = mtd_device_register(info->mtd, pdata->parts, pdata->nr_parts); - - if (err) - goto err_out; - return 0; - -err_out: - rbtx4939_flash_remove(dev); - return err; -} - -#ifdef CONFIG_PM -static void rbtx4939_flash_shutdown(struct platform_device *dev) -{ - struct rbtx4939_flash_info *info = platform_get_drvdata(dev); - - if (mtd_suspend(info->mtd) == 0) - mtd_resume(info->mtd); -} -#else -#define rbtx4939_flash_shutdown NULL -#endif - -static struct platform_driver rbtx4939_flash_driver = { - .probe = rbtx4939_flash_probe, - .remove = rbtx4939_flash_remove, - .shutdown = rbtx4939_flash_shutdown, - .driver = { - .name = "rbtx4939-flash", - }, -}; - -module_platform_driver(rbtx4939_flash_driver); - -MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION("RBTX4939 MTD map driver"); -MODULE_ALIAS("platform:rbtx4939-flash"); diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index 442a039b92f3..9e74a63b18a4 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -313,13 +313,6 @@ config MTD_NAND_DAVINCI Enable the driver for NAND flash chips on Texas Instruments DaVinci/Keystone processors.

-config MTD_NAND_TXX9NDFMC - tristate "TXx9 NAND controller" - depends on SOC_TX4938 || SOC_TX4939 || COMPILE_TEST - depends on HAS_IOMEM - help - This enables the NAND flash controller on the TXx9 SoCs. - config MTD_NAND_SOCRATES tristate "Socrates NAND controller" depends on SOCRATES diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile index 32475a28d8f8..07cb86321403 100644 --- a/drivers/mtd/nand/raw/Makefile +++ b/drivers/mtd/nand/raw/Makefile @@ -37,7 +37,6 @@ obj-$(CONFIG_MTD_NAND_MLC_LPC32XX) += lpc32xx_mlc.o obj-$(CONFIG_MTD_NAND_SH_FLCTL) += sh_flctl.o obj-$(CONFIG_MTD_NAND_MXC) += mxc_nand.o obj-$(CONFIG_MTD_NAND_SOCRATES) += socrates_nand.o -obj-$(CONFIG_MTD_NAND_TXX9NDFMC) += txx9ndfmc.o obj-$(CONFIG_MTD_NAND_MPC5121_NFC) += mpc5121_nfc.o obj-$(CONFIG_MTD_NAND_VF610_NFC) += vf610_nfc.o obj-$(CONFIG_MTD_NAND_RICOH) += r852.o diff --git a/drivers/mtd/nand/raw/txx9ndfmc.c b/drivers/mtd/nand/raw/txx9ndfmc.c deleted file mode 100644 index 1a9449e53bf9..000000000000 --- a/drivers/mtd/nand/raw/txx9ndfmc.c +++ /dev/null @@ -1,423 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * TXx9 NAND flash memory controller driver - * Based on RBTX49xx patch from CELF patch archive. - * - * (C) Copyright TOSHIBA CORPORATION 2004-2007 - * All Rights Reserved. - */ -#include <linux/err.h> -#include <linux/init.h> -#include <linux/slab.h> -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/rawnand.h> -#include <linux/mtd/partitions.h> -#include <linux/io.h> -#include <linux/platform_data/txx9/ndfmc.h> - -/* TXX9 NDFMC Registers */ -#define TXX9_NDFDTR 0x00 -#define TXX9_NDFMCR 0x04 -#define TXX9_NDFSR 0x08 -#define TXX9_NDFISR 0x0c -#define TXX9_NDFIMR 0x10 -#define TXX9_NDFSPR 0x14 -#define TXX9_NDFRSTR 0x18 /* not TX4939 */ - -/* NDFMCR : NDFMC Mode Control */ -#define TXX9_NDFMCR_WE 0x80 -#define TXX9_NDFMCR_ECC_ALL 0x60 -#define TXX9_NDFMCR_ECC_RESET 0x60 -#define TXX9_NDFMCR_ECC_READ 0x40 -#define TXX9_NDFMCR_ECC_ON 0x20 -#define TXX9_NDFMCR_ECC_OFF 0x00 -#define TXX9_NDFMCR_CE 0x10 -#define TXX9_NDFMCR_BSPRT 0x04 /* TX4925/TX4926 only */ -#define TXX9_NDFMCR_ALE 0x02 -#define TXX9_NDFMCR_CLE 0x01 -/* TX4939 only */ -#define TXX9_NDFMCR_X16 0x0400 -#define TXX9_NDFMCR_DMAREQ_MASK 0x0300 -#define TXX9_NDFMCR_DMAREQ_NODMA 0x0000 -#define TXX9_NDFMCR_DMAREQ_128 0x0100 -#define TXX9_NDFMCR_DMAREQ_256 0x0200 -#define TXX9_NDFMCR_DMAREQ_512 0x0300 -#define TXX9_NDFMCR_CS_MASK 0x0c -#define TXX9_NDFMCR_CS(ch) ((ch) << 2) - -/* NDFMCR : NDFMC Status */ -#define TXX9_NDFSR_BUSY 0x80 -/* TX4939 only */ -#define TXX9_NDFSR_DMARUN 0x40 - -/* NDFMCR : NDFMC Reset */ -#define TXX9_NDFRSTR_RST 0x01 - -struct txx9ndfmc_priv { - struct platform_device *dev; - struct nand_chip chip; - int cs; - const char *mtdname; -}; - -#define MAX_TXX9NDFMC_DEV 4 -struct txx9ndfmc_drvdata { - struct mtd_info *mtds[MAX_TXX9NDFMC_DEV]; - void __iomem *base; - unsigned char hold; /* in gbusclock */ - unsigned char spw; /* in gbusclock */ - struct nand_controller controller; -}; - -static struct platform_device *mtd_to_platdev(struct mtd_info *mtd) -{ - struct nand_chip *chip = mtd_to_nand(mtd); - struct txx9ndfmc_priv *txx9_priv = nand_get_controller_data(chip); - return txx9_priv->dev; -} - -static void __iomem *ndregaddr(struct platform_device *dev, unsigned int reg) -{ - struct txx9ndfmc_drvdata *drvdata = platform_get_drvdata(dev); - struct txx9ndfmc_platform_data *plat = dev_get_platdata(&dev->dev); - - return drvdata->base + (reg << plat->shift); -} - -static u32 txx9ndfmc_read(struct platform_device *dev, unsigned int reg) -{ - return __raw_readl(ndregaddr(dev, reg)); -} - -static void txx9ndfmc_write(struct platform_device *dev, - u32 val, unsigned int reg) -{ - __raw_writel(val, ndregaddr(dev, reg)); -} - -static uint8_t txx9ndfmc_read_byte(struct nand_chip *chip) -{ - struct platform_device *dev = mtd_to_platdev(nand_to_mtd(chip)); - - return txx9ndfmc_read(dev, TXX9_NDFDTR); -} - -static void txx9ndfmc_write_buf(struct nand_chip *chip, const uint8_t *buf, - int len) -{ - struct platform_device *dev = mtd_to_platdev(nand_to_mtd(chip)); - void __iomem *ndfdtr = ndregaddr(dev, TXX9_NDFDTR); - u32 mcr = txx9ndfmc_read(dev, TXX9_NDFMCR); - - txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_WE, TXX9_NDFMCR); - while (len--) - __raw_writel(*buf++, ndfdtr); - txx9ndfmc_write(dev, mcr, TXX9_NDFMCR); -} - -static void txx9ndfmc_read_buf(struct nand_chip *chip, uint8_t *buf, int len) -{ - struct platform_device *dev = mtd_to_platdev(nand_to_mtd(chip)); - void __iomem *ndfdtr = ndregaddr(dev, TXX9_NDFDTR); - - while (len--) - *buf++ = __raw_readl(ndfdtr); -} - -static void txx9ndfmc_cmd_ctrl(struct nand_chip *chip, int cmd, - unsigned int ctrl) -{ - struct txx9ndfmc_priv *txx9_priv = nand_get_controller_data(chip); - struct platform_device *dev = txx9_priv->dev; - struct txx9ndfmc_platform_data *plat = dev_get_platdata(&dev->dev); - - if (ctrl & NAND_CTRL_CHANGE) { - u32 mcr = txx9ndfmc_read(dev, TXX9_NDFMCR); - - mcr &= ~(TXX9_NDFMCR_CLE | TXX9_NDFMCR_ALE | TXX9_NDFMCR_CE); - mcr |= ctrl & NAND_CLE ? TXX9_NDFMCR_CLE : 0; - mcr |= ctrl & NAND_ALE ? TXX9_NDFMCR_ALE : 0; - /* TXX9_NDFMCR_CE bit is 0:high 1:low */ - mcr |= ctrl & NAND_NCE ? TXX9_NDFMCR_CE : 0; - if (txx9_priv->cs >= 0 && (ctrl & NAND_NCE)) { - mcr &= ~TXX9_NDFMCR_CS_MASK; - mcr |= TXX9_NDFMCR_CS(txx9_priv->cs); - } - txx9ndfmc_write(dev, mcr, TXX9_NDFMCR); - } - if (cmd != NAND_CMD_NONE) - txx9ndfmc_write(dev, cmd & 0xff, TXX9_NDFDTR); - if (plat->flags & NDFMC_PLAT_FLAG_DUMMYWRITE) { - /* dummy write to update external latch */ - if ((ctrl & NAND_CTRL_CHANGE) && cmd == NAND_CMD_NONE) - txx9ndfmc_write(dev, 0, TXX9_NDFDTR); - } -} - -static int txx9ndfmc_dev_ready(struct nand_chip *chip) -{ - struct platform_device *dev = mtd_to_platdev(nand_to_mtd(chip)); - - return !(txx9ndfmc_read(dev, TXX9_NDFSR) & TXX9_NDFSR_BUSY); -} - -static int txx9ndfmc_calculate_ecc(struct nand_chip *chip, const uint8_t *dat, - uint8_t *ecc_code) -{ - struct platform_device *dev = mtd_to_platdev(nand_to_mtd(chip)); - int eccbytes; - u32 mcr = txx9ndfmc_read(dev, TXX9_NDFMCR); - - mcr &= ~TXX9_NDFMCR_ECC_ALL; - txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_ECC_OFF, TXX9_NDFMCR); - txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_ECC_READ, TXX9_NDFMCR); - for (eccbytes = chip->ecc.bytes; eccbytes > 0; eccbytes -= 3) { - ecc_code[1] = txx9ndfmc_read(dev, TXX9_NDFDTR); - ecc_code[0] = txx9ndfmc_read(dev, TXX9_NDFDTR); - ecc_code[2] = txx9ndfmc_read(dev, TXX9_NDFDTR); - ecc_code += 3; - } - txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_ECC_OFF, TXX9_NDFMCR); - return 0; -} - -static int txx9ndfmc_correct_data(struct nand_chip *chip, unsigned char *buf, - unsigned char *read_ecc, - unsigned char *calc_ecc) -{ - int eccsize; - int corrected = 0; - int stat; - - for (eccsize = chip->ecc.size; eccsize > 0; eccsize -= 256) { - stat = rawnand_sw_hamming_correct(chip, buf, read_ecc, - calc_ecc); - if (stat < 0) - return stat; - corrected += stat; - buf += 256; - read_ecc += 3; - calc_ecc += 3; - } - return corrected; -} - -static void txx9ndfmc_enable_hwecc(struct nand_chip *chip, int mode) -{ - struct platform_device *dev = mtd_to_platdev(nand_to_mtd(chip)); - u32 mcr = txx9ndfmc_read(dev, TXX9_NDFMCR); - - mcr &= ~TXX9_NDFMCR_ECC_ALL; - txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_ECC_RESET, TXX9_NDFMCR); - txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_ECC_OFF, TXX9_NDFMCR); - txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_ECC_ON, TXX9_NDFMCR); -} - -static void txx9ndfmc_initialize(struct platform_device *dev) -{ - struct txx9ndfmc_platform_data *plat = dev_get_platdata(&dev->dev); - struct txx9ndfmc_drvdata *drvdata = platform_get_drvdata(dev); - int tmout = 100; - - if (plat->flags & NDFMC_PLAT_FLAG_NO_RSTR) - ; /* no NDFRSTR. Write to NDFSPR resets the NDFMC. */ - else { - /* reset NDFMC */ - txx9ndfmc_write(dev, - txx9ndfmc_read(dev, TXX9_NDFRSTR) | - TXX9_NDFRSTR_RST, - TXX9_NDFRSTR); - while (txx9ndfmc_read(dev, TXX9_NDFRSTR) & TXX9_NDFRSTR_RST) { - if (--tmout == 0) { - dev_err(&dev->dev, "reset failed.\n"); - break; - } - udelay(1); - } - } - /* setup Hold Time, Strobe Pulse Width */ - txx9ndfmc_write(dev, (drvdata->hold << 4) | drvdata->spw, TXX9_NDFSPR); - txx9ndfmc_write(dev, - (plat->flags & NDFMC_PLAT_FLAG_USE_BSPRT) ? - TXX9_NDFMCR_BSPRT : 0, TXX9_NDFMCR); -} - -#define TXX9NDFMC_NS_TO_CYC(gbusclk, ns) \ - DIV_ROUND_UP((ns) * DIV_ROUND_UP(gbusclk, 1000), 1000000) - -static int txx9ndfmc_attach_chip(struct nand_chip *chip) -{ - struct mtd_info *mtd = nand_to_mtd(chip); - - if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST) - return 0; - - chip->ecc.strength = 1; - - if (mtd->writesize >= 512) { - chip->ecc.size = 512; - chip->ecc.bytes = 6; - } else { - chip->ecc.size = 256; - chip->ecc.bytes = 3; - } - - chip->ecc.calculate = txx9ndfmc_calculate_ecc; - chip->ecc.correct = txx9ndfmc_correct_data; - chip->ecc.hwctl = txx9ndfmc_enable_hwecc; - - return 0; -} - -static const struct nand_controller_ops txx9ndfmc_controller_ops = { - .attach_chip = txx9ndfmc_attach_chip, -}; - -static int __init txx9ndfmc_probe(struct platform_device *dev) -{ - struct txx9ndfmc_platform_data *plat = dev_get_platdata(&dev->dev); - int hold, spw; - int i; - struct txx9ndfmc_drvdata *drvdata; - unsigned long gbusclk = plat->gbus_clock; - struct resource *res; - - drvdata = devm_kzalloc(&dev->dev, sizeof(*drvdata), GFP_KERNEL); - if (!drvdata) - return -ENOMEM; - res = platform_get_resource(dev, IORESOURCE_MEM, 0); - drvdata->base = devm_ioremap_resource(&dev->dev, res); - if (IS_ERR(drvdata->base)) - return PTR_ERR(drvdata->base); - - hold = plat->hold ?: 20; /* tDH */ - spw = plat->spw ?: 90; /* max(tREADID, tWP, tRP) */ - - hold = TXX9NDFMC_NS_TO_CYC(gbusclk, hold); - spw = TXX9NDFMC_NS_TO_CYC(gbusclk, spw); - if (plat->flags & NDFMC_PLAT_FLAG_HOLDADD) - hold -= 2; /* actual hold time : (HOLD + 2) BUSCLK */ - spw -= 1; /* actual wait time : (SPW + 1) BUSCLK */ - hold = clamp(hold, 1, 15); - drvdata->hold = hold; - spw = clamp(spw, 1, 15); - drvdata->spw = spw; - dev_info(&dev->dev, "CLK:%ldMHz HOLD:%d SPW:%d\n", - (gbusclk + 500000) / 1000000, hold, spw); - - nand_controller_init(&drvdata->controller); - drvdata->controller.ops = &txx9ndfmc_controller_ops; - - platform_set_drvdata(dev, drvdata); - txx9ndfmc_initialize(dev); - - for (i = 0; i < MAX_TXX9NDFMC_DEV; i++) { - struct txx9ndfmc_priv *txx9_priv; - struct nand_chip *chip; - struct mtd_info *mtd; - - if (!(plat->ch_mask & (1 << i))) - continue; - txx9_priv = kzalloc(sizeof(struct txx9ndfmc_priv), - GFP_KERNEL); - if (!txx9_priv) - continue; - chip = &txx9_priv->chip; - mtd = nand_to_mtd(chip); - mtd->dev.parent = &dev->dev; - - chip->legacy.read_byte = txx9ndfmc_read_byte; - chip->legacy.read_buf = txx9ndfmc_read_buf; - chip->legacy.write_buf = txx9ndfmc_write_buf; - chip->legacy.cmd_ctrl = txx9ndfmc_cmd_ctrl; - chip->legacy.dev_ready = txx9ndfmc_dev_ready; - chip->legacy.chip_delay = 100; - chip->controller = &drvdata->controller; - - nand_set_controller_data(chip, txx9_priv); - txx9_priv->dev = dev; - - if (plat->ch_mask != 1) { - txx9_priv->cs = i; - txx9_priv->mtdname = kasprintf(GFP_KERNEL, "%s.%u", - dev_name(&dev->dev), i); - } else { - txx9_priv->cs = -1; - txx9_priv->mtdname = kstrdup(dev_name(&dev->dev), - GFP_KERNEL); - } - if (!txx9_priv->mtdname) { - kfree(txx9_priv); - dev_err(&dev->dev, "Unable to allocate MTD name.\n"); - continue; - } - if (plat->wide_mask & (1 << i)) - chip->options |= NAND_BUSWIDTH_16; - - if (nand_scan(chip, 1)) { - kfree(txx9_priv->mtdname); - kfree(txx9_priv); - continue; - } - mtd->name = txx9_priv->mtdname; - - mtd_device_register(mtd, NULL, 0); - drvdata->mtds[i] = mtd; - } - - return 0; -} - -static int __exit txx9ndfmc_remove(struct platform_device *dev) -{ - struct txx9ndfmc_drvdata *drvdata = platform_get_drvdata(dev); - int ret, i; - - if (!drvdata) - return 0; - for (i = 0; i < MAX_TXX9NDFMC_DEV; i++) { - struct mtd_info *mtd = drvdata->mtds[i]; - struct nand_chip *chip; - struct txx9ndfmc_priv *txx9_priv; - - if (!mtd) - continue; - chip = mtd_to_nand(mtd); - txx9_priv = nand_get_controller_data(chip); - - ret = mtd_device_unregister(nand_to_mtd(chip)); - WARN_ON(ret); - nand_cleanup(chip); - kfree(txx9_priv->mtdname); - kfree(txx9_priv); - } - return 0; -} - -#ifdef CONFIG_PM -static int txx9ndfmc_resume(struct platform_device *dev) -{ - if (platform_get_drvdata(dev)) - txx9ndfmc_initialize(dev); - return 0; -} -#else -#define txx9ndfmc_resume NULL -#endif - -static struct platform_driver txx9ndfmc_driver = { - .remove = __exit_p(txx9ndfmc_remove), - .resume = txx9ndfmc_resume, - .driver = { - .name = "txx9ndfmc", - }, -}; - -module_platform_driver_probe(txx9ndfmc_driver, txx9ndfmc_probe); - -MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION("TXx9 SoC NAND flash controller driver"); -MODULE_ALIAS("platform:txx9ndfmc"); diff --git a/include/linux/platform_data/txx9/ndfmc.h b/include/linux/platform_data/txx9/ndfmc.h deleted file mode 100644 index 7aaa4cd34d31..000000000000 --- a/include/linux/platform_data/txx9/ndfmc.h +++ /dev/null @@ -1,28 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * - * (C) Copyright TOSHIBA CORPORATION 2007 - */ -#ifndef __TXX9_NDFMC_H -#define __TXX9_NDFMC_H - -#define NDFMC_PLAT_FLAG_USE_BSPRT 0x01 -#define NDFMC_PLAT_FLAG_NO_RSTR 0x02 -#define NDFMC_PLAT_FLAG_HOLDADD 0x04 -#define NDFMC_PLAT_FLAG_DUMMYWRITE 0x08 - -struct txx9ndfmc_platform_data { - unsigned int shift; - unsigned int gbus_clock; - unsigned int hold; /* hold time in nanosecond */ - unsigned int spw; /* strobe pulse width in nanosecond */ - unsigned int flags; - unsigned char ch_mask; /* available channel bitmask */ - unsigned char wp_mask; /* write-protect bitmask */ - unsigned char wide_mask; /* 16bit-nand bitmask */ -}; - -void txx9_ndfmc_init(unsigned long baseaddr, - const struct txx9ndfmc_platform_data *plat_data); - -#endif /* __TXX9_NDFMC_H */

CPU support for TX49xx is getting removed, so remove hw_random driver for it.

Signed-off-by: Thomas Bogendoerfer tsbogend@alpha.franken.de --- drivers/char/hw_random/Kconfig | 13 --- drivers/char/hw_random/Makefile | 1 - drivers/char/hw_random/tx4939-rng.c | 157 ---------------------------- 3 files changed, 171 deletions(-) delete mode 100644 drivers/char/hw_random/tx4939-rng.c

diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig index 1fe006f3f12f..9d13d640384a 100644 --- a/drivers/char/hw_random/Kconfig +++ b/drivers/char/hw_random/Kconfig @@ -226,19 +226,6 @@ config HW_RANDOM_VIRTIO To compile this driver as a module, choose M here: the module will be called virtio-rng. If unsure, say N.

-config HW_RANDOM_TX4939 - tristate "TX4939 Random Number Generator support" - depends on SOC_TX4939 - default HW_RANDOM - help - This driver provides kernel-side support for the Random Number - Generator hardware found on TX4939 SoC. - - To compile this driver as a module, choose M here: the - module will be called tx4939-rng. - - If unsure, say Y. - config HW_RANDOM_MXC_RNGA tristate "Freescale i.MX RNGA Random Number Generator" depends on SOC_IMX31 diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile index 8933fada74f2..b2aa37162e24 100644 --- a/drivers/char/hw_random/Makefile +++ b/drivers/char/hw_random/Makefile @@ -20,7 +20,6 @@ obj-$(CONFIG_HW_RANDOM_OMAP) += omap-rng.o obj-$(CONFIG_HW_RANDOM_OMAP3_ROM) += omap3-rom-rng.o obj-$(CONFIG_HW_RANDOM_PASEMI) += pasemi-rng.o obj-$(CONFIG_HW_RANDOM_VIRTIO) += virtio-rng.o -obj-$(CONFIG_HW_RANDOM_TX4939) += tx4939-rng.o obj-$(CONFIG_HW_RANDOM_MXC_RNGA) += mxc-rnga.o obj-$(CONFIG_HW_RANDOM_IMX_RNGC) += imx-rngc.o obj-$(CONFIG_HW_RANDOM_INGENIC_RNG) += ingenic-rng.o diff --git a/drivers/char/hw_random/tx4939-rng.c b/drivers/char/hw_random/tx4939-rng.c deleted file mode 100644 index c8bd34e740fd..000000000000 --- a/drivers/char/hw_random/tx4939-rng.c +++ /dev/null @@ -1,157 +0,0 @@ -/* - * RNG driver for TX4939 Random Number Generators (RNG) - * - * Copyright (C) 2009 Atsushi Nemoto anemo@mba.ocn.ne.jp - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include <linux/err.h> -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/delay.h> -#include <linux/io.h> -#include <linux/platform_device.h> -#include <linux/hw_random.h> -#include <linux/gfp.h> - -#define TX4939_RNG_RCSR 0x00000000 -#define TX4939_RNG_ROR(n) (0x00000018 + (n) * 8) - -#define TX4939_RNG_RCSR_INTE 0x00000008 -#define TX4939_RNG_RCSR_RST 0x00000004 -#define TX4939_RNG_RCSR_FIN 0x00000002 -#define TX4939_RNG_RCSR_ST 0x00000001 - -struct tx4939_rng { - struct hwrng rng; - void __iomem *base; - u64 databuf[3]; - unsigned int data_avail; -}; - -static void rng_io_start(void) -{ -#ifndef CONFIG_64BIT - /* - * readq is reading a 64-bit register using a 64-bit load. On - * a 32-bit kernel however interrupts or any other processor - * exception would clobber the upper 32-bit of the processor - * register so interrupts need to be disabled. - */ - local_irq_disable(); -#endif -} - -static void rng_io_end(void) -{ -#ifndef CONFIG_64BIT - local_irq_enable(); -#endif -} - -static u64 read_rng(void __iomem *base, unsigned int offset) -{ - return ____raw_readq(base + offset); -} - -static void write_rng(u64 val, void __iomem *base, unsigned int offset) -{ - return ____raw_writeq(val, base + offset); -} - -static int tx4939_rng_data_present(struct hwrng *rng, int wait) -{ - struct tx4939_rng *rngdev = container_of(rng, struct tx4939_rng, rng); - int i; - - if (rngdev->data_avail) - return rngdev->data_avail; - for (i = 0; i < 20; i++) { - rng_io_start(); - if (!(read_rng(rngdev->base, TX4939_RNG_RCSR) - & TX4939_RNG_RCSR_ST)) { - rngdev->databuf[0] = - read_rng(rngdev->base, TX4939_RNG_ROR(0)); - rngdev->databuf[1] = - read_rng(rngdev->base, TX4939_RNG_ROR(1)); - rngdev->databuf[2] = - read_rng(rngdev->base, TX4939_RNG_ROR(2)); - rngdev->data_avail = - sizeof(rngdev->databuf) / sizeof(u32); - /* Start RNG */ - write_rng(TX4939_RNG_RCSR_ST, - rngdev->base, TX4939_RNG_RCSR); - wait = 0; - } - rng_io_end(); - if (!wait) - break; - /* 90 bus clock cycles by default for generation */ - ndelay(90 * 5); - } - return rngdev->data_avail; -} - -static int tx4939_rng_data_read(struct hwrng *rng, u32 *buffer) -{ - struct tx4939_rng *rngdev = container_of(rng, struct tx4939_rng, rng); - - rngdev->data_avail--; - *buffer = *((u32 *)&rngdev->databuf + rngdev->data_avail); - return sizeof(u32); -} - -static int __init tx4939_rng_probe(struct platform_device *dev) -{ - struct tx4939_rng *rngdev; - int i; - - rngdev = devm_kzalloc(&dev->dev, sizeof(*rngdev), GFP_KERNEL); - if (!rngdev) - return -ENOMEM; - rngdev->base = devm_platform_ioremap_resource(dev, 0); - if (IS_ERR(rngdev->base)) - return PTR_ERR(rngdev->base); - - rngdev->rng.name = dev_name(&dev->dev); - rngdev->rng.data_present = tx4939_rng_data_present; - rngdev->rng.data_read = tx4939_rng_data_read; - - rng_io_start(); - /* Reset RNG */ - write_rng(TX4939_RNG_RCSR_RST, rngdev->base, TX4939_RNG_RCSR); - write_rng(0, rngdev->base, TX4939_RNG_RCSR); - /* Start RNG */ - write_rng(TX4939_RNG_RCSR_ST, rngdev->base, TX4939_RNG_RCSR); - rng_io_end(); - /* - * Drop first two results. From the datasheet: - * The quality of the random numbers generated immediately - * after reset can be insufficient. Therefore, do not use - * random numbers obtained from the first and second - * generations; use the ones from the third or subsequent - * generation. - */ - for (i = 0; i < 2; i++) { - rngdev->data_avail = 0; - if (!tx4939_rng_data_present(&rngdev->rng, 1)) - return -EIO; - } - - platform_set_drvdata(dev, rngdev); - return devm_hwrng_register(&dev->dev, &rngdev->rng); -} - -static struct platform_driver tx4939_rng_driver = { - .driver = { - .name = "tx4939-rng", - }, -}; - -module_platform_driver_probe(tx4939_rng_driver, tx4939_rng_probe); - -MODULE_DESCRIPTION("H/W Random Number Generator (RNG) driver for TX4939"); -MODULE_LICENSE("GPL");

CPU support for TX49xx is getting removed, so remove IDE support for it.

Signed-off-by: Thomas Bogendoerfer tsbogend@alpha.franken.de --- drivers/ide/Kconfig | 10 - drivers/ide/Makefile | 3 - drivers/ide/tx4938ide.c | 209 ------------- drivers/ide/tx4939ide.c | 628 ---------------------------------------- 4 files changed, 850 deletions(-) delete mode 100644 drivers/ide/tx4938ide.c delete mode 100644 drivers/ide/tx4939ide.c

diff --git a/drivers/ide/Kconfig b/drivers/ide/Kconfig index 19abf11c84c8..03303af8c96f 100644 --- a/drivers/ide/Kconfig +++ b/drivers/ide/Kconfig @@ -662,16 +662,6 @@ config BLK_DEV_IDE_PMAC_ATA100FIRST CD-ROM on hda. This option changes this to more natural hda for hard disk and hdc for CD-ROM.

-config BLK_DEV_IDE_TX4938 - tristate "TX4938 internal IDE support" - depends on SOC_TX4938 - select IDE_TIMINGS - -config BLK_DEV_IDE_TX4939 - tristate "TX4939 internal IDE support" - depends on SOC_TX4939 - select BLK_DEV_IDEDMA_SFF - config BLK_DEV_IDE_ICSIDE tristate "ICS IDE interface support" depends on ARM && ARCH_ACORN diff --git a/drivers/ide/Makefile b/drivers/ide/Makefile index 2605b3cdaf47..4d6655160a4a 100644 --- a/drivers/ide/Makefile +++ b/drivers/ide/Makefile @@ -106,6 +106,3 @@ obj-$(CONFIG_BLK_DEV_PLATFORM) += ide_platform.o obj-$(CONFIG_BLK_DEV_IDE_ICSIDE) += icside.o obj-$(CONFIG_BLK_DEV_IDE_RAPIDE) += rapide.o obj-$(CONFIG_BLK_DEV_PALMCHIP_BK3710) += palm_bk3710.o - -obj-$(CONFIG_BLK_DEV_IDE_TX4938) += tx4938ide.o -obj-$(CONFIG_BLK_DEV_IDE_TX4939) += tx4939ide.o diff --git a/drivers/ide/tx4938ide.c b/drivers/ide/tx4938ide.c deleted file mode 100644 index 962eb92501b5..000000000000 --- a/drivers/ide/tx4938ide.c +++ /dev/null @@ -1,209 +0,0 @@ -/* - * TX4938 internal IDE driver - * Based on tx4939ide.c. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * (C) Copyright TOSHIBA CORPORATION 2005-2007 - */ - -#include <linux/module.h> -#include <linux/types.h> -#include <linux/ide.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/io.h> - -#include <asm/ide.h> -#include <asm/txx9/tx4938.h> - -static void tx4938ide_tune_ebusc(unsigned int ebus_ch, - unsigned int gbus_clock, - u8 pio) -{ - struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio); - u64 cr = __raw_readq(&tx4938_ebuscptr->cr[ebus_ch]); - unsigned int sp = (cr >> 4) & 3; - unsigned int clock = gbus_clock / (4 - sp); - unsigned int cycle = 1000000000 / clock; - unsigned int shwt; - int wt; - - /* Minimum DIOx- active time */ - wt = DIV_ROUND_UP(t->act8b, cycle) - 2; - /* IORDY setup time: 35ns */ - wt = max_t(int, wt, DIV_ROUND_UP(35, cycle)); - /* actual wait-cycle is max(wt & ~1, 1) */ - if (wt > 2 && (wt & 1)) - wt++; - wt &= ~1; - /* Address-valid to DIOR/DIOW setup */ - shwt = DIV_ROUND_UP(t->setup, cycle); - - /* -DIOx recovery time (SHWT * 4) and cycle time requirement */ - while ((shwt * 4 + wt + (wt ? 2 : 3)) * cycle < t->cycle) - shwt++; - if (shwt > 7) { - pr_warn("tx4938ide: SHWT violation (%d)\n", shwt); - shwt = 7; - } - pr_debug("tx4938ide: ebus %d, bus cycle %dns, WT %d, SHWT %d\n", - ebus_ch, cycle, wt, shwt); - - __raw_writeq((cr & ~0x3f007ull) | (wt << 12) | shwt, - &tx4938_ebuscptr->cr[ebus_ch]); -} - -static void tx4938ide_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive) -{ - struct tx4938ide_platform_info *pdata = dev_get_platdata(hwif->dev); - u8 safe = drive->pio_mode - XFER_PIO_0; - ide_drive_t *pair; - - pair = ide_get_pair_dev(drive); - if (pair) - safe = min_t(u8, safe, pair->pio_mode - XFER_PIO_0); - tx4938ide_tune_ebusc(pdata->ebus_ch, pdata->gbus_clock, safe); -} - -#ifdef __BIG_ENDIAN - -/* custom iops (independent from SWAP_IO_SPACE) */ -static void tx4938ide_input_data_swap(ide_drive_t *drive, struct ide_cmd *cmd, - void *buf, unsigned int len) -{ - unsigned long port = drive->hwif->io_ports.data_addr; - unsigned short *ptr = buf; - unsigned int count = (len + 1) / 2; - - while (count--) - *ptr++ = cpu_to_le16(__raw_readw((void __iomem *)port)); - __ide_flush_dcache_range((unsigned long)buf, roundup(len, 2)); -} - -static void tx4938ide_output_data_swap(ide_drive_t *drive, struct ide_cmd *cmd, - void *buf, unsigned int len) -{ - unsigned long port = drive->hwif->io_ports.data_addr; - unsigned short *ptr = buf; - unsigned int count = (len + 1) / 2; - - while (count--) { - __raw_writew(le16_to_cpu(*ptr), (void __iomem *)port); - ptr++; - } - __ide_flush_dcache_range((unsigned long)buf, roundup(len, 2)); -} - -static const struct ide_tp_ops tx4938ide_tp_ops = { - .exec_command = ide_exec_command, - .read_status = ide_read_status, - .read_altstatus = ide_read_altstatus, - .write_devctl = ide_write_devctl, - - .dev_select = ide_dev_select, - .tf_load = ide_tf_load, - .tf_read = ide_tf_read, - - .input_data = tx4938ide_input_data_swap, - .output_data = tx4938ide_output_data_swap, -}; - -#endif /* __BIG_ENDIAN */ - -static const struct ide_port_ops tx4938ide_port_ops = { - .set_pio_mode = tx4938ide_set_pio_mode, -}; - -static const struct ide_port_info tx4938ide_port_info __initconst = { - .port_ops = &tx4938ide_port_ops, -#ifdef __BIG_ENDIAN - .tp_ops = &tx4938ide_tp_ops, -#endif - .host_flags = IDE_HFLAG_MMIO | IDE_HFLAG_NO_DMA, - .pio_mask = ATA_PIO5, - .chipset = ide_generic, -}; - -static int __init tx4938ide_probe(struct platform_device *pdev) -{ - struct ide_hw hw, *hws[] = { &hw }; - struct ide_host *host; - struct resource *res; - struct tx4938ide_platform_info *pdata = dev_get_platdata(&pdev->dev); - int irq, ret, i; - unsigned long mapbase, mapctl; - struct ide_port_info d = tx4938ide_port_info; - - irq = platform_get_irq(pdev, 0); - if (irq < 0) - return -ENODEV; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) - return -ENODEV; - - if (!devm_request_mem_region(&pdev->dev, res->start, - resource_size(res), "tx4938ide")) - return -EBUSY; - mapbase = (unsigned long)devm_ioremap(&pdev->dev, res->start, - 8 << pdata->ioport_shift); - mapctl = (unsigned long)devm_ioremap(&pdev->dev, - res->start + 0x10000 + - (6 << pdata->ioport_shift), - 1 << pdata->ioport_shift); - if (!mapbase || !mapctl) - return -EBUSY; - - memset(&hw, 0, sizeof(hw)); - if (pdata->ioport_shift) { - unsigned long port = mapbase; - unsigned long ctl = mapctl; - - hw.io_ports_array[0] = port; -#ifdef __BIG_ENDIAN - port++; - ctl++; -#endif - for (i = 1; i <= 7; i++) - hw.io_ports_array[i] = - port + (i << pdata->ioport_shift); - hw.io_ports.ctl_addr = ctl; - } else - ide_std_init_ports(&hw, mapbase, mapctl); - hw.irq = irq; - hw.dev = &pdev->dev; - - pr_info("TX4938 IDE interface (base %#lx, ctl %#lx, irq %d)\n", - mapbase, mapctl, hw.irq); - if (pdata->gbus_clock) - tx4938ide_tune_ebusc(pdata->ebus_ch, pdata->gbus_clock, 0); - else - d.port_ops = NULL; - ret = ide_host_add(&d, hws, 1, &host); - if (!ret) - platform_set_drvdata(pdev, host); - return ret; -} - -static int __exit tx4938ide_remove(struct platform_device *pdev) -{ - struct ide_host *host = platform_get_drvdata(pdev); - - ide_host_remove(host); - return 0; -} - -static struct platform_driver tx4938ide_driver = { - .driver = { - .name = "tx4938ide", - }, - .remove = __exit_p(tx4938ide_remove), -}; - -module_platform_driver_probe(tx4938ide_driver, tx4938ide_probe); - -MODULE_DESCRIPTION("TX4938 internal IDE driver"); -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:tx4938ide"); diff --git a/drivers/ide/tx4939ide.c b/drivers/ide/tx4939ide.c deleted file mode 100644 index b1bbf807bb3d..000000000000 --- a/drivers/ide/tx4939ide.c +++ /dev/null @@ -1,628 +0,0 @@ -/* - * TX4939 internal IDE driver - * Based on RBTX49xx patch from CELF patch archive. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * (C) Copyright TOSHIBA CORPORATION 2005-2007 - */ - -#include <linux/module.h> -#include <linux/types.h> -#include <linux/ide.h> -#include <linux/init.h> -#include <linux/delay.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/scatterlist.h> - -#include <asm/ide.h> - -#define MODNAME "tx4939ide" - -/* ATA Shadow Registers (8-bit except for Data which is 16-bit) */ -#define TX4939IDE_Data 0x000 -#define TX4939IDE_Error_Feature 0x001 -#define TX4939IDE_Sec 0x002 -#define TX4939IDE_LBA0 0x003 -#define TX4939IDE_LBA1 0x004 -#define TX4939IDE_LBA2 0x005 -#define TX4939IDE_DevHead 0x006 -#define TX4939IDE_Stat_Cmd 0x007 -#define TX4939IDE_AltStat_DevCtl 0x402 -/* H/W DMA Registers */ -#define TX4939IDE_DMA_Cmd 0x800 /* 8-bit */ -#define TX4939IDE_DMA_Stat 0x802 /* 8-bit */ -#define TX4939IDE_PRD_Ptr 0x804 /* 32-bit */ -/* ATA100 CORE Registers (16-bit) */ -#define TX4939IDE_Sys_Ctl 0xc00 -#define TX4939IDE_Xfer_Cnt_1 0xc08 -#define TX4939IDE_Xfer_Cnt_2 0xc0a -#define TX4939IDE_Sec_Cnt 0xc10 -#define TX4939IDE_Start_Lo_Addr 0xc18 -#define TX4939IDE_Start_Up_Addr 0xc20 -#define TX4939IDE_Add_Ctl 0xc28 -#define TX4939IDE_Lo_Burst_Cnt 0xc30 -#define TX4939IDE_Up_Burst_Cnt 0xc38 -#define TX4939IDE_PIO_Addr 0xc88 -#define TX4939IDE_H_Rst_Tim 0xc90 -#define TX4939IDE_Int_Ctl 0xc98 -#define TX4939IDE_Pkt_Cmd 0xcb8 -#define TX4939IDE_Bxfer_Cnt_Hi 0xcc0 -#define TX4939IDE_Bxfer_Cnt_Lo 0xcc8 -#define TX4939IDE_Dev_TErr 0xcd0 -#define TX4939IDE_Pkt_Xfer_Ctl 0xcd8 -#define TX4939IDE_Start_TAddr 0xce0 - -/* bits for Int_Ctl */ -#define TX4939IDE_INT_ADDRERR 0x80 -#define TX4939IDE_INT_REACHMUL 0x40 -#define TX4939IDE_INT_DEVTIMING 0x20 -#define TX4939IDE_INT_UDMATERM 0x10 -#define TX4939IDE_INT_TIMER 0x08 -#define TX4939IDE_INT_BUSERR 0x04 -#define TX4939IDE_INT_XFEREND 0x02 -#define TX4939IDE_INT_HOST 0x01 - -#define TX4939IDE_IGNORE_INTS \ - (TX4939IDE_INT_ADDRERR | TX4939IDE_INT_REACHMUL | \ - TX4939IDE_INT_DEVTIMING | TX4939IDE_INT_UDMATERM | \ - TX4939IDE_INT_TIMER | TX4939IDE_INT_XFEREND) - -#ifdef __BIG_ENDIAN -#define tx4939ide_swizzlel(a) ((a) ^ 4) -#define tx4939ide_swizzlew(a) ((a) ^ 6) -#define tx4939ide_swizzleb(a) ((a) ^ 7) -#else -#define tx4939ide_swizzlel(a) (a) -#define tx4939ide_swizzlew(a) (a) -#define tx4939ide_swizzleb(a) (a) -#endif - -static u16 tx4939ide_readw(void __iomem *base, u32 reg) -{ - return __raw_readw(base + tx4939ide_swizzlew(reg)); -} -static u8 tx4939ide_readb(void __iomem *base, u32 reg) -{ - return __raw_readb(base + tx4939ide_swizzleb(reg)); -} -static void tx4939ide_writel(u32 val, void __iomem *base, u32 reg) -{ - __raw_writel(val, base + tx4939ide_swizzlel(reg)); -} -static void tx4939ide_writew(u16 val, void __iomem *base, u32 reg) -{ - __raw_writew(val, base + tx4939ide_swizzlew(reg)); -} -static void tx4939ide_writeb(u8 val, void __iomem *base, u32 reg) -{ - __raw_writeb(val, base + tx4939ide_swizzleb(reg)); -} - -#define TX4939IDE_BASE(hwif) ((void __iomem *)(hwif)->extra_base) - -static void tx4939ide_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive) -{ - int is_slave = drive->dn; - u32 mask, val; - const u8 pio = drive->pio_mode - XFER_PIO_0; - u8 safe = pio; - ide_drive_t *pair; - - pair = ide_get_pair_dev(drive); - if (pair) - safe = min_t(u8, safe, pair->pio_mode - XFER_PIO_0); - /* - * Update Command Transfer Mode for master/slave and Data - * Transfer Mode for this drive. - */ - mask = is_slave ? 0x07f00000 : 0x000007f0; - val = ((safe << 8) | (pio << 4)) << (is_slave ? 16 : 0); - hwif->select_data = (hwif->select_data & ~mask) | val; - /* tx4939ide_tf_load_fixup() will set the Sys_Ctl register */ -} - -static void tx4939ide_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive) -{ - u32 mask, val; - const u8 mode = drive->dma_mode; - - /* Update Data Transfer Mode for this drive. */ - if (mode >= XFER_UDMA_0) - val = mode - XFER_UDMA_0 + 8; - else - val = mode - XFER_MW_DMA_0 + 5; - if (drive->dn) { - mask = 0x00f00000; - val <<= 20; - } else { - mask = 0x000000f0; - val <<= 4; - } - hwif->select_data = (hwif->select_data & ~mask) | val; - /* tx4939ide_tf_load_fixup() will set the Sys_Ctl register */ -} - -static u16 tx4939ide_check_error_ints(ide_hwif_t *hwif) -{ - void __iomem *base = TX4939IDE_BASE(hwif); - u16 ctl = tx4939ide_readw(base, TX4939IDE_Int_Ctl); - - if (ctl & TX4939IDE_INT_BUSERR) { - /* reset FIFO */ - u16 sysctl = tx4939ide_readw(base, TX4939IDE_Sys_Ctl); - - tx4939ide_writew(sysctl | 0x4000, base, TX4939IDE_Sys_Ctl); - /* wait 12GBUSCLK (typ. 60ns @ GBUS200MHz, max 270ns) */ - ndelay(270); - tx4939ide_writew(sysctl, base, TX4939IDE_Sys_Ctl); - } - if (ctl & (TX4939IDE_INT_ADDRERR | - TX4939IDE_INT_DEVTIMING | TX4939IDE_INT_BUSERR)) - pr_err("%s: Error interrupt %#x (%s%s%s )\n", - hwif->name, ctl, - ctl & TX4939IDE_INT_ADDRERR ? " Address-Error" : "", - ctl & TX4939IDE_INT_DEVTIMING ? " DEV-Timing" : "", - ctl & TX4939IDE_INT_BUSERR ? " Bus-Error" : ""); - return ctl; -} - -static void tx4939ide_clear_irq(ide_drive_t *drive) -{ - ide_hwif_t *hwif; - void __iomem *base; - u16 ctl; - - /* - * tx4939ide_dma_test_irq() and tx4939ide_dma_end() do all job - * for DMA case. - */ - if (drive->waiting_for_dma) - return; - hwif = drive->hwif; - base = TX4939IDE_BASE(hwif); - ctl = tx4939ide_check_error_ints(hwif); - tx4939ide_writew(ctl, base, TX4939IDE_Int_Ctl); -} - -static u8 tx4939ide_cable_detect(ide_hwif_t *hwif) -{ - void __iomem *base = TX4939IDE_BASE(hwif); - - return tx4939ide_readw(base, TX4939IDE_Sys_Ctl) & 0x2000 ? - ATA_CBL_PATA40 : ATA_CBL_PATA80; -} - -#ifdef __BIG_ENDIAN -static void tx4939ide_dma_host_set(ide_drive_t *drive, int on) -{ - ide_hwif_t *hwif = drive->hwif; - u8 unit = drive->dn; - void __iomem *base = TX4939IDE_BASE(hwif); - u8 dma_stat = tx4939ide_readb(base, TX4939IDE_DMA_Stat); - - if (on) - dma_stat |= (1 << (5 + unit)); - else - dma_stat &= ~(1 << (5 + unit)); - - tx4939ide_writeb(dma_stat, base, TX4939IDE_DMA_Stat); -} -#else -#define tx4939ide_dma_host_set ide_dma_host_set -#endif - -static u8 tx4939ide_clear_dma_status(void __iomem *base) -{ - u8 dma_stat; - - /* read DMA status for INTR & ERROR flags */ - dma_stat = tx4939ide_readb(base, TX4939IDE_DMA_Stat); - /* clear INTR & ERROR flags */ - tx4939ide_writeb(dma_stat | ATA_DMA_INTR | ATA_DMA_ERR, base, - TX4939IDE_DMA_Stat); - /* recover intmask cleared by writing to bit2 of DMA_Stat */ - tx4939ide_writew(TX4939IDE_IGNORE_INTS << 8, base, TX4939IDE_Int_Ctl); - return dma_stat; -} - -#ifdef __BIG_ENDIAN -/* custom ide_build_dmatable to handle swapped layout */ -static int tx4939ide_build_dmatable(ide_drive_t *drive, struct ide_cmd *cmd) -{ - ide_hwif_t *hwif = drive->hwif; - u32 *table = (u32 *)hwif->dmatable_cpu; - unsigned int count = 0; - int i; - struct scatterlist *sg; - - for_each_sg(hwif->sg_table, sg, cmd->sg_nents, i) { - u32 cur_addr, cur_len, bcount; - - cur_addr = sg_dma_address(sg); - cur_len = sg_dma_len(sg); - - /* - * Fill in the DMA table, without crossing any 64kB boundaries. - */ - - while (cur_len) { - if (count++ >= PRD_ENTRIES) - goto use_pio_instead; - - bcount = 0x10000 - (cur_addr & 0xffff); - if (bcount > cur_len) - bcount = cur_len; - /* - * This workaround for zero count seems required. - * (standard ide_build_dmatable does it too) - */ - if (bcount == 0x10000) - bcount = 0x8000; - *table++ = bcount & 0xffff; - *table++ = cur_addr; - cur_addr += bcount; - cur_len -= bcount; - } - } - - if (count) { - *(table - 2) |= 0x80000000; - return count; - } - -use_pio_instead: - printk(KERN_ERR "%s: %s\n", drive->name, - count ? "DMA table too small" : "empty DMA table?"); - - return 0; /* revert to PIO for this request */ -} -#else -#define tx4939ide_build_dmatable ide_build_dmatable -#endif - -static int tx4939ide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd) -{ - ide_hwif_t *hwif = drive->hwif; - void __iomem *base = TX4939IDE_BASE(hwif); - u8 rw = (cmd->tf_flags & IDE_TFLAG_WRITE) ? 0 : ATA_DMA_WR; - - /* fall back to PIO! */ - if (tx4939ide_build_dmatable(drive, cmd) == 0) - return 1; - - /* PRD table */ - tx4939ide_writel(hwif->dmatable_dma, base, TX4939IDE_PRD_Ptr); - - /* specify r/w */ - tx4939ide_writeb(rw, base, TX4939IDE_DMA_Cmd); - - /* clear INTR & ERROR flags */ - tx4939ide_clear_dma_status(base); - - tx4939ide_writew(SECTOR_SIZE / 2, base, drive->dn ? - TX4939IDE_Xfer_Cnt_2 : TX4939IDE_Xfer_Cnt_1); - - tx4939ide_writew(blk_rq_sectors(cmd->rq), base, TX4939IDE_Sec_Cnt); - - return 0; -} - -static int tx4939ide_dma_end(ide_drive_t *drive) -{ - ide_hwif_t *hwif = drive->hwif; - u8 dma_stat, dma_cmd; - void __iomem *base = TX4939IDE_BASE(hwif); - u16 ctl = tx4939ide_readw(base, TX4939IDE_Int_Ctl); - - /* get DMA command mode */ - dma_cmd = tx4939ide_readb(base, TX4939IDE_DMA_Cmd); - /* stop DMA */ - tx4939ide_writeb(dma_cmd & ~ATA_DMA_START, base, TX4939IDE_DMA_Cmd); - - /* read and clear the INTR & ERROR bits */ - dma_stat = tx4939ide_clear_dma_status(base); - -#define CHECK_DMA_MASK (ATA_DMA_ACTIVE | ATA_DMA_ERR | ATA_DMA_INTR) - - /* verify good DMA status */ - if ((dma_stat & CHECK_DMA_MASK) == 0 && - (ctl & (TX4939IDE_INT_XFEREND | TX4939IDE_INT_HOST)) == - (TX4939IDE_INT_XFEREND | TX4939IDE_INT_HOST)) - /* INT_IDE lost... bug? */ - return 0; - return ((dma_stat & CHECK_DMA_MASK) != - ATA_DMA_INTR) ? 0x10 | dma_stat : 0; -} - -/* returns 1 if DMA IRQ issued, 0 otherwise */ -static int tx4939ide_dma_test_irq(ide_drive_t *drive) -{ - ide_hwif_t *hwif = drive->hwif; - void __iomem *base = TX4939IDE_BASE(hwif); - u16 ctl, ide_int; - u8 dma_stat, stat; - int found = 0; - - ctl = tx4939ide_check_error_ints(hwif); - ide_int = ctl & (TX4939IDE_INT_XFEREND | TX4939IDE_INT_HOST); - switch (ide_int) { - case TX4939IDE_INT_HOST: - /* On error, XFEREND might not be asserted. */ - stat = tx4939ide_readb(base, TX4939IDE_AltStat_DevCtl); - if ((stat & (ATA_BUSY | ATA_DRQ | ATA_ERR)) == ATA_ERR) - found = 1; - else - /* Wait for XFEREND (Mask HOST and unmask XFEREND) */ - ctl &= ~TX4939IDE_INT_XFEREND << 8; - ctl |= ide_int << 8; - break; - case TX4939IDE_INT_HOST | TX4939IDE_INT_XFEREND: - dma_stat = tx4939ide_readb(base, TX4939IDE_DMA_Stat); - if (!(dma_stat & ATA_DMA_INTR)) - pr_warn("%s: weird interrupt status. " - "DMA_Stat %#02x int_ctl %#04x\n", - hwif->name, dma_stat, ctl); - found = 1; - break; - } - /* - * Do not clear XFEREND, HOST now. They will be cleared by - * clearing bit2 of DMA_Stat. - */ - ctl &= ~ide_int; - tx4939ide_writew(ctl, base, TX4939IDE_Int_Ctl); - return found; -} - -#ifdef __BIG_ENDIAN -static u8 tx4939ide_dma_sff_read_status(ide_hwif_t *hwif) -{ - void __iomem *base = TX4939IDE_BASE(hwif); - - return tx4939ide_readb(base, TX4939IDE_DMA_Stat); -} -#else -#define tx4939ide_dma_sff_read_status ide_dma_sff_read_status -#endif - -static void tx4939ide_init_hwif(ide_hwif_t *hwif) -{ - void __iomem *base = TX4939IDE_BASE(hwif); - - /* Soft Reset */ - tx4939ide_writew(0x8000, base, TX4939IDE_Sys_Ctl); - /* at least 20 GBUSCLK (typ. 100ns @ GBUS200MHz, max 450ns) */ - ndelay(450); - tx4939ide_writew(0x0000, base, TX4939IDE_Sys_Ctl); - /* mask some interrupts and clear all interrupts */ - tx4939ide_writew((TX4939IDE_IGNORE_INTS << 8) | 0xff, base, - TX4939IDE_Int_Ctl); - - tx4939ide_writew(0x0008, base, TX4939IDE_Lo_Burst_Cnt); - tx4939ide_writew(0, base, TX4939IDE_Up_Burst_Cnt); -} - -static int tx4939ide_init_dma(ide_hwif_t *hwif, const struct ide_port_info *d) -{ - hwif->dma_base = - hwif->extra_base + tx4939ide_swizzleb(TX4939IDE_DMA_Cmd); - /* - * Note that we cannot use ATA_DMA_TABLE_OFS, ATA_DMA_STATUS - * for big endian. - */ - return ide_allocate_dma_engine(hwif); -} - -static void tx4939ide_tf_load_fixup(ide_drive_t *drive) -{ - ide_hwif_t *hwif = drive->hwif; - void __iomem *base = TX4939IDE_BASE(hwif); - u16 sysctl = hwif->select_data >> (drive->dn ? 16 : 0); - - /* - * Fix ATA100 CORE System Control Register. (The write to the - * Device/Head register may write wrong data to the System - * Control Register) - * While Sys_Ctl is written here, dev_select() is not needed. - */ - tx4939ide_writew(sysctl, base, TX4939IDE_Sys_Ctl); -} - -static void tx4939ide_tf_load(ide_drive_t *drive, struct ide_taskfile *tf, - u8 valid) -{ - ide_tf_load(drive, tf, valid); - - if (valid & IDE_VALID_DEVICE) - tx4939ide_tf_load_fixup(drive); -} - -#ifdef __BIG_ENDIAN - -/* custom iops (independent from SWAP_IO_SPACE) */ -static void tx4939ide_input_data_swap(ide_drive_t *drive, struct ide_cmd *cmd, - void *buf, unsigned int len) -{ - unsigned long port = drive->hwif->io_ports.data_addr; - unsigned short *ptr = buf; - unsigned int count = (len + 1) / 2; - - while (count--) - *ptr++ = cpu_to_le16(__raw_readw((void __iomem *)port)); - __ide_flush_dcache_range((unsigned long)buf, roundup(len, 2)); -} - -static void tx4939ide_output_data_swap(ide_drive_t *drive, struct ide_cmd *cmd, - void *buf, unsigned int len) -{ - unsigned long port = drive->hwif->io_ports.data_addr; - unsigned short *ptr = buf; - unsigned int count = (len + 1) / 2; - - while (count--) { - __raw_writew(le16_to_cpu(*ptr), (void __iomem *)port); - ptr++; - } - __ide_flush_dcache_range((unsigned long)buf, roundup(len, 2)); -} - -static const struct ide_tp_ops tx4939ide_tp_ops = { - .exec_command = ide_exec_command, - .read_status = ide_read_status, - .read_altstatus = ide_read_altstatus, - .write_devctl = ide_write_devctl, - - .dev_select = ide_dev_select, - .tf_load = tx4939ide_tf_load, - .tf_read = ide_tf_read, - - .input_data = tx4939ide_input_data_swap, - .output_data = tx4939ide_output_data_swap, -}; - -#else /* __LITTLE_ENDIAN */ - -static const struct ide_tp_ops tx4939ide_tp_ops = { - .exec_command = ide_exec_command, - .read_status = ide_read_status, - .read_altstatus = ide_read_altstatus, - .write_devctl = ide_write_devctl, - - .dev_select = ide_dev_select, - .tf_load = tx4939ide_tf_load, - .tf_read = ide_tf_read, - - .input_data = ide_input_data, - .output_data = ide_output_data, -}; - -#endif /* __LITTLE_ENDIAN */ - -static const struct ide_port_ops tx4939ide_port_ops = { - .set_pio_mode = tx4939ide_set_pio_mode, - .set_dma_mode = tx4939ide_set_dma_mode, - .clear_irq = tx4939ide_clear_irq, - .cable_detect = tx4939ide_cable_detect, -}; - -static const struct ide_dma_ops tx4939ide_dma_ops = { - .dma_host_set = tx4939ide_dma_host_set, - .dma_setup = tx4939ide_dma_setup, - .dma_start = ide_dma_start, - .dma_end = tx4939ide_dma_end, - .dma_test_irq = tx4939ide_dma_test_irq, - .dma_lost_irq = ide_dma_lost_irq, - .dma_timer_expiry = ide_dma_sff_timer_expiry, - .dma_sff_read_status = tx4939ide_dma_sff_read_status, -}; - -static const struct ide_port_info tx4939ide_port_info __initconst = { - .init_hwif = tx4939ide_init_hwif, - .init_dma = tx4939ide_init_dma, - .port_ops = &tx4939ide_port_ops, - .dma_ops = &tx4939ide_dma_ops, - .tp_ops = &tx4939ide_tp_ops, - .host_flags = IDE_HFLAG_MMIO, - .pio_mask = ATA_PIO4, - .mwdma_mask = ATA_MWDMA2, - .udma_mask = ATA_UDMA5, - .chipset = ide_generic, -}; - -static int __init tx4939ide_probe(struct platform_device *pdev) -{ - struct ide_hw hw, *hws[] = { &hw }; - struct ide_host *host; - struct resource *res; - int irq, ret; - unsigned long mapbase; - - irq = platform_get_irq(pdev, 0); - if (irq < 0) - return -ENODEV; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) - return -ENODEV; - - if (!devm_request_mem_region(&pdev->dev, res->start, - resource_size(res), MODNAME)) - return -EBUSY; - mapbase = (unsigned long)devm_ioremap(&pdev->dev, res->start, - resource_size(res)); - if (!mapbase) - return -EBUSY; - memset(&hw, 0, sizeof(hw)); - hw.io_ports.data_addr = - mapbase + tx4939ide_swizzlew(TX4939IDE_Data); - hw.io_ports.error_addr = - mapbase + tx4939ide_swizzleb(TX4939IDE_Error_Feature); - hw.io_ports.nsect_addr = - mapbase + tx4939ide_swizzleb(TX4939IDE_Sec); - hw.io_ports.lbal_addr = - mapbase + tx4939ide_swizzleb(TX4939IDE_LBA0); - hw.io_ports.lbam_addr = - mapbase + tx4939ide_swizzleb(TX4939IDE_LBA1); - hw.io_ports.lbah_addr = - mapbase + tx4939ide_swizzleb(TX4939IDE_LBA2); - hw.io_ports.device_addr = - mapbase + tx4939ide_swizzleb(TX4939IDE_DevHead); - hw.io_ports.command_addr = - mapbase + tx4939ide_swizzleb(TX4939IDE_Stat_Cmd); - hw.io_ports.ctl_addr = - mapbase + tx4939ide_swizzleb(TX4939IDE_AltStat_DevCtl); - hw.irq = irq; - hw.dev = &pdev->dev; - - pr_info("TX4939 IDE interface (base %#lx, irq %d)\n", mapbase, irq); - host = ide_host_alloc(&tx4939ide_port_info, hws, 1); - if (!host) - return -ENOMEM; - /* use extra_base for base address of the all registers */ - host->ports[0]->extra_base = mapbase; - ret = ide_host_register(host, &tx4939ide_port_info, hws); - if (ret) { - ide_host_free(host); - return ret; - } - platform_set_drvdata(pdev, host); - return 0; -} - -static int __exit tx4939ide_remove(struct platform_device *pdev) -{ - struct ide_host *host = platform_get_drvdata(pdev); - - ide_host_remove(host); - return 0; -} - -#ifdef CONFIG_PM -static int tx4939ide_resume(struct platform_device *dev) -{ - struct ide_host *host = platform_get_drvdata(dev); - ide_hwif_t *hwif = host->ports[0]; - - tx4939ide_init_hwif(hwif); - return 0; -} -#else -#define tx4939ide_resume NULL -#endif - -static struct platform_driver tx4939ide_driver = { - .driver = { - .name = MODNAME, - }, - .remove = __exit_p(tx4939ide_remove), - .resume = tx4939ide_resume, -}; - -module_platform_driver_probe(tx4939ide_driver, tx4939ide_probe); - -MODULE_DESCRIPTION("TX4939 internal IDE driver"); -MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:tx4939ide");