[alsa-devel] [PATCH 1/3] ASoC: mxs-sgtl5000: Remove MCLK restriction
From: Fabio Estevam fabio.estevam@freescale.com
According to the sgtl5000 datasheet the MCLK frequency range restriction of 8 to 27 MHz only applies when the PLL is used - synchronous SYS_MCLK input mode.
mxs-sgtl5000 machine sets the codec as slave, and mx28 generates MCLK in the range of 256*fs, 384*fs or 512*fs, which is called asynchronous SYS_MCLK input.
In asynchronous SYS_MCLK we cannot have the 8 to 27 MHz check because if we want to play a 8KHz sample rate track, with a MCLK of 8k * 512 = 4.096MHz the current check would return -EINVAL, which is not correct.
Remove the 8 to 27MHz frequency check, since this only applies to the synchronous SYS_MCLK input case.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- sound/soc/mxs/mxs-sgtl5000.c | 7 ------- 1 file changed, 7 deletions(-)
diff --git a/sound/soc/mxs/mxs-sgtl5000.c b/sound/soc/mxs/mxs-sgtl5000.c index 7515cd4..6f1916b 100644 --- a/sound/soc/mxs/mxs-sgtl5000.c +++ b/sound/soc/mxs/mxs-sgtl5000.c @@ -49,13 +49,6 @@ static int mxs_sgtl5000_hw_params(struct snd_pcm_substream *substream, break; }
- /* Sgtl5000 sysclk should be >= 8MHz and <= 27M */ - if (mclk < 8000000 || mclk > 27000000) { - dev_err(codec_dai->dev, "Invalid mclk frequency: %u.%03uMHz\n", - mclk / 1000000, mclk / 1000 % 1000); - return -EINVAL; - } - /* Set SGTL5000's SYSCLK (provided by SAIF MCLK) */ ret = snd_soc_dai_set_sysclk(codec_dai, SGTL5000_SYSCLK, mclk, 0); if (ret) {
From: Fabio Estevam fabio.estevam@freescale.com
According to the sgtl5000 datasheet the MCLK frequency range restriction of 8 to 27 MHz only applies when the PLL is used - synchronous SYS_MCLK input mode.
When running the codec as slave, the master should generate MCLK in the range of 256*fs, 384*fs or 512*fs, which is called asynchronous SYS_MCLK input mode.
In asynchronous SYS_MCLK we cannot have the 8 to 27 MHz check because if we want to play a 8KHz sample rate track, with a MCLK of 8k * 512 = 4.096MHz the current check would return -EINVAL, which is not correct.
Remove the 8 to 27MHz frequency check, since this only applies to the synchronous SYS_MCLK input case.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- sound/soc/codecs/sgtl5000.c | 9 --------- 1 file changed, 9 deletions(-)
diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c index 600c072..8dea6b3 100644 --- a/sound/soc/codecs/sgtl5000.c +++ b/sound/soc/codecs/sgtl5000.c @@ -1434,7 +1434,6 @@ static int sgtl5000_i2c_probe(struct i2c_client *client, { struct sgtl5000_priv *sgtl5000; int ret, reg, rev; - unsigned int mclk; struct device_node *np = client->dev.of_node; u32 value;
@@ -1459,14 +1458,6 @@ static int sgtl5000_i2c_probe(struct i2c_client *client, return ret; }
- /* SGTL5000 SYS_MCLK should be between 8 and 27 MHz */ - mclk = clk_get_rate(sgtl5000->mclk); - if (mclk < 8000000 || mclk > 27000000) { - dev_err(&client->dev, "Invalid SYS_CLK frequency: %u.%03uMHz\n", - mclk / 1000000, mclk / 1000 % 1000); - return -EINVAL; - } - ret = clk_prepare_enable(sgtl5000->mclk); if (ret) return ret;
From: Fabio Estevam fabio.estevam@freescale.com
When trying to play a 8kHz file with codec in slave mode we get the following error on a mx28evk:
$ aplay -Dhw:0,0 stereo_8k.wav Playing WAVE 'stereo_8k.wav' : Signed 16 bit Little Endian, Rate 8000 Hz, Stereo [ 21.218647] sgtl5000 0-000a: PLL not supported in slave mode [ 21.224559] sgtl5000 0-000a: 128 ratio is not supported. SYS_MCLK needs to be 256, 384 or 512 * fs [ 21.233687] sgtl5000 0-000a: ASoC: can't set sgtl5000 hw params: -22 aplay: set_params:1123: Unable to install hw params:
This error happens because we are using 'sys_fs' instead of 'frame_rate' in the valid ratio check.
Use the real'frame_rate' so that the ratio is correctly calculated and the playback can run.
sgtl5000 codec manual states that in 'Synchronous SYS_MCLK input' mode that the following SYS_CLK frequencies are allowed: 256*fs, 384*fs, 512*fs.
, where fs is the sampling frequency, which can be in the range of: 8, 11.025, 16, 22.5, 32, 44.1, 48, 96 kHz.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- sound/soc/codecs/sgtl5000.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c index 8dea6b3..29cf7ce 100644 --- a/sound/soc/codecs/sgtl5000.c +++ b/sound/soc/codecs/sgtl5000.c @@ -618,7 +618,7 @@ static int sgtl5000_set_clock(struct snd_soc_codec *codec, int frame_rate) * factor of freq = 96 kHz can only be 256, since mclk is in the range * of 8 MHz - 27 MHz */ - switch (sgtl5000->sysclk / sys_fs) { + switch (sgtl5000->sysclk / frame_rate) { case 256: clk_ctl |= SGTL5000_MCLK_FREQ_256FS << SGTL5000_MCLK_FREQ_SHIFT; @@ -641,7 +641,7 @@ static int sgtl5000_set_clock(struct snd_soc_codec *codec, int frame_rate) "PLL not supported in slave mode\n"); dev_err(codec->dev, "%d ratio is not supported. " "SYS_MCLK needs to be 256, 384 or 512 * fs\n", - sgtl5000->sysclk / sys_fs); + sgtl5000->sysclk / frame_rate); return -EINVAL; } }
On Thu, Nov 27, 2014 at 01:01:59PM -0200, Fabio Estevam wrote:
From: Fabio Estevam fabio.estevam@freescale.com
According to the sgtl5000 datasheet the MCLK frequency range restriction of 8 to 27 MHz only applies when the PLL is used - synchronous SYS_MCLK input mode.
Applied all, thanks.
participants (2)
-
Fabio Estevam -
Mark Brown