[alsa-devel] [PATCH v2 00/13] OMAP: McBSP: hwmod adaptation and runtime conversion
Modify OMAP McBSP driver to use omap hwmod framework and pm runtime APIs.
Created on top of linux OMAP master (linux-omap-2.6 :master) Did digital loopback testing on OMAP4430, OMAP3430 and OMAP2430 SDP boards. Verified that this patch series does not break the OMAP1 build.
Patch series modifies audio layer and hence would appreciate the help of some audio guy to test this series.
Patch series requires the following patch to be present http://permalink.gmane.org/gmane.linux.ports.arm.omap/51132 http://permalink.gmane.org/gmane.linux.ports.arm.omap/51133 http://permalink.gmane.org/gmane.linux.ports.arm.omap/51134
V2: * Added omap_hwmod_lookup() in the callback to omap_hwmod_for_each_by_class() to obtain hwmod data for sidetone. Previously this nesting of hwmod APIs was prevented by the use of mutex.
* Added a revision member in hwmod database inorder to facilitate the driver to differentiate between different OMAP.
* Created APIs to pass DMA params from McBSP driver to client drivers
* Cleaned up sound soc by removing the use of macros to obtain base address and DMA channel number and instead use APIs exposed by the driver.
* Removed macros defined in mcbsp driver for data that is obtained from hwmod database
V1: * McBSP is designed to use multiple hwmods for a single device when the McBSP device has sidetone feature.
* To avoid funcionality break of OMAP1 McBSP in between the series and to keep the patches readable, implementation was done in two steps: - First modify mcbsp driver to use platform_get* APIs - then convert it to use hwmod framework for OMAP2+.
* API's like omap_device_noidle() and omap_device_default_idle() is used to change the SYCONFIG register bits. This change is done to align with the discussion on [2]
* Use '.rev' of omap_hwmod class to identify OMAP3 specific settings
* Use *ST_* macros for idlest_idle bit
* Incorporate other general review comments provided for hwmod adpatation of other OMAP driver's (eg., do pdata free after a omap_device_build())
* Retain fclk even after pm_runtime adaptation to facilitate switching of functional clock from one source to another
* Add member 'name' to omap_hwmod_addr_space struct so that the driver need not rely on the order to get the proper resource [3].
Discussions related to the first RFC patch can be found at [1]
[1]: http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36743.html [2]: http://www.mail-archive.com/linux-omap@vger.kernel.org/msg39615.html [3]: https://patchwork.kernel.org/patch/233211/
Benoit Cousson (1): OMAP4: hwmod data: Add McBSP
Charulatha V (3): OMAP2420: hwmod data: Add McBSP OMAP2430: hwmod data: Add McBSP OMAP3: hwmod data: Add McBSP
Kishon Vijay Abraham I (9): OMAP: hwmod: Add member 'name' to omap_hwmod_addr_space struct OMAP: McBSP: Convert McBSP to platform device model OMAP3: hwmod: add dev_attr for McBSP sidetone OMAP2+: McBSP: hwmod adaptation for McBSP OMAP: McBSP: use omap_device APIs to modify SYSCONFIG OMAP: McBSP: Add pm runtime support OMAP: McBSP: APIs to pass DMA params from McBSP driver to client drivers ASoC: McBSP: get hw params from McBSP driver OMAP: hwmod: Removal of macros for data that is obtained from hwmod database
arch/arm/mach-omap1/mcbsp.c | 383 +++++++++++++++---- arch/arm/mach-omap2/mcbsp.c | 228 +++--------- arch/arm/mach-omap2/omap_hwmod.c | 1 + arch/arm/mach-omap2/omap_hwmod_2420_data.c | 167 ++++++++ arch/arm/mach-omap2/omap_hwmod_2430_data.c | 417 ++++++++++++++++++++ arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 544 ++++++++++++++++++++++++++ arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 321 +++++++++++++++ arch/arm/mach-omap2/prcm-common.h | 4 + arch/arm/plat-omap/devices.c | 10 +- arch/arm/plat-omap/include/plat/mcbsp.h | 69 +--- arch/arm/plat-omap/include/plat/omap_hwmod.h | 4 +- arch/arm/plat-omap/mcbsp.c | 207 +++++++--- sound/soc/omap/omap-mcbsp.c | 126 +------ 13 files changed, 2006 insertions(+), 475 deletions(-)
Adds a structure member 'name' to 'omap_hwmod_addr_space' structure. The drivers can use platform_get_resource_byname() to get resource of type 'IORESOURCE_MEM' by name so that it need not rely on the order to get the proper resource.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com Signed-off-by: Benoit Cousson b-cousson@ti.com --- arch/arm/mach-omap2/omap_hwmod.c | 1 + arch/arm/plat-omap/include/plat/omap_hwmod.h | 4 +++- 2 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 709543a..7bd4900 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1898,6 +1898,7 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) os = oh->slaves[i];
for (j = 0; j < os->addr_cnt; j++) { + (res + r)->name = (os->addr + j)->name; (res + r)->start = (os->addr + j)->pa_start; (res + r)->end = (os->addr + j)->pa_end; (res + r)->flags = IORESOURCE_MEM; diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 76f0274..85899a7 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -178,7 +178,8 @@ struct omap_hwmod_omap2_firewall { #define ADDR_TYPE_RT (1 << 1)
/** - * struct omap_hwmod_addr_space - MPU address space handled by the hwmod + * struct omap_hwmod_addr_space - address space handled by the hwmod + * @name: name of the address space * @pa_start: starting physical address * @pa_end: ending physical address * @flags: (see omap_hwmod_addr_space.flags macros above) @@ -187,6 +188,7 @@ struct omap_hwmod_omap2_firewall { * structure. GPMC is one example. */ struct omap_hwmod_addr_space { + const char *name; u32 pa_start; u32 pa_end; u8 flags;
Kishon Vijay Abraham I kishon@ti.com writes:
Adds a structure member 'name' to 'omap_hwmod_addr_space' structure. The drivers can use platform_get_resource_byname() to get resource of type 'IORESOURCE_MEM' by name so that it need not rely on the order to get the proper resource.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com Signed-off-by: Benoit Cousson b-cousson@ti.com
arch/arm/mach-omap2/omap_hwmod.c | 1 + arch/arm/plat-omap/include/plat/omap_hwmod.h | 4 +++- 2 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 709543a..7bd4900 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1898,6 +1898,7 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) os = oh->slaves[i];
for (j = 0; j < os->addr_cnt; j++) {
(res + r)->name = (os->addr + j)->name; (res + r)->start = (os->addr + j)->pa_start; (res + r)->end = (os->addr + j)->pa_end; (res + r)->flags = IORESOURCE_MEM;diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 76f0274..85899a7 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -178,7 +178,8 @@ struct omap_hwmod_omap2_firewall { #define ADDR_TYPE_RT (1 << 1)
/**
- struct omap_hwmod_addr_space - MPU address space handled by the hwmod
- struct omap_hwmod_addr_space - address space handled by the hwmod
Any reason you modified the comment here?
Kevin
- @name: name of the address space
- @pa_start: starting physical address
- @pa_end: ending physical address
- @flags: (see omap_hwmod_addr_space.flags macros above)
@@ -187,6 +188,7 @@ struct omap_hwmod_omap2_firewall {
- structure. GPMC is one example.
*/ struct omap_hwmod_addr_space {
- const char *name; u32 pa_start; u32 pa_end; u8 flags;
On 2/4/2011 8:45 PM, Hilman, Kevin wrote:
Kishon Vijay Abraham Ikishon@ti.com writes:
Adds a structure member 'name' to 'omap_hwmod_addr_space' structure. The drivers can use platform_get_resource_byname() to get resource of type 'IORESOURCE_MEM' by name so that it need not rely on the order to get the proper resource.
Signed-off-by: Kishon Vijay Abraham Ikishon@ti.com Signed-off-by: Benoit Coussonb-cousson@ti.com
arch/arm/mach-omap2/omap_hwmod.c | 1 + arch/arm/plat-omap/include/plat/omap_hwmod.h | 4 +++- 2 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 709543a..7bd4900 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1898,6 +1898,7 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) os = oh->slaves[i];
for (j = 0; j< os->addr_cnt; j++) {
(res + r)->name = (os->addr + j)->name; (res + r)->start = (os->addr + j)->pa_start; (res + r)->end = (os->addr + j)->pa_end; (res + r)->flags = IORESOURCE_MEM;diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 76f0274..85899a7 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -178,7 +178,8 @@ struct omap_hwmod_omap2_firewall { #define ADDR_TYPE_RT (1<< 1)
/**
- struct omap_hwmod_addr_space - MPU address space handled by the hwmod
- struct omap_hwmod_addr_space - address space handled by the hwmod
Any reason you modified the comment here?
The idea of that patch is to allow hwmod to provide address space accessible from SDMA (though L3). Hence the suppression of the MPU. In the future, we might even be able to provide the address for the DSP or the IPU viewpoint
Regards, Benoit
Kevin
- @name: name of the address space
- @pa_start: starting physical address
- @pa_end: ending physical address
- @flags: (see omap_hwmod_addr_space.flags macros above)
@@ -187,6 +188,7 @@ struct omap_hwmod_omap2_firewall {
- structure. GPMC is one example.
*/ struct omap_hwmod_addr_space {
- const char *name; u32 pa_start; u32 pa_end; u8 flags;
"Cousson, Benoit" b-cousson@ti.com writes:
On 2/4/2011 8:45 PM, Hilman, Kevin wrote:
Kishon Vijay Abraham Ikishon@ti.com writes:
Adds a structure member 'name' to 'omap_hwmod_addr_space' structure. The drivers can use platform_get_resource_byname() to get resource of type 'IORESOURCE_MEM' by name so that it need not rely on the order to get the proper resource.
Signed-off-by: Kishon Vijay Abraham Ikishon@ti.com Signed-off-by: Benoit Coussonb-cousson@ti.com
arch/arm/mach-omap2/omap_hwmod.c | 1 + arch/arm/plat-omap/include/plat/omap_hwmod.h | 4 +++- 2 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 709543a..7bd4900 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1898,6 +1898,7 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) os = oh->slaves[i];
for (j = 0; j< os->addr_cnt; j++) {
(res + r)->name = (os->addr + j)->name; (res + r)->start = (os->addr + j)->pa_start; (res + r)->end = (os->addr + j)->pa_end; (res + r)->flags = IORESOURCE_MEM;diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 76f0274..85899a7 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -178,7 +178,8 @@ struct omap_hwmod_omap2_firewall { #define ADDR_TYPE_RT (1<< 1)
/**
- struct omap_hwmod_addr_space - MPU address space handled by the hwmod
- struct omap_hwmod_addr_space - address space handled by the hwmod
Any reason you modified the comment here?
The idea of that patch is to allow hwmod to provide address space accessible from SDMA (though L3). Hence the suppression of the MPU. In the future, we might even be able to provide the address for the DSP or the IPU viewpoint
OK, this rationale is missing from the changelog, and seems very much unrelated to $SUBJECT patch.
Kevin
On Sat, Feb 5, 2011 at 3:46 AM, Kevin Hilman khilman@ti.com wrote:
"Cousson, Benoit" b-cousson@ti.com writes:
On 2/4/2011 8:45 PM, Hilman, Kevin wrote:
Kishon Vijay Abraham Ikishon@ti.com writes:
Adds a structure member 'name' to 'omap_hwmod_addr_space' structure. The drivers can use platform_get_resource_byname() to get resource of type 'IORESOURCE_MEM' by name so that it need not rely on the order to get the proper resource.
Signed-off-by: Kishon Vijay Abraham Ikishon@ti.com Signed-off-by: Benoit Coussonb-cousson@ti.com
arch/arm/mach-omap2/omap_hwmod.c | 1 + arch/arm/plat-omap/include/plat/omap_hwmod.h | 4 +++- 2 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 709543a..7bd4900 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1898,6 +1898,7 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) os = oh->slaves[i];
for (j = 0; j< os->addr_cnt; j++) {
- (res + r)->name = (os->addr + j)->name;
(res + r)->start = (os->addr + j)->pa_start; (res + r)->end = (os->addr + j)->pa_end; (res + r)->flags = IORESOURCE_MEM; diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 76f0274..85899a7 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -178,7 +178,8 @@ struct omap_hwmod_omap2_firewall { #define ADDR_TYPE_RT (1<< 1)
/**
- struct omap_hwmod_addr_space - MPU address space handled by the hwmod
- struct omap_hwmod_addr_space - address space handled by the hwmod
Any reason you modified the comment here?
The idea of that patch is to allow hwmod to provide address space accessible from SDMA (though L3). Hence the suppression of the MPU. In the future, we might even be able to provide the address for the DSP or the IPU viewpoint
OK, this rationale is missing from the changelog, and seems very much unrelated to $SUBJECT patch.
ok. Will change it in the next version.
Kevin
Implement McBSP as platform device and add support for registering through platform device layer using resource structures.
Later in this patch series, OMAP2+ McBSP driver would be modified to use hwmod framework after populating the omap2+ hwmod database.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- arch/arm/mach-omap1/mcbsp.c | 383 ++++++++++++++--- arch/arm/mach-omap2/mcbsp.c | 704 +++++++++++++++++++++++++----- arch/arm/plat-omap/devices.c | 10 +- arch/arm/plat-omap/include/plat/mcbsp.h | 14 +- arch/arm/plat-omap/mcbsp.c | 60 +++- 5 files changed, 966 insertions(+), 205 deletions(-)
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index 8209736..2b89ebd 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c @@ -10,6 +10,7 @@ * * Multichannel mode not supported. */ +#include <linux/ioport.h> #include <linux/module.h> #include <linux/init.h> #include <linux/clk.h> @@ -78,100 +79,344 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = { };
#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) +struct resource omap7xx_mcbsp_res[][6] = { + { + { + .name = "mpu", + .start = OMAP7XX_MCBSP1_BASE, + .end = OMAP7XX_MCBSP1_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP7XX_MCBSP1_BASE, + .end = OMAP7XX_MCBSP1_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_7XX_McBSP1RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_7XX_McBSP1TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP_DMA_MCBSP1_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP_DMA_MCBSP1_TX, + .flags = IORESOURCE_DMA, + }, + }, + { + { + .name = "mpu", + .start = OMAP7XX_MCBSP2_BASE, + .end = OMAP7XX_MCBSP2_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP7XX_MCBSP2_BASE, + .end = OMAP7XX_MCBSP2_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_7XX_McBSP2RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_7XX_McBSP2TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP_DMA_MCBSP3_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP_DMA_MCBSP3_TX, + .flags = IORESOURCE_DMA, + }, + }, +}; + static struct omap_mcbsp_platform_data omap7xx_mcbsp_pdata[] = { { - .phys_base = OMAP7XX_MCBSP1_BASE, - .dma_rx_sync = OMAP_DMA_MCBSP1_RX, - .dma_tx_sync = OMAP_DMA_MCBSP1_TX, - .rx_irq = INT_7XX_McBSP1RX, - .tx_irq = INT_7XX_McBSP1TX, .ops = &omap1_mcbsp_ops, }, { - .phys_base = OMAP7XX_MCBSP2_BASE, - .dma_rx_sync = OMAP_DMA_MCBSP3_RX, - .dma_tx_sync = OMAP_DMA_MCBSP3_TX, - .rx_irq = INT_7XX_McBSP2RX, - .tx_irq = INT_7XX_McBSP2TX, .ops = &omap1_mcbsp_ops, }, }; -#define OMAP7XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap7xx_mcbsp_pdata) -#define OMAP7XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1) +#define OMAP7XX_MCBSP_RES_SZ ARRAY_SIZE(omap7xx_mcbsp_res[1]) +#define OMAP7XX_MCBSP_COUNT ARRAY_SIZE(omap7xx_mcbsp_res) #else +#define omap7xx_mcbsp_res NULL #define omap7xx_mcbsp_pdata NULL -#define OMAP7XX_MCBSP_PDATA_SZ 0 -#define OMAP7XX_MCBSP_REG_NUM 0 +#define OMAP7XX_MCBSP_RES_SZ 0 +#define OMAP7XX_MCBSP_COUNT 0 #endif
#ifdef CONFIG_ARCH_OMAP15XX +struct resource omap15xx_mcbsp_res[][6] = { + { + { + .name = "mpu", + .start = OMAP1510_MCBSP1_BASE, + .end = OMAP1510_MCBSP1_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP1510_MCBSP1_BASE, + .end = OMAP1510_MCBSP1_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_McBSP1RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_McBSP1TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP_DMA_MCBSP1_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP_DMA_MCBSP1_TX, + .flags = IORESOURCE_DMA, + }, + }, + { + { + .name = "mpu", + .start = OMAP1510_MCBSP2_BASE, + .end = OMAP1510_MCBSP2_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP1510_MCBSP2_BASE, + .end = OMAP1510_MCBSP2_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_1510_SPI_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_1510_SPI_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP_DMA_MCBSP2_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP_DMA_MCBSP2_TX, + .flags = IORESOURCE_DMA, + }, + }, + { + { + .name = "mpu", + .start = OMAP1510_MCBSP3_BASE, + .end = OMAP1510_MCBSP3_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP1510_MCBSP3_BASE, + .end = OMAP1510_MCBSP3_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_McBSP3RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_McBSP3TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP_DMA_MCBSP3_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP_DMA_MCBSP3_TX, + .flags = IORESOURCE_DMA, + }, + }, +}; + static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { { - .phys_base = OMAP1510_MCBSP1_BASE, - .dma_rx_sync = OMAP_DMA_MCBSP1_RX, - .dma_tx_sync = OMAP_DMA_MCBSP1_TX, - .rx_irq = INT_McBSP1RX, - .tx_irq = INT_McBSP1TX, .ops = &omap1_mcbsp_ops, }, { - .phys_base = OMAP1510_MCBSP2_BASE, - .dma_rx_sync = OMAP_DMA_MCBSP2_RX, - .dma_tx_sync = OMAP_DMA_MCBSP2_TX, - .rx_irq = INT_1510_SPI_RX, - .tx_irq = INT_1510_SPI_TX, .ops = &omap1_mcbsp_ops, }, { - .phys_base = OMAP1510_MCBSP3_BASE, - .dma_rx_sync = OMAP_DMA_MCBSP3_RX, - .dma_tx_sync = OMAP_DMA_MCBSP3_TX, - .rx_irq = INT_McBSP3RX, - .tx_irq = INT_McBSP3TX, .ops = &omap1_mcbsp_ops, }, }; -#define OMAP15XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap15xx_mcbsp_pdata) -#define OMAP15XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1) +#define OMAP15XX_MCBSP_RES_SZ ARRAY_SIZE(omap15xx_mcbsp_res[1]) +#define OMAP15XX_MCBSP_COUNT ARRAY_SIZE(omap15xx_mcbsp_res) #else +#define omap15xx_mcbsp_res NULL #define omap15xx_mcbsp_pdata NULL -#define OMAP15XX_MCBSP_PDATA_SZ 0 -#define OMAP15XX_MCBSP_REG_NUM 0 +#define OMAP15XX_MCBSP_RES_SZ 0 +#define OMAP15XX_MCBSP_COUNT 0 #endif
#ifdef CONFIG_ARCH_OMAP16XX +struct resource omap16xx_mcbsp_res[][6] = { + { + { + .name = "mpu", + .start = OMAP1610_MCBSP1_BASE, + .end = OMAP1610_MCBSP1_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP1610_MCBSP1_BASE, + .end = OMAP1610_MCBSP1_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_McBSP1RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_McBSP1TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP_DMA_MCBSP1_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP_DMA_MCBSP1_TX, + .flags = IORESOURCE_DMA, + }, + }, + { + { + .name = "mpu", + .start = OMAP1610_MCBSP2_BASE, + .end = OMAP1610_MCBSP2_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP1610_MCBSP2_BASE, + .end = OMAP1610_MCBSP2_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_1610_McBSP2_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_1610_McBSP2_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP_DMA_MCBSP2_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP_DMA_MCBSP2_TX, + .flags = IORESOURCE_DMA, + }, + }, + { + { + .name = "mpu", + .start = OMAP1610_MCBSP3_BASE, + .end = OMAP1610_MCBSP3_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP1610_MCBSP3_BASE, + .end = OMAP1610_MCBSP3_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_McBSP3RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_McBSP3TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP_DMA_MCBSP3_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP_DMA_MCBSP3_TX, + .flags = IORESOURCE_DMA, + }, + }, +}; + static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { { - .phys_base = OMAP1610_MCBSP1_BASE, - .dma_rx_sync = OMAP_DMA_MCBSP1_RX, - .dma_tx_sync = OMAP_DMA_MCBSP1_TX, - .rx_irq = INT_McBSP1RX, - .tx_irq = INT_McBSP1TX, .ops = &omap1_mcbsp_ops, }, { - .phys_base = OMAP1610_MCBSP2_BASE, - .dma_rx_sync = OMAP_DMA_MCBSP2_RX, - .dma_tx_sync = OMAP_DMA_MCBSP2_TX, - .rx_irq = INT_1610_McBSP2_RX, - .tx_irq = INT_1610_McBSP2_TX, .ops = &omap1_mcbsp_ops, }, { - .phys_base = OMAP1610_MCBSP3_BASE, - .dma_rx_sync = OMAP_DMA_MCBSP3_RX, - .dma_tx_sync = OMAP_DMA_MCBSP3_TX, - .rx_irq = INT_McBSP3RX, - .tx_irq = INT_McBSP3TX, .ops = &omap1_mcbsp_ops, }, }; -#define OMAP16XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap16xx_mcbsp_pdata) -#define OMAP16XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1) +#define OMAP16XX_MCBSP_RES_SZ ARRAY_SIZE(omap16xx_mcbsp_res[1]) +#define OMAP16XX_MCBSP_COUNT ARRAY_SIZE(omap16xx_mcbsp_res) #else +#define omap16xx_mcbsp_res NULL #define omap16xx_mcbsp_pdata NULL -#define OMAP16XX_MCBSP_PDATA_SZ 0 -#define OMAP16XX_MCBSP_REG_NUM 0 +#define OMAP16XX_MCBSP_RES_SZ 0 +#define OMAP16XX_MCBSP_COUNT 0 #endif
static int __init omap1_mcbsp_init(void) @@ -179,16 +424,12 @@ static int __init omap1_mcbsp_init(void) if (!cpu_class_is_omap1()) return -ENODEV;
- if (cpu_is_omap7xx()) { - omap_mcbsp_count = OMAP7XX_MCBSP_PDATA_SZ; - omap_mcbsp_cache_size = OMAP7XX_MCBSP_REG_NUM * sizeof(u16); - } else if (cpu_is_omap15xx()) { - omap_mcbsp_count = OMAP15XX_MCBSP_PDATA_SZ; - omap_mcbsp_cache_size = OMAP15XX_MCBSP_REG_NUM * sizeof(u16); - } else if (cpu_is_omap16xx()) { - omap_mcbsp_count = OMAP16XX_MCBSP_PDATA_SZ; - omap_mcbsp_cache_size = OMAP16XX_MCBSP_REG_NUM * sizeof(u16); - } + if (cpu_is_omap7xx()) + omap_mcbsp_count = OMAP7XX_MCBSP_COUNT; + else if (cpu_is_omap15xx()) + omap_mcbsp_count = OMAP15XX_MCBSP_COUNT; + else if (cpu_is_omap16xx()) + omap_mcbsp_count = OMAP16XX_MCBSP_COUNT;
mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *), GFP_KERNEL); @@ -196,16 +437,22 @@ static int __init omap1_mcbsp_init(void) return -ENOMEM;
if (cpu_is_omap7xx()) - omap_mcbsp_register_board_cfg(omap7xx_mcbsp_pdata, - OMAP7XX_MCBSP_PDATA_SZ); + omap_mcbsp_register_board_cfg(omap7xx_mcbsp_res[0], + OMAP7XX_MCBSP_RES_SZ, + omap7xx_mcbsp_pdata, + OMAP7XX_MCBSP_COUNT);
if (cpu_is_omap15xx()) - omap_mcbsp_register_board_cfg(omap15xx_mcbsp_pdata, - OMAP15XX_MCBSP_PDATA_SZ); + omap_mcbsp_register_board_cfg(omap15xx_mcbsp_res[0], + OMAP15XX_MCBSP_RES_SZ, + omap15xx_mcbsp_pdata, + OMAP15XX_MCBSP_COUNT);
if (cpu_is_omap16xx()) - omap_mcbsp_register_board_cfg(omap16xx_mcbsp_pdata, - OMAP16XX_MCBSP_PDATA_SZ); + omap_mcbsp_register_board_cfg(omap16xx_mcbsp_res[0], + OMAP16XX_MCBSP_RES_SZ, + omap16xx_mcbsp_pdata, + OMAP16XX_MCBSP_COUNT);
return omap_mcbsp_init(); } diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index 0526b75..bc004be 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -105,173 +105,633 @@ EXPORT_SYMBOL(omap2_mcbsp_set_clks_src); /* Platform data */
#ifdef CONFIG_SOC_OMAP2420 -static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = { +struct resource omap2420_mcbsp_res[][6] = { { - .phys_base = OMAP24XX_MCBSP1_BASE, - .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, - .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, - .rx_irq = INT_24XX_MCBSP1_IRQ_RX, - .tx_irq = INT_24XX_MCBSP1_IRQ_TX, + { + .name = "mpu", + .start = OMAP24XX_MCBSP1_BASE, + .end = OMAP24XX_MCBSP1_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP24XX_MCBSP1_BASE, + .end = OMAP24XX_MCBSP1_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_24XX_MCBSP1_IRQ_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_24XX_MCBSP1_IRQ_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP24XX_DMA_MCBSP1_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP24XX_DMA_MCBSP1_TX, + .flags = IORESOURCE_DMA, + }, }, { - .phys_base = OMAP24XX_MCBSP2_BASE, - .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, - .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, - .rx_irq = INT_24XX_MCBSP2_IRQ_RX, - .tx_irq = INT_24XX_MCBSP2_IRQ_TX, + { + .name = "mpu", + .start = OMAP24XX_MCBSP2_BASE, + .end = OMAP24XX_MCBSP2_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP24XX_MCBSP2_BASE, + .end = OMAP24XX_MCBSP2_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_24XX_MCBSP2_IRQ_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_24XX_MCBSP2_IRQ_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP24XX_DMA_MCBSP2_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP24XX_DMA_MCBSP2_TX, + .flags = IORESOURCE_DMA, + }, }, }; -#define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata) -#define OMAP2420_MCBSP_REG_NUM (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1) +#define OMAP2420_MCBSP_RES_SZ ARRAY_SIZE(omap2420_mcbsp_res[1]) +#define OMAP2420_MCBSP_COUNT ARRAY_SIZE(omap2420_mcbsp_res) #else -#define omap2420_mcbsp_pdata NULL -#define OMAP2420_MCBSP_PDATA_SZ 0 -#define OMAP2420_MCBSP_REG_NUM 0 +#define omap2420_mcbsp_res NULL +#define OMAP2420_MCBSP_RES_SZ 0 +#define OMAP2420_MCBSP_COUNT 0 #endif
+#define omap2420_mcbsp_pdata NULL + #ifdef CONFIG_SOC_OMAP2430 -static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { +struct resource omap2430_mcbsp_res[][6] = { { - .phys_base = OMAP24XX_MCBSP1_BASE, - .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, - .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, - .rx_irq = INT_24XX_MCBSP1_IRQ_RX, - .tx_irq = INT_24XX_MCBSP1_IRQ_TX, + { + .name = "mpu", + .start = OMAP24XX_MCBSP1_BASE, + .end = OMAP24XX_MCBSP1_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP24XX_MCBSP1_BASE, + .end = OMAP24XX_MCBSP1_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_24XX_MCBSP1_IRQ_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_24XX_MCBSP1_IRQ_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP24XX_DMA_MCBSP1_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP24XX_DMA_MCBSP1_TX, + .flags = IORESOURCE_DMA, + }, }, { - .phys_base = OMAP24XX_MCBSP2_BASE, - .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, - .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, - .rx_irq = INT_24XX_MCBSP2_IRQ_RX, - .tx_irq = INT_24XX_MCBSP2_IRQ_TX, + { + .name = "mpu", + .start = OMAP24XX_MCBSP2_BASE, + .end = OMAP24XX_MCBSP2_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP24XX_MCBSP2_BASE, + .end = OMAP24XX_MCBSP2_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_24XX_MCBSP2_IRQ_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_24XX_MCBSP2_IRQ_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP24XX_DMA_MCBSP2_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP24XX_DMA_MCBSP2_TX, + .flags = IORESOURCE_DMA, + }, }, { - .phys_base = OMAP2430_MCBSP3_BASE, - .dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX, - .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX, - .rx_irq = INT_24XX_MCBSP3_IRQ_RX, - .tx_irq = INT_24XX_MCBSP3_IRQ_TX, + { + .name = "mpu", + .start = OMAP2430_MCBSP3_BASE, + .end = OMAP2430_MCBSP3_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP2430_MCBSP3_BASE, + .end = OMAP2430_MCBSP3_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_24XX_MCBSP3_IRQ_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_24XX_MCBSP3_IRQ_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP24XX_DMA_MCBSP3_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP24XX_DMA_MCBSP3_TX, + .flags = IORESOURCE_DMA, + }, }, { - .phys_base = OMAP2430_MCBSP4_BASE, - .dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX, - .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX, - .rx_irq = INT_24XX_MCBSP4_IRQ_RX, - .tx_irq = INT_24XX_MCBSP4_IRQ_TX, + { + .name = "mpu", + .start = OMAP2430_MCBSP4_BASE, + .end = OMAP2430_MCBSP4_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP2430_MCBSP4_BASE, + .end = OMAP2430_MCBSP4_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_24XX_MCBSP4_IRQ_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_24XX_MCBSP4_IRQ_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP24XX_DMA_MCBSP4_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP24XX_DMA_MCBSP4_TX, + .flags = IORESOURCE_DMA, + }, }, { - .phys_base = OMAP2430_MCBSP5_BASE, - .dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX, - .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX, - .rx_irq = INT_24XX_MCBSP5_IRQ_RX, - .tx_irq = INT_24XX_MCBSP5_IRQ_TX, + { + .name = "mpu", + .start = OMAP2430_MCBSP5_BASE, + .end = OMAP2430_MCBSP5_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP2430_MCBSP5_BASE, + .end = OMAP2430_MCBSP5_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_24XX_MCBSP5_IRQ_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_24XX_MCBSP5_IRQ_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP24XX_DMA_MCBSP5_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP24XX_DMA_MCBSP5_TX, + .flags = IORESOURCE_DMA, + }, }, }; -#define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata) -#define OMAP2430_MCBSP_REG_NUM (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1) +#define OMAP2430_MCBSP_RES_SZ ARRAY_SIZE(omap2430_mcbsp_res[1]) +#define OMAP2430_MCBSP_COUNT ARRAY_SIZE(omap2430_mcbsp_res) #else -#define omap2430_mcbsp_pdata NULL -#define OMAP2430_MCBSP_PDATA_SZ 0 -#define OMAP2430_MCBSP_REG_NUM 0 +#define omap2430_mcbsp_res NULL +#define OMAP2430_MCBSP_RES_SZ 0 +#define OMAP2430_MCBSP_COUNT 0 #endif
+#define omap2430_mcbsp_pdata NULL + #ifdef CONFIG_ARCH_OMAP3 +struct resource omap34xx_mcbsp_res[][7] = { + { + { + .name = "mpu", + .start = OMAP34XX_MCBSP1_BASE, + .end = OMAP34XX_MCBSP1_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP34XX_MCBSP1_BASE, + .end = OMAP34XX_MCBSP1_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_24XX_MCBSP1_IRQ_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_24XX_MCBSP1_IRQ_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP24XX_DMA_MCBSP1_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP24XX_DMA_MCBSP1_TX, + .flags = IORESOURCE_DMA, + }, + }, + { + { + .name = "mpu", + .start = OMAP34XX_MCBSP2_BASE, + .end = OMAP34XX_MCBSP2_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP34XX_MCBSP2_BASE, + .end = OMAP34XX_MCBSP2_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "sidetone", + .start = OMAP34XX_MCBSP2_ST_BASE, + .end = OMAP34XX_MCBSP2_ST_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_24XX_MCBSP2_IRQ_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_24XX_MCBSP2_IRQ_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP24XX_DMA_MCBSP2_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP24XX_DMA_MCBSP2_TX, + .flags = IORESOURCE_DMA, + }, + }, + { + { + .name = "mpu", + .start = OMAP34XX_MCBSP3_BASE, + .end = OMAP34XX_MCBSP3_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP34XX_MCBSP3_BASE, + .end = OMAP34XX_MCBSP3_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "sidetone", + .start = OMAP34XX_MCBSP3_ST_BASE, + .end = OMAP34XX_MCBSP3_ST_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_24XX_MCBSP3_IRQ_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_24XX_MCBSP3_IRQ_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP24XX_DMA_MCBSP3_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP24XX_DMA_MCBSP3_TX, + .flags = IORESOURCE_DMA, + }, + }, + { + { + .name = "mpu", + .start = OMAP34XX_MCBSP4_BASE, + .end = OMAP34XX_MCBSP4_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP34XX_MCBSP4_BASE, + .end = OMAP34XX_MCBSP4_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_24XX_MCBSP4_IRQ_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_24XX_MCBSP4_IRQ_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP24XX_DMA_MCBSP4_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP24XX_DMA_MCBSP4_TX, + .flags = IORESOURCE_DMA, + }, + }, + { + { + .name = "mpu", + .start = OMAP34XX_MCBSP5_BASE, + .end = OMAP34XX_MCBSP5_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP34XX_MCBSP5_BASE, + .end = OMAP34XX_MCBSP5_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = INT_24XX_MCBSP5_IRQ_RX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = INT_24XX_MCBSP5_IRQ_TX, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP24XX_DMA_MCBSP5_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP24XX_DMA_MCBSP5_TX, + .flags = IORESOURCE_DMA, + }, + }, +}; + static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { { - .phys_base = OMAP34XX_MCBSP1_BASE, - .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, - .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, - .rx_irq = INT_24XX_MCBSP1_IRQ_RX, - .tx_irq = INT_24XX_MCBSP1_IRQ_TX, .buffer_size = 0x80, /* The FIFO has 128 locations */ }, { - .phys_base = OMAP34XX_MCBSP2_BASE, - .phys_base_st = OMAP34XX_MCBSP2_ST_BASE, - .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, - .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, - .rx_irq = INT_24XX_MCBSP2_IRQ_RX, - .tx_irq = INT_24XX_MCBSP2_IRQ_TX, .buffer_size = 0x500, /* The FIFO has 1024 + 256 locations */ }, { - .phys_base = OMAP34XX_MCBSP3_BASE, - .phys_base_st = OMAP34XX_MCBSP3_ST_BASE, - .dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX, - .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX, - .rx_irq = INT_24XX_MCBSP3_IRQ_RX, - .tx_irq = INT_24XX_MCBSP3_IRQ_TX, .buffer_size = 0x80, /* The FIFO has 128 locations */ }, { - .phys_base = OMAP34XX_MCBSP4_BASE, - .dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX, - .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX, - .rx_irq = INT_24XX_MCBSP4_IRQ_RX, - .tx_irq = INT_24XX_MCBSP4_IRQ_TX, .buffer_size = 0x80, /* The FIFO has 128 locations */ }, { - .phys_base = OMAP34XX_MCBSP5_BASE, - .dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX, - .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX, - .rx_irq = INT_24XX_MCBSP5_IRQ_RX, - .tx_irq = INT_24XX_MCBSP5_IRQ_TX, .buffer_size = 0x80, /* The FIFO has 128 locations */ }, }; -#define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) -#define OMAP34XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1) +#define OMAP34XX_MCBSP_RES_SZ ARRAY_SIZE(omap34xx_mcbsp_res[1]) +#define OMAP34XX_MCBSP_COUNT ARRAY_SIZE(omap34xx_mcbsp_res) #else #define omap34xx_mcbsp_pdata NULL -#define OMAP34XX_MCBSP_PDATA_SZ 0 -#define OMAP34XX_MCBSP_REG_NUM 0 +#define omap34XX_mcbsp_res NULL +#define OMAP34XX_MCBSP_RES_SZ 0 +#define OMAP34XX_MCBSP_COUNT 0 #endif
-static struct omap_mcbsp_platform_data omap44xx_mcbsp_pdata[] = { +struct resource omap44xx_mcbsp_res[][6] = { { - .phys_base = OMAP44XX_MCBSP1_BASE, - .dma_rx_sync = OMAP44XX_DMA_MCBSP1_RX, - .dma_tx_sync = OMAP44XX_DMA_MCBSP1_TX, - .tx_irq = OMAP44XX_IRQ_MCBSP1, + { + .name = "mpu", + .start = OMAP44XX_MCBSP1_BASE, + .end = OMAP44XX_MCBSP1_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP44XX_MCBSP1_DMA_BASE, + .end = OMAP44XX_MCBSP1_DMA_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = 0, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = OMAP44XX_IRQ_MCBSP1, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP44XX_DMA_MCBSP1_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP44XX_DMA_MCBSP1_TX, + .flags = IORESOURCE_DMA, + }, }, { - .phys_base = OMAP44XX_MCBSP2_BASE, - .dma_rx_sync = OMAP44XX_DMA_MCBSP2_RX, - .dma_tx_sync = OMAP44XX_DMA_MCBSP2_TX, - .tx_irq = OMAP44XX_IRQ_MCBSP2, + { + .name = "mpu", + .start = OMAP44XX_MCBSP2_BASE, + .end = OMAP44XX_MCBSP2_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP44XX_MCBSP2_DMA_BASE, + .end = OMAP44XX_MCBSP2_DMA_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = 0, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = OMAP44XX_IRQ_MCBSP2, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP44XX_DMA_MCBSP2_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP44XX_DMA_MCBSP2_TX, + .flags = IORESOURCE_DMA, + }, }, { - .phys_base = OMAP44XX_MCBSP3_BASE, - .dma_rx_sync = OMAP44XX_DMA_MCBSP3_RX, - .dma_tx_sync = OMAP44XX_DMA_MCBSP3_TX, - .tx_irq = OMAP44XX_IRQ_MCBSP3, + { + .name = "mpu", + .start = OMAP44XX_MCBSP3_BASE, + .end = OMAP44XX_MCBSP3_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP44XX_MCBSP3_DMA_BASE, + .end = OMAP44XX_MCBSP3_DMA_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = 0, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = OMAP44XX_IRQ_MCBSP3, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP44XX_DMA_MCBSP3_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP44XX_DMA_MCBSP3_TX, + .flags = IORESOURCE_DMA, + }, }, { - .phys_base = OMAP44XX_MCBSP4_BASE, - .dma_rx_sync = OMAP44XX_DMA_MCBSP4_RX, - .dma_tx_sync = OMAP44XX_DMA_MCBSP4_TX, - .tx_irq = OMAP44XX_IRQ_MCBSP4, + { + .name = "mpu", + .start = OMAP44XX_MCBSP4_BASE, + .end = OMAP44XX_MCBSP4_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "dma", + .start = OMAP44XX_MCBSP4_BASE, + .end = OMAP44XX_MCBSP4_BASE + SZ_256, + .flags = IORESOURCE_MEM, + }, + { + .name = "rx", + .start = 0, + .flags = IORESOURCE_IRQ, + }, + { + .name = "tx", + .start = OMAP44XX_IRQ_MCBSP4, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = OMAP44XX_DMA_MCBSP4_RX, + .flags = IORESOURCE_DMA, + }, + { + .name = "tx", + .start = OMAP44XX_DMA_MCBSP4_TX, + .flags = IORESOURCE_DMA, + }, }, }; -#define OMAP44XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap44xx_mcbsp_pdata) -#define OMAP44XX_MCBSP_REG_NUM (OMAP_MCBSP_REG_RCCR / sizeof(u32) + 1) +#define omap44xx_mcbsp_pdata NULL +#define OMAP44XX_MCBSP_RES_SZ ARRAY_SIZE(omap44xx_mcbsp_res[1]) +#define OMAP44XX_MCBSP_COUNT ARRAY_SIZE(omap44xx_mcbsp_res)
static int __init omap2_mcbsp_init(void) { - if (cpu_is_omap2420()) { - omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ; - omap_mcbsp_cache_size = OMAP2420_MCBSP_REG_NUM * sizeof(u16); - } else if (cpu_is_omap2430()) { - omap_mcbsp_count = OMAP2430_MCBSP_PDATA_SZ; - omap_mcbsp_cache_size = OMAP2430_MCBSP_REG_NUM * sizeof(u32); - } else if (cpu_is_omap34xx()) { - omap_mcbsp_count = OMAP34XX_MCBSP_PDATA_SZ; - omap_mcbsp_cache_size = OMAP34XX_MCBSP_REG_NUM * sizeof(u32); - } else if (cpu_is_omap44xx()) { - omap_mcbsp_count = OMAP44XX_MCBSP_PDATA_SZ; - omap_mcbsp_cache_size = OMAP44XX_MCBSP_REG_NUM * sizeof(u32); - } + if (cpu_is_omap2420()) + omap_mcbsp_count = OMAP2420_MCBSP_COUNT; + else if (cpu_is_omap2430()) + omap_mcbsp_count = OMAP2430_MCBSP_COUNT; + else if (cpu_is_omap34xx()) + omap_mcbsp_count = OMAP34XX_MCBSP_COUNT; + else if (cpu_is_omap44xx()) + omap_mcbsp_count = OMAP44XX_MCBSP_COUNT;
mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *), GFP_KERNEL); @@ -279,17 +739,25 @@ static int __init omap2_mcbsp_init(void) return -ENOMEM;
if (cpu_is_omap2420()) - omap_mcbsp_register_board_cfg(omap2420_mcbsp_pdata, - OMAP2420_MCBSP_PDATA_SZ); + omap_mcbsp_register_board_cfg(omap2420_mcbsp_res[0], + OMAP2420_MCBSP_RES_SZ, + omap2420_mcbsp_pdata, + OMAP2420_MCBSP_COUNT); if (cpu_is_omap2430()) - omap_mcbsp_register_board_cfg(omap2430_mcbsp_pdata, - OMAP2430_MCBSP_PDATA_SZ); + omap_mcbsp_register_board_cfg(omap2430_mcbsp_res[0], + OMAP2420_MCBSP_RES_SZ, + omap2430_mcbsp_pdata, + OMAP2430_MCBSP_COUNT); if (cpu_is_omap34xx()) - omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata, - OMAP34XX_MCBSP_PDATA_SZ); + omap_mcbsp_register_board_cfg(omap34xx_mcbsp_res[0], + OMAP34XX_MCBSP_RES_SZ, + omap34xx_mcbsp_pdata, + OMAP34XX_MCBSP_COUNT); if (cpu_is_omap44xx()) - omap_mcbsp_register_board_cfg(omap44xx_mcbsp_pdata, - OMAP44XX_MCBSP_PDATA_SZ); + omap_mcbsp_register_board_cfg(omap44xx_mcbsp_res[0], + OMAP44XX_MCBSP_RES_SZ, + omap44xx_mcbsp_pdata, + OMAP44XX_MCBSP_COUNT);
return omap_mcbsp_init(); } diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c index 10245b8..7d9f815 100644 --- a/arch/arm/plat-omap/devices.c +++ b/arch/arm/plat-omap/devices.c @@ -35,8 +35,8 @@
static struct platform_device **omap_mcbsp_devices;
-void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, - int size) +void omap_mcbsp_register_board_cfg(struct resource *res, int res_count, + struct omap_mcbsp_platform_data *config, int size) { int i;
@@ -54,6 +54,8 @@ void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, new_mcbsp = platform_device_alloc("omap-mcbsp", i + 1); if (!new_mcbsp) continue; + platform_device_add_resources(new_mcbsp, &res[i * res_count], + res_count); new_mcbsp->dev.platform_data = &config[i]; ret = platform_device_add(new_mcbsp); if (ret) { @@ -65,8 +67,8 @@ void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, }
#else -void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, - int size) +void omap_mcbsp_register_board_cfg(struct resource *res, int res_count, + struct omap_mcbsp_platform_data *config, int size) { } #endif
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index b87d83c..e9bde6e 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -63,9 +63,12 @@ static struct platform_device omap_mcbsp##port_nr = { \ #define OMAP34XX_MCBSP4_BASE 0x49026000 #define OMAP34XX_MCBSP5_BASE 0x48096000
-#define OMAP44XX_MCBSP1_BASE 0x49022000 -#define OMAP44XX_MCBSP2_BASE 0x49024000 -#define OMAP44XX_MCBSP3_BASE 0x49026000 +#define OMAP44XX_MCBSP1_BASE 0x40122000 +#define OMAP44XX_MCBSP1_DMA_BASE 0x49022000 +#define OMAP44XX_MCBSP2_BASE 0x40124000 +#define OMAP44XX_MCBSP2_DMA_BASE 0x49024000 +#define OMAP44XX_MCBSP3_BASE 0x40126000 +#define OMAP44XX_MCBSP3_DMA_BASE 0x49026000 #define OMAP44XX_MCBSP4_BASE 0x48096000
#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) @@ -445,6 +448,7 @@ struct omap_mcbsp_st_data { struct omap_mcbsp { struct device *dev; unsigned long phys_base; + unsigned long phys_dma_base; void __iomem *io_base; u8 id; u8 free; @@ -488,8 +492,8 @@ extern int omap_mcbsp_count, omap_mcbsp_cache_size; #define id_to_mcbsp_ptr(id) mcbsp_ptr[id];
int omap_mcbsp_init(void); -void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, - int size); +void omap_mcbsp_register_board_cfg(struct resource *res, int res_count, + struct omap_mcbsp_platform_data *config, int size); void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg * config); #ifdef CONFIG_ARCH_OMAP3 void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold); diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 473edab..275a37a 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -1676,7 +1676,8 @@ static const struct attribute_group sidetone_attr_group = {
static int __devinit omap_st_add(struct omap_mcbsp *mcbsp) { - struct omap_mcbsp_platform_data *pdata = mcbsp->pdata; + struct platform_device *pdev; + struct resource *res; struct omap_mcbsp_st_data *st_data; int err;
@@ -1686,7 +1687,10 @@ static int __devinit omap_st_add(struct omap_mcbsp *mcbsp) goto err1; }
- st_data->io_base_st = ioremap(pdata->phys_base_st, SZ_4K); + pdev = container_of(mcbsp->dev, struct platform_device, dev); + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sidetone"); + st_data->io_base_st = ioremap(res->start, resource_size(res)); if (!st_data->io_base_st) { err = -ENOMEM; goto err2; @@ -1775,6 +1779,7 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data; struct omap_mcbsp *mcbsp; int id = pdev->id - 1; + struct resource *res; int ret = 0;
if (!pdata) { @@ -1804,25 +1809,60 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) mcbsp->dma_tx_lch = -1; mcbsp->dma_rx_lch = -1;
- mcbsp->phys_base = pdata->phys_base; - mcbsp->io_base = ioremap(pdata->phys_base, SZ_4K); + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu"); + if (!res) { + dev_err(&pdev->dev, "%s:mcbsp%d has invalid memory resource\n", + __func__, pdev->id); + ret = -ENOMEM; + goto exit; + } + mcbsp->phys_base = res->start; + mcbsp->io_base = ioremap(res->start, resource_size(res)); if (!mcbsp->io_base) { ret = -ENOMEM; goto err_ioremap; }
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma"); + if (!res) { + dev_err(&pdev->dev, "%s:mcbsp%d has invalid memory resource\n", + __func__, pdev->id); + ret = -ENOMEM; + goto exit; + } + mcbsp->phys_dma_base = res->start; + + omap_mcbsp_cache_size = resource_size(res); + /* Default I/O is IRQ based */ mcbsp->io_type = OMAP_MCBSP_IRQ_IO; - mcbsp->tx_irq = pdata->tx_irq; - mcbsp->rx_irq = pdata->rx_irq; - mcbsp->dma_rx_sync = pdata->dma_rx_sync; - mcbsp->dma_tx_sync = pdata->dma_tx_sync; + + mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx"); + mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx"); + + res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx"); + if (!res) { + dev_err(&pdev->dev, "%s:mcbsp%d has invalid rx DMA channel\n", + __func__, pdev->id); + ret = -ENODEV; + goto err_res; + } + mcbsp->dma_rx_sync = res->start; + + res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx"); + if (!res) { + dev_err(&pdev->dev, "%s:mcbsp%d has invalid tx DMA channel\n", + __func__, pdev->id); + ret = -ENODEV; + goto err_res; + } + mcbsp->dma_tx_sync = res->start;
mcbsp->iclk = clk_get(&pdev->dev, "ick"); if (IS_ERR(mcbsp->iclk)) { ret = PTR_ERR(mcbsp->iclk); dev_err(&pdev->dev, "unable to get ick: %d\n", ret); - goto err_iclk; + goto err_res; }
mcbsp->fclk = clk_get(&pdev->dev, "fck"); @@ -1844,7 +1884,7 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
err_fclk: clk_put(mcbsp->iclk); -err_iclk: +err_res: iounmap(mcbsp->io_base); err_ioremap: kfree(mcbsp);
On 01/31/2011 04:50 PM, ext Kishon Vijay Abraham I wrote:
Implement McBSP as platform device and add support for registering through platform device layer using resource structures.
Later in this patch series, OMAP2+ McBSP driver would be modified to use hwmod framework after populating the omap2+ hwmod database.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com
arch/arm/mach-omap1/mcbsp.c | 383 ++++++++++++++--- arch/arm/mach-omap2/mcbsp.c | 704 +++++++++++++++++++++++++----- arch/arm/plat-omap/devices.c | 10 +- arch/arm/plat-omap/include/plat/mcbsp.h | 14 +- arch/arm/plat-omap/mcbsp.c | 60 +++- 5 files changed, 966 insertions(+), 205 deletions(-)
Looks good,
Acked-by: Peter Ujfalusi peter.ujfalusi@nokia.com
From: Charulatha V charu@ti.com
Add McBSP hwmod data for OMAP2420.
Also add macros in prcm-common.h for idlest bit of OMAP24XX McBSP devices
Signed-off-by: Charulatha V charu@ti.com Signed-off-by: Kishon Vijay Abraham I kishon@ti.com Signed-off-by: Shubhrajyoti D shubhrajyoti@ti.com --- arch/arm/mach-omap2/omap_hwmod_2420_data.c | 167 ++++++++++++++++++++++++++++ arch/arm/mach-omap2/prcm-common.h | 4 + 2 files changed, 171 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index b85c630..6c8b6ee 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -87,6 +87,8 @@ static struct omap_hwmod omap2420_uart2_hwmod; static struct omap_hwmod omap2420_uart3_hwmod; static struct omap_hwmod omap2420_i2c1_hwmod; static struct omap_hwmod omap2420_i2c2_hwmod; +static struct omap_hwmod omap2420_mcbsp1_hwmod; +static struct omap_hwmod omap2420_mcbsp2_hwmod;
/* L4_CORE -> L4_WKUP interface */ static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = { @@ -864,6 +866,167 @@ static struct omap_hwmod omap2420_dma_system_hwmod = { .flags = HWMOD_NO_IDLEST, };
+/* + * 'mcbsp' class + * multi channel buffered serial port controller + */ + +static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = { + .name = "mcbsp", +}; + +/* mcbsp1 */ +static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { + { .name = "tx", .irq = 59 }, + { .name = "rx", .irq = 60 }, +}; + +static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { + { .name = "rx", .dma_req = 32 }, + { .name = "tx", .dma_req = 31 }, +}; + +static struct omap_hwmod_addr_space omap2420_mcbsp1_addrs[] = { + { + .name = "mpu", + .pa_start = 0x48074000, + .pa_end = 0x480740ff, + .flags = ADDR_TYPE_RT + }, +}; + +/* l4_core -> mcbsp1 */ +static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = { + .master = &omap2420_l4_core_hwmod, + .slave = &omap2420_mcbsp1_hwmod, + .clk = "mcbsp1_ick", + .addr = omap2420_mcbsp1_addrs, + .addr_cnt = ARRAY_SIZE(omap2420_mcbsp1_addrs), + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap2420_mcbsp1_dma_addrs[] = { + { + .name = "dma", + .pa_start = 0x48074000, + .pa_end = 0x480740ff, + .flags = ADDR_TYPE_RT + }, +}; + +static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1_dma = { + .master = &omap2420_l4_core_hwmod, + .slave = &omap2420_mcbsp1_hwmod, + .clk = "mcbsp1_ick", + .addr = omap2420_mcbsp1_dma_addrs, + .addr_cnt = ARRAY_SIZE(omap2420_mcbsp1_dma_addrs), + .user = OCP_USER_SDMA, +}; + +/* mcbsp1 slave ports */ +static struct omap_hwmod_ocp_if *omap2420_mcbsp1_slaves[] = { + &omap2420_l4_core__mcbsp1, + &omap2420_l4_core__mcbsp1_dma, +}; + +static struct omap_hwmod omap2420_mcbsp1_hwmod = { + .name = "mcbsp1", + .class = &omap2420_mcbsp_hwmod_class, + .mpu_irqs = omap2420_mcbsp1_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_irqs), + .sdma_reqs = omap2420_mcbsp1_sdma_chs, + .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_sdma_chs), + .main_clk = "mcbsp1_fck", + .prcm = { + .omap2 = { + .prcm_reg_id = 1, + .module_bit = OMAP24XX_EN_MCBSP1_SHIFT, + .module_offs = CORE_MOD, + .idlest_reg_id = 1, + .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT, + }, + }, + .slaves = omap2420_mcbsp1_slaves, + .slaves_cnt = ARRAY_SIZE(omap2420_mcbsp1_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), +}; + +/* mcbsp2 */ +static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = { + { .name = "tx", .irq = 62 }, + { .name = "rx", .irq = 63 }, +}; + +static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { + { .name = "rx", .dma_req = 34 }, + { .name = "tx", .dma_req = 33 }, +}; + +static struct omap_hwmod_addr_space omap2420_mcbsp2_addrs[] = { + { + .name = "mpu", + .pa_start = 0x48076000, + .pa_end = 0x480760ff, + .flags = ADDR_TYPE_RT + }, +}; + +/* l4_core -> mcbsp2 */ +static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = { + .master = &omap2420_l4_core_hwmod, + .slave = &omap2420_mcbsp2_hwmod, + .clk = "mcbsp2_ick", + .addr = omap2420_mcbsp2_addrs, + .addr_cnt = ARRAY_SIZE(omap2420_mcbsp2_addrs), + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap2420_mcbsp2_dma_addrs[] = { + { + .name = "dma", + .pa_start = 0x48076000, + .pa_end = 0x480760ff, + .flags = ADDR_TYPE_RT + }, +}; + +static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2_dma = { + .master = &omap2420_l4_core_hwmod, + .slave = &omap2420_mcbsp2_hwmod, + .clk = "mcbsp2_ick", + .addr = omap2420_mcbsp2_dma_addrs, + .addr_cnt = ARRAY_SIZE(omap2420_mcbsp2_dma_addrs), + .user = OCP_USER_SDMA, +}; + +/* mcbsp2 slave ports */ +static struct omap_hwmod_ocp_if *omap2420_mcbsp2_slaves[] = { + &omap2420_l4_core__mcbsp2, + &omap2420_l4_core__mcbsp2_dma, +}; + +static struct omap_hwmod omap2420_mcbsp2_hwmod = { + .name = "mcbsp2", + .class = &omap2420_mcbsp_hwmod_class, + .mpu_irqs = omap2420_mcbsp2_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_irqs), + .sdma_reqs = omap2420_mcbsp2_sdma_chs, + .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_sdma_chs), + .main_clk = "mcbsp2_fck", + .prcm = { + .omap2 = { + .prcm_reg_id = 1, + .module_bit = OMAP24XX_EN_MCBSP2_SHIFT, + .module_offs = CORE_MOD, + .idlest_reg_id = 1, + .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT, + }, + }, + .slaves = omap2420_mcbsp2_slaves, + .slaves_cnt = ARRAY_SIZE(omap2420_mcbsp2_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), +}; + static __initdata struct omap_hwmod *omap2420_hwmods[] = { &omap2420_l3_main_hwmod, &omap2420_l4_core_hwmod, @@ -885,6 +1048,10 @@ static __initdata struct omap_hwmod *omap2420_hwmods[] = {
/* dma_system class*/ &omap2420_dma_system_hwmod, + + /* mcbsp class */ + &omap2420_mcbsp1_hwmod, + &omap2420_mcbsp2_hwmod, NULL, };
diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h index 87486f5..d4af21d 100644 --- a/arch/arm/mach-omap2/prcm-common.h +++ b/arch/arm/mach-omap2/prcm-common.h @@ -121,6 +121,10 @@ #define OMAP24XX_ST_MCSPI2_MASK (1 << 18) #define OMAP24XX_ST_MCSPI1_SHIFT 17 #define OMAP24XX_ST_MCSPI1_MASK (1 << 17) +#define OMAP24XX_ST_MCBSP2_SHIFT 16 +#define OMAP24XX_ST_MCBSP2_MASK (1 << 16) +#define OMAP24XX_ST_MCBSP1_SHIFT 15 +#define OMAP24XX_ST_MCBSP1_MASK (1 << 15) #define OMAP24XX_ST_GPT12_SHIFT 14 #define OMAP24XX_ST_GPT12_MASK (1 << 14) #define OMAP24XX_ST_GPT11_SHIFT 13
From: Charulatha V charu@ti.com
Add McBSP hwmod data for OMAP2430.
Added a revision member inorder to facilitate the driver to differentiate between mcbsp in different omap.
Signed-off-by: Charulatha V charu@ti.com Signed-off-by: Kishon Vijay Abraham I kishon@ti.com Signed-off-by: Shubhrajyoti D shubhrajyoti@ti.com --- arch/arm/mach-omap2/omap_hwmod_2430_data.c | 417 ++++++++++++++++++++++++++++ arch/arm/plat-omap/include/plat/mcbsp.h | 2 + 2 files changed, 419 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 8ecfbcd..4f3f71f 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -18,6 +18,7 @@ #include <plat/serial.h> #include <plat/i2c.h> #include <plat/gpio.h> +#include <plat/mcbsp.h>
#include "omap_hwmod_common_data.h"
@@ -88,6 +89,11 @@ static struct omap_hwmod omap2430_uart2_hwmod; static struct omap_hwmod omap2430_uart3_hwmod; static struct omap_hwmod omap2430_i2c1_hwmod; static struct omap_hwmod omap2430_i2c2_hwmod; +static struct omap_hwmod omap2430_mcbsp1_hwmod; +static struct omap_hwmod omap2430_mcbsp2_hwmod; +static struct omap_hwmod omap2430_mcbsp3_hwmod; +static struct omap_hwmod omap2430_mcbsp4_hwmod; +static struct omap_hwmod omap2430_mcbsp5_hwmod;
/* I2C IP block address space length (in bytes) */ #define OMAP2_I2C_AS_LEN 128 @@ -919,6 +925,410 @@ static struct omap_hwmod omap2430_dma_system_hwmod = { .flags = HWMOD_NO_IDLEST, };
+/* + * 'mcbsp' class + * multi channel buffered serial port controller + */ + +static struct omap_hwmod_class_sysconfig omap2430_mcbsp_sysc = { + .rev_offs = 0x007C, + .sysc_offs = 0x008C, + .sysc_flags = (SYSC_HAS_SOFTRESET), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +static struct omap_hwmod_class omap2430_mcbsp_hwmod_class = { + .name = "mcbsp", + .sysc = &omap2430_mcbsp_sysc, + .rev = MCBSP_CONFIG_TYPE2, +}; + +/* mcbsp1 */ +static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { + { .name = "tx", .irq = 59 }, + { .name = "rx", .irq = 60 }, + { .name = "ovr", .irq = 61 }, + { .name = "common", .irq = 64 }, +}; + +static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { + { .name = "rx", .dma_req = 32 }, + { .name = "tx", .dma_req = 31 }, +}; + +static struct omap_hwmod_addr_space omap2430_mcbsp1_addrs[] = { + { + .name = "mpu", + .pa_start = 0x48074000, + .pa_end = 0x480740ff, + .flags = ADDR_TYPE_RT + }, +}; + +/* l4_core -> mcbsp1 */ +static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = { + .master = &omap2430_l4_core_hwmod, + .slave = &omap2430_mcbsp1_hwmod, + .clk = "mcbsp1_ick", + .addr = omap2430_mcbsp1_addrs, + .addr_cnt = ARRAY_SIZE(omap2430_mcbsp1_addrs), + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap2430_mcbsp1_dma_addrs[] = { + { + .name = "dma", + .pa_start = 0x48074000, + .pa_end = 0x480740ff, + .flags = ADDR_TYPE_RT + }, +}; + +static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1_dma = { + .master = &omap2430_l4_core_hwmod, + .slave = &omap2430_mcbsp1_hwmod, + .clk = "mcbsp1_ick", + .addr = omap2430_mcbsp1_dma_addrs, + .addr_cnt = ARRAY_SIZE(omap2430_mcbsp1_dma_addrs), + .user = OCP_USER_SDMA, +}; + +/* mcbsp1 slave ports */ +static struct omap_hwmod_ocp_if *omap2430_mcbsp1_slaves[] = { + &omap2430_l4_core__mcbsp1, + &omap2430_l4_core__mcbsp1_dma, +}; + +static struct omap_hwmod omap2430_mcbsp1_hwmod = { + .name = "mcbsp1", + .class = &omap2430_mcbsp_hwmod_class, + .mpu_irqs = omap2430_mcbsp1_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_irqs), + .sdma_reqs = omap2430_mcbsp1_sdma_chs, + .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_sdma_chs), + .main_clk = "mcbsp1_fck", + .prcm = { + .omap2 = { + .prcm_reg_id = 1, + .module_bit = OMAP24XX_EN_MCBSP1_SHIFT, + .module_offs = CORE_MOD, + .idlest_reg_id = 1, + .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT, + }, + }, + .slaves = omap2430_mcbsp1_slaves, + .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp1_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), +}; + +/* mcbsp2 */ +static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = { + { .name = "tx", .irq = 62 }, + { .name = "rx", .irq = 63 }, + { .name = "common", .irq = 16 }, +}; + +static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { + { .name = "rx", .dma_req = 34 }, + { .name = "tx", .dma_req = 33 }, +}; + +static struct omap_hwmod_addr_space omap2430_mcbsp2_addrs[] = { + { + .name = "mpu", + .pa_start = 0x48076000, + .pa_end = 0x480760ff, + .flags = ADDR_TYPE_RT + }, +}; + +/* l4_core -> mcbsp2 */ +static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = { + .master = &omap2430_l4_core_hwmod, + .slave = &omap2430_mcbsp2_hwmod, + .clk = "mcbsp2_ick", + .addr = omap2430_mcbsp2_addrs, + .addr_cnt = ARRAY_SIZE(omap2430_mcbsp2_addrs), + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap2430_mcbsp2_dma_addrs[] = { + { + .name = "dma", + .pa_start = 0x48076000, + .pa_end = 0x480760ff, + .flags = ADDR_TYPE_RT + }, +}; + +static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2_dma = { + .master = &omap2430_l4_core_hwmod, + .slave = &omap2430_mcbsp2_hwmod, + .clk = "mcbsp2_ick", + .addr = omap2430_mcbsp2_dma_addrs, + .addr_cnt = ARRAY_SIZE(omap2430_mcbsp2_dma_addrs), + .user = OCP_USER_SDMA, +}; + +/* mcbsp2 slave ports */ +static struct omap_hwmod_ocp_if *omap2430_mcbsp2_slaves[] = { + &omap2430_l4_core__mcbsp2, + &omap2430_l4_core__mcbsp2_dma, +}; + +static struct omap_hwmod omap2430_mcbsp2_hwmod = { + .name = "mcbsp2", + .class = &omap2430_mcbsp_hwmod_class, + .mpu_irqs = omap2430_mcbsp2_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_irqs), + .sdma_reqs = omap2430_mcbsp2_sdma_chs, + .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_sdma_chs), + .main_clk = "mcbsp2_fck", + .prcm = { + .omap2 = { + .prcm_reg_id = 1, + .module_bit = OMAP24XX_EN_MCBSP2_SHIFT, + .module_offs = CORE_MOD, + .idlest_reg_id = 1, + .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT, + }, + }, + .slaves = omap2430_mcbsp2_slaves, + .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp2_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), +}; + +/* mcbsp3 */ +static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = { + { .name = "tx", .irq = 89 }, + { .name = "rx", .irq = 90 }, + { .name = "common", .irq = 17 }, +}; + +static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = { + { .name = "rx", .dma_req = 18 }, + { .name = "tx", .dma_req = 17 }, +}; + +static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = { + { + .name = "mpu", + .pa_start = 0x4808C000, + .pa_end = 0x4808C0ff, + .flags = ADDR_TYPE_RT + }, +}; + +/* l4_core -> mcbsp3 */ +static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp3 = { + .master = &omap2430_l4_core_hwmod, + .slave = &omap2430_mcbsp3_hwmod, + .clk = "mcbsp3_ick", + .addr = omap2430_mcbsp3_addrs, + .addr_cnt = ARRAY_SIZE(omap2430_mcbsp3_addrs), + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap2430_mcbsp3_dma_addrs[] = { + { + .name = "dma", + .pa_start = 0x4808C000, + .pa_end = 0x4808C0ff, + .flags = ADDR_TYPE_RT + }, +}; + +static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp3_dma = { + .master = &omap2430_l4_core_hwmod, + .slave = &omap2430_mcbsp3_hwmod, + .clk = "mcbsp3_ick", + .addr = omap2430_mcbsp3_dma_addrs, + .addr_cnt = ARRAY_SIZE(omap2430_mcbsp3_dma_addrs), + .user = OCP_USER_SDMA, +}; + +/* mcbsp3 slave ports */ +static struct omap_hwmod_ocp_if *omap2430_mcbsp3_slaves[] = { + &omap2430_l4_core__mcbsp3, + &omap2430_l4_core__mcbsp3_dma, +}; + +static struct omap_hwmod omap2430_mcbsp3_hwmod = { + .name = "mcbsp3", + .class = &omap2430_mcbsp_hwmod_class, + .mpu_irqs = omap2430_mcbsp3_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_irqs), + .sdma_reqs = omap2430_mcbsp3_sdma_chs, + .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_sdma_chs), + .main_clk = "mcbsp3_fck", + .prcm = { + .omap2 = { + .prcm_reg_id = 1, + .module_bit = OMAP2430_EN_MCBSP3_SHIFT, + .module_offs = CORE_MOD, + .idlest_reg_id = 2, + .idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT, + }, + }, + .slaves = omap2430_mcbsp3_slaves, + .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp3_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), +}; + +/* mcbsp4 */ +static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = { + { .name = "tx", .irq = 54 }, + { .name = "rx", .irq = 55 }, + { .name = "common", .irq = 18 }, +}; + +static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = { + { .name = "rx", .dma_req = 20 }, + { .name = "tx", .dma_req = 19 }, +}; + +static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = { + { + .name = "mpu", + .pa_start = 0x4808E000, + .pa_end = 0x4808E0ff, + .flags = ADDR_TYPE_RT + }, +}; + +/* l4_core -> mcbsp4 */ +static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp4 = { + .master = &omap2430_l4_core_hwmod, + .slave = &omap2430_mcbsp4_hwmod, + .clk = "mcbsp4_ick", + .addr = omap2430_mcbsp4_addrs, + .addr_cnt = ARRAY_SIZE(omap2430_mcbsp4_addrs), + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap2430_mcbsp4_dma_addrs[] = { + { + .name = "dma", + .pa_start = 0x4808E000, + .pa_end = 0x4808E0ff, + .flags = ADDR_TYPE_RT + }, +}; + +static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp4_dma = { + .master = &omap2430_l4_core_hwmod, + .slave = &omap2430_mcbsp4_hwmod, + .clk = "mcbsp4_ick", + .addr = omap2430_mcbsp4_dma_addrs, + .addr_cnt = ARRAY_SIZE(omap2430_mcbsp4_dma_addrs), + .user = OCP_USER_SDMA, +}; + +/* mcbsp4 slave ports */ +static struct omap_hwmod_ocp_if *omap2430_mcbsp4_slaves[] = { + &omap2430_l4_core__mcbsp4, + &omap2430_l4_core__mcbsp4_dma, +}; + +static struct omap_hwmod omap2430_mcbsp4_hwmod = { + .name = "mcbsp4", + .class = &omap2430_mcbsp_hwmod_class, + .mpu_irqs = omap2430_mcbsp4_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_irqs), + .sdma_reqs = omap2430_mcbsp4_sdma_chs, + .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_sdma_chs), + .main_clk = "mcbsp4_fck", + .prcm = { + .omap2 = { + .prcm_reg_id = 1, + .module_bit = OMAP2430_EN_MCBSP4_SHIFT, + .module_offs = CORE_MOD, + .idlest_reg_id = 2, + .idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT, + }, + }, + .slaves = omap2430_mcbsp4_slaves, + .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp4_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), +}; + +/* mcbsp5 */ +static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = { + { .name = "tx", .irq = 81 }, + { .name = "rx", .irq = 82 }, + { .name = "common", .irq = 19 }, +}; + +static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = { + { .name = "rx", .dma_req = 22 }, + { .name = "tx", .dma_req = 21 }, +}; + +static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = { + { + .name = "mpu", + .pa_start = 0x48096000, + .pa_end = 0x480960ff, + .flags = ADDR_TYPE_RT + }, +}; + +/* l4_core -> mcbsp5 */ +static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5 = { + .master = &omap2430_l4_core_hwmod, + .slave = &omap2430_mcbsp5_hwmod, + .clk = "mcbsp5_ick", + .addr = omap2430_mcbsp5_addrs, + .addr_cnt = ARRAY_SIZE(omap2430_mcbsp5_addrs), + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap2430_mcbsp5_dma_addrs[] = { + { + .name = "dma", + .pa_start = 0x48096000, + .pa_end = 0x480960ff, + .flags = ADDR_TYPE_RT + }, +}; + +static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5_dma = { + .master = &omap2430_l4_core_hwmod, + .slave = &omap2430_mcbsp5_hwmod, + .clk = "mcbsp5_ick", + .addr = omap2430_mcbsp5_dma_addrs, + .addr_cnt = ARRAY_SIZE(omap2430_mcbsp5_dma_addrs), + .user = OCP_USER_SDMA, +}; + +/* mcbsp5 slave ports */ +static struct omap_hwmod_ocp_if *omap2430_mcbsp5_slaves[] = { + &omap2430_l4_core__mcbsp5, + &omap2430_l4_core__mcbsp5_dma, +}; + +static struct omap_hwmod omap2430_mcbsp5_hwmod = { + .name = "mcbsp5", + .class = &omap2430_mcbsp_hwmod_class, + .mpu_irqs = omap2430_mcbsp5_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_irqs), + .sdma_reqs = omap2430_mcbsp5_sdma_chs, + .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_sdma_chs), + .main_clk = "mcbsp5_fck", + .prcm = { + .omap2 = { + .prcm_reg_id = 1, + .module_bit = OMAP2430_EN_MCBSP5_SHIFT, + .module_offs = CORE_MOD, + .idlest_reg_id = 2, + .idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT, + }, + }, + .slaves = omap2430_mcbsp5_slaves, + .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp5_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), +}; + static __initdata struct omap_hwmod *omap2430_hwmods[] = { &omap2430_l3_main_hwmod, &omap2430_l4_core_hwmod, @@ -941,6 +1351,13 @@ static __initdata struct omap_hwmod *omap2430_hwmods[] = {
/* dma_system class*/ &omap2430_dma_system_hwmod, + + /*mcbsp class*/ + &omap2430_mcbsp1_hwmod, + &omap2430_mcbsp2_hwmod, + &omap2430_mcbsp3_hwmod, + &omap2430_mcbsp4_hwmod, + &omap2430_mcbsp5_hwmod, NULL, };
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index e9bde6e..e97ab46 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -37,6 +37,8 @@ static struct platform_device omap_mcbsp##port_nr = { \ .id = OMAP_MCBSP##port_nr, \ }
+#define MCBSP_CONFIG_TYPE2 0x2 + #define OMAP7XX_MCBSP1_BASE 0xfffb1000 #define OMAP7XX_MCBSP2_BASE 0xfffb1800
Looks, but:
On 01/31/2011 04:50 PM, ext Kishon Vijay Abraham I wrote:
From: Charulatha V charu@ti.com
Add McBSP hwmod data for OMAP2430.
Added a revision member inorder to facilitate the driver to differentiate between mcbsp in different omap.
Signed-off-by: Charulatha V charu@ti.com Signed-off-by: Kishon Vijay Abraham I kishon@ti.com Signed-off-by: Shubhrajyoti D shubhrajyoti@ti.com
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 417 ++++++++++++++++++++++++++++ arch/arm/plat-omap/include/plat/mcbsp.h | 2 + 2 files changed, 419 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
...
/* dma_system class*/ &omap2430_dma_system_hwmod,
- /*mcbsp class*/
Missing spaces around the comment text
- &omap2430_mcbsp1_hwmod,
- &omap2430_mcbsp2_hwmod,
- &omap2430_mcbsp3_hwmod,
- &omap2430_mcbsp4_hwmod,
- &omap2430_mcbsp5_hwmod, NULL,
};
From: Charulatha V charu@ti.com
Add McBSP hwmod data for OMAP3.
Added a revision member inorder to facilitate the driver to differentiate between mcbsp in different omap.
Signed-off-by: Charulatha V charu@ti.com Signed-off-by: Kishon Vijay Abraham I kishon@ti.com Signed-off-by: Shubhrajyoti D shubhrajyoti@ti.com --- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 534 ++++++++++++++++++++++++++++ arch/arm/plat-omap/include/plat/mcbsp.h | 1 + 2 files changed, 535 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 8d81813..0fb05d5 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -22,6 +22,7 @@ #include <plat/i2c.h> #include <plat/gpio.h> #include <plat/smartreflex.h> +#include <plat/mcbsp.h>
#include "omap_hwmod_common_data.h"
@@ -58,6 +59,14 @@ static struct omap_hwmod omap34xx_sr2_hwmod;
static struct omap_hwmod omap3xxx_dma_system_hwmod;
+static struct omap_hwmod omap3xxx_mcbsp1_hwmod; +static struct omap_hwmod omap3xxx_mcbsp2_hwmod; +static struct omap_hwmod omap3xxx_mcbsp3_hwmod; +static struct omap_hwmod omap3xxx_mcbsp4_hwmod; +static struct omap_hwmod omap3xxx_mcbsp5_hwmod; +static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod; +static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod; + /* L3 -> L4_CORE interface */ static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = { .master = &omap3xxx_l3_main_hwmod, @@ -1227,6 +1236,522 @@ static struct omap_hwmod omap3xxx_dma_system_hwmod = { .flags = HWMOD_NO_IDLEST, };
+/* + * 'mcbsp' class + * multi channel buffered serial port controller + */ + +static struct omap_hwmod_class_sysconfig omap3xxx_mcbsp_sysc = { + .sysc_offs = 0x008c, + .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_ENAWAKEUP | + SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, + .clockact = 0x2, +}; + +static struct omap_hwmod_class omap3xxx_mcbsp_hwmod_class = { + .name = "mcbsp", + .sysc = &omap3xxx_mcbsp_sysc, + .rev = MCBSP_CONFIG_TYPE3, +}; + +/* mcbsp1 */ +static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = { + { .name = "irq", .irq = 16 }, + { .name = "tx", .irq = 59 }, + { .name = "rx", .irq = 60 }, +}; + +static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = { + { .name = "rx", .dma_req = 32 }, + { .name = "tx", .dma_req = 31 }, +}; + +static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = { + { + .name = "mpu", + .pa_start = 0x48074000, + .pa_end = 0x480740ff, + .flags = ADDR_TYPE_RT + }, +}; + +/* l4_core -> mcbsp1 */ +static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp1 = { + .master = &omap3xxx_l4_core_hwmod, + .slave = &omap3xxx_mcbsp1_hwmod, + .clk = "mcbsp1_ick", + .addr = omap3xxx_mcbsp1_addrs, + .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_addrs), + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap3xxx_mcbsp1_dma_addrs[] = { + { + .name = "dma", + .pa_start = 0x48074000, + .pa_end = 0x480740ff, + .flags = ADDR_TYPE_RT + }, +}; + +static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp1_dma = { + .master = &omap3xxx_l4_core_hwmod, + .slave = &omap3xxx_mcbsp1_hwmod, + .clk = "mcbsp1_ick", + .addr = omap3xxx_mcbsp1_dma_addrs, + .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_dma_addrs), + .user = OCP_USER_SDMA, +}; + +/* mcbsp1 slave ports */ +static struct omap_hwmod_ocp_if *omap3xxx_mcbsp1_slaves[] = { + &omap3xxx_l4_core__mcbsp1, + &omap3xxx_l4_core__mcbsp1_dma, +}; + +static struct omap_hwmod omap3xxx_mcbsp1_hwmod = { + .name = "mcbsp1", + .class = &omap3xxx_mcbsp_hwmod_class, + .mpu_irqs = omap3xxx_mcbsp1_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_irqs), + .sdma_reqs = omap3xxx_mcbsp1_sdma_chs, + .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_sdma_chs), + .main_clk = "mcbsp1_fck", + .prcm = { + .omap2 = { + .prcm_reg_id = 1, + .module_bit = OMAP3430_EN_MCBSP1_SHIFT, + .module_offs = CORE_MOD, + .idlest_reg_id = 1, + .idlest_idle_bit = OMAP3430_ST_MCBSP1_SHIFT, + }, + }, + .slaves = omap3xxx_mcbsp1_slaves, + .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +/* mcbsp2 */ +static struct omap_hwmod_irq_info omap3xxx_mcbsp2_irqs[] = { + { .name = "irq", .irq = 17 }, + { .name = "tx", .irq = 62 }, + { .name = "rx", .irq = 63 }, +}; + +static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = { + { .name = "rx", .dma_req = 34 }, + { .name = "tx", .dma_req = 33 }, +}; + +static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = { + { + .name = "mpu", + .pa_start = 0x49022000, + .pa_end = 0x490220ff, + .flags = ADDR_TYPE_RT + }, +}; + +/* l4_per -> mcbsp2 */ +static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2 = { + .master = &omap3xxx_l4_per_hwmod, + .slave = &omap3xxx_mcbsp2_hwmod, + .clk = "mcbsp2_ick", + .addr = omap3xxx_mcbsp2_addrs, + .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_addrs), + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap3xxx_mcbsp2_dma_addrs[] = { + { + .name = "dma", + .pa_start = 0x49022000, + .pa_end = 0x490220ff, + .flags = ADDR_TYPE_RT + }, +}; + +static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2_dma = { + .master = &omap3xxx_l4_per_hwmod, + .slave = &omap3xxx_mcbsp2_hwmod, + .clk = "mcbsp2_ick", + .addr = omap3xxx_mcbsp2_dma_addrs, + .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_dma_addrs), + .user = OCP_USER_SDMA, +}; + +/* mcbsp2 slave ports */ +static struct omap_hwmod_ocp_if *omap3xxx_mcbsp2_slaves[] = { + &omap3xxx_l4_per__mcbsp2, + &omap3xxx_l4_per__mcbsp2_dma, +}; + +static struct omap_hwmod omap3xxx_mcbsp2_hwmod = { + .name = "mcbsp2", + .class = &omap3xxx_mcbsp_hwmod_class, + .mpu_irqs = omap3xxx_mcbsp2_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_irqs), + .sdma_reqs = omap3xxx_mcbsp2_sdma_chs, + .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sdma_chs), + .main_clk = "mcbsp2_fck", + .prcm = { + .omap2 = { + .prcm_reg_id = 1, + .module_bit = OMAP3430_EN_MCBSP2_SHIFT, + .module_offs = OMAP3430_PER_MOD, + .idlest_reg_id = 1, + .idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT, + }, + }, + .slaves = omap3xxx_mcbsp2_slaves, + .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +/* mcbsp3 */ +static struct omap_hwmod_irq_info omap3xxx_mcbsp3_irqs[] = { + { .name = "irq", .irq = 22 }, + { .name = "tx", .irq = 89 }, + { .name = "rx", .irq = 90 }, +}; + +static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = { + { .name = "rx", .dma_req = 18 }, + { .name = "tx", .dma_req = 17 }, +}; + +static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = { + { + .name = "mpu", + .pa_start = 0x49024000, + .pa_end = 0x490240ff, + .flags = ADDR_TYPE_RT + }, +}; + +/* l4_per -> mcbsp3 */ +static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3 = { + .master = &omap3xxx_l4_per_hwmod, + .slave = &omap3xxx_mcbsp3_hwmod, + .clk = "mcbsp3_ick", + .addr = omap3xxx_mcbsp3_addrs, + .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_addrs), + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap3xxx_mcbsp3_dma_addrs[] = { + { + .name = "dma", + .pa_start = 0x49024000, + .pa_end = 0x490240ff, + .flags = ADDR_TYPE_RT + }, +}; + +static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3_dma = { + .master = &omap3xxx_l4_per_hwmod, + .slave = &omap3xxx_mcbsp3_hwmod, + .clk = "mcbsp3_ick", + .addr = omap3xxx_mcbsp3_dma_addrs, + .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_dma_addrs), + .user = OCP_USER_SDMA, +}; + +/* mcbsp3 slave ports */ +static struct omap_hwmod_ocp_if *omap3xxx_mcbsp3_slaves[] = { + &omap3xxx_l4_per__mcbsp3, + &omap3xxx_l4_per__mcbsp3_dma, +}; + +static struct omap_hwmod omap3xxx_mcbsp3_hwmod = { + .name = "mcbsp3", + .class = &omap3xxx_mcbsp_hwmod_class, + .mpu_irqs = omap3xxx_mcbsp3_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_irqs), + .sdma_reqs = omap3xxx_mcbsp3_sdma_chs, + .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sdma_chs), + .main_clk = "mcbsp3_fck", + .prcm = { + .omap2 = { + .prcm_reg_id = 1, + .module_bit = OMAP3430_EN_MCBSP3_SHIFT, + .module_offs = OMAP3430_PER_MOD, + .idlest_reg_id = 1, + .idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT, + }, + }, + .slaves = omap3xxx_mcbsp3_slaves, + .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +/* mcbsp4 */ +static struct omap_hwmod_irq_info omap3xxx_mcbsp4_irqs[] = { + { .name = "irq", .irq = 23 }, + { .name = "tx", .irq = 54 }, + { .name = "rx", .irq = 55 }, +}; + +static struct omap_hwmod_dma_info omap3xxx_mcbsp4_sdma_chs[] = { + { .name = "rx", .dma_req = 20 }, + { .name = "tx", .dma_req = 19 }, +}; + +static struct omap_hwmod_addr_space omap3xxx_mcbsp4_addrs[] = { + { + .name = "mpu", + .pa_start = 0x49026000, + .pa_end = 0x490260ff, + .flags = ADDR_TYPE_RT + }, +}; + +/* l4_per -> mcbsp4 */ +static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp4 = { + .master = &omap3xxx_l4_per_hwmod, + .slave = &omap3xxx_mcbsp4_hwmod, + .clk = "mcbsp4_ick", + .addr = omap3xxx_mcbsp4_addrs, + .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_addrs), + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap3xxx_mcbsp4_dma_addrs[] = { + { + .name = "dma", + .pa_start = 0x49026000, + .pa_end = 0x490260ff, + .flags = ADDR_TYPE_RT + }, +}; + +static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp4_dma = { + .master = &omap3xxx_l4_per_hwmod, + .slave = &omap3xxx_mcbsp4_hwmod, + .clk = "mcbsp4_ick", + .addr = omap3xxx_mcbsp4_dma_addrs, + .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_dma_addrs), + .user = OCP_USER_SDMA, +}; + +/* mcbsp4 slave ports */ +static struct omap_hwmod_ocp_if *omap3xxx_mcbsp4_slaves[] = { + &omap3xxx_l4_per__mcbsp4, + &omap3xxx_l4_per__mcbsp4_dma, +}; + +static struct omap_hwmod omap3xxx_mcbsp4_hwmod = { + .name = "mcbsp4", + .class = &omap3xxx_mcbsp_hwmod_class, + .mpu_irqs = omap3xxx_mcbsp4_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_irqs), + .sdma_reqs = omap3xxx_mcbsp4_sdma_chs, + .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_sdma_chs), + .main_clk = "mcbsp4_fck", + .prcm = { + .omap2 = { + .prcm_reg_id = 1, + .module_bit = OMAP3430_EN_MCBSP4_SHIFT, + .module_offs = OMAP3430_PER_MOD, + .idlest_reg_id = 1, + .idlest_idle_bit = OMAP3430_ST_MCBSP4_SHIFT, + }, + }, + .slaves = omap3xxx_mcbsp4_slaves, + .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +/* mcbsp5 */ +static struct omap_hwmod_irq_info omap3xxx_mcbsp5_irqs[] = { + { .name = "irq", .irq = 27 }, + { .name = "tx", .irq = 81 }, + { .name = "rx", .irq = 82 }, +}; + +static struct omap_hwmod_dma_info omap3xxx_mcbsp5_sdma_chs[] = { + { .name = "rx", .dma_req = 22 }, + { .name = "tx", .dma_req = 21 }, +}; + +static struct omap_hwmod_addr_space omap3xxx_mcbsp5_addrs[] = { + { + .name = "mpu", + .pa_start = 0x48096000, + .pa_end = 0x480960ff, + .flags = ADDR_TYPE_RT + }, +}; + +/* l4_core -> mcbsp5 */ +static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp5 = { + .master = &omap3xxx_l4_core_hwmod, + .slave = &omap3xxx_mcbsp5_hwmod, + .clk = "mcbsp5_ick", + .addr = omap3xxx_mcbsp5_addrs, + .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_addrs), + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap3xxx_mcbsp5_dma_addrs[] = { + { + .name = "dma", + .pa_start = 0x48096000, + .pa_end = 0x480960ff, + .flags = ADDR_TYPE_RT + }, +}; + +static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp5_dma = { + .master = &omap3xxx_l4_core_hwmod, + .slave = &omap3xxx_mcbsp5_hwmod, + .clk = "mcbsp5_ick", + .addr = omap3xxx_mcbsp5_dma_addrs, + .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_dma_addrs), + .user = OCP_USER_SDMA, +}; + +/* mcbsp5 slave ports */ +static struct omap_hwmod_ocp_if *omap3xxx_mcbsp5_slaves[] = { + &omap3xxx_l4_core__mcbsp5, + &omap3xxx_l4_core__mcbsp5_dma, +}; + +static struct omap_hwmod omap3xxx_mcbsp5_hwmod = { + .name = "mcbsp5", + .class = &omap3xxx_mcbsp_hwmod_class, + .mpu_irqs = omap3xxx_mcbsp5_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_irqs), + .sdma_reqs = omap3xxx_mcbsp5_sdma_chs, + .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_sdma_chs), + .main_clk = "mcbsp5_fck", + .prcm = { + .omap2 = { + .prcm_reg_id = 1, + .module_bit = OMAP3430_EN_MCBSP5_SHIFT, + .module_offs = CORE_MOD, + .idlest_reg_id = 1, + .idlest_idle_bit = OMAP3430_ST_MCBSP5_SHIFT, + }, + }, + .slaves = omap3xxx_mcbsp5_slaves, + .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; +/* 'mcbsp sidetone' class */ + +static struct omap_hwmod_class_sysconfig omap3xxx_mcbsp_sidetone_sysc = { + .sysc_offs = 0x0010, + .sysc_flags = SYSC_HAS_AUTOIDLE, + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +static struct omap_hwmod_class omap3xxx_mcbsp_sidetone_hwmod_class = { + .name = "mcbsp_sidetone", + .sysc = &omap3xxx_mcbsp_sidetone_sysc, +}; + +/* mcbsp2_sidetone */ +static struct omap_hwmod_irq_info omap3xxx_mcbsp2_sidetone_irqs[] = { + { .name = "irq", .irq = 4 }, +}; + +static struct omap_hwmod_addr_space omap3xxx_mcbsp2_sidetone_addrs[] = { + { + .name = "sidetone", + .pa_start = 0x49028000, + .pa_end = 0x490280ff, + .flags = ADDR_TYPE_RT + }, +}; + +/* l4_per -> mcbsp2_sidetone */ +static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2_sidetone = { + .master = &omap3xxx_l4_per_hwmod, + .slave = &omap3xxx_mcbsp2_sidetone_hwmod, + .clk = "mcbsp2_ick", + .addr = omap3xxx_mcbsp2_sidetone_addrs, + .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_addrs), + .user = OCP_USER_MPU, +}; + +/* mcbsp2_sidetone slave ports */ +static struct omap_hwmod_ocp_if *omap3xxx_mcbsp2_sidetone_slaves[] = { + &omap3xxx_l4_per__mcbsp2_sidetone, +}; + +static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = { + .name = "mcbsp2_sidetone", + .class = &omap3xxx_mcbsp_sidetone_hwmod_class, + .mpu_irqs = omap3xxx_mcbsp2_sidetone_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_irqs), + .main_clk = "mcbsp2_fck", + .prcm = { + .omap2 = { + .prcm_reg_id = 1, + .module_bit = OMAP3430_EN_MCBSP2_SHIFT, + .module_offs = OMAP3430_PER_MOD, + .idlest_reg_id = 1, + .idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT, + }, + }, + .slaves = omap3xxx_mcbsp2_sidetone_slaves, + .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +/* mcbsp3_sidetone */ +static struct omap_hwmod_irq_info omap3xxx_mcbsp3_sidetone_irqs[] = { + { .name = "irq", .irq = 5 }, +}; + +static struct omap_hwmod_addr_space omap3xxx_mcbsp3_sidetone_addrs[] = { + { + .name = "sidetone", + .pa_start = 0x4902A000, + .pa_end = 0x4902A0ff, + .flags = ADDR_TYPE_RT + }, +}; + +/* l4_per -> mcbsp3_sidetone */ +static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3_sidetone = { + .master = &omap3xxx_l4_per_hwmod, + .slave = &omap3xxx_mcbsp3_sidetone_hwmod, + .clk = "mcbsp3_ick", + .addr = omap3xxx_mcbsp3_sidetone_addrs, + .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_addrs), + .user = OCP_USER_MPU, +}; + +/* mcbsp3_sidetone slave ports */ +static struct omap_hwmod_ocp_if *omap3xxx_mcbsp3_sidetone_slaves[] = { + &omap3xxx_l4_per__mcbsp3_sidetone, +}; + +static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = { + .name = "mcbsp3_sidetone", + .class = &omap3xxx_mcbsp_sidetone_hwmod_class, + .mpu_irqs = omap3xxx_mcbsp3_sidetone_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_irqs), + .main_clk = "mcbsp3_fck", + .prcm = { + .omap2 = { + .prcm_reg_id = 1, + .module_bit = OMAP3430_EN_MCBSP3_SHIFT, + .module_offs = OMAP3430_PER_MOD, + .idlest_reg_id = 1, + .idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT, + }, + }, + .slaves = omap3xxx_mcbsp3_sidetone_slaves, + .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + + /* SR common */ static struct omap_hwmod_sysc_fields omap34xx_sr_sysc_fields = { .clkact_shift = 20, @@ -1387,6 +1912,15 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
/* dma_system class*/ &omap3xxx_dma_system_hwmod, + + /*mcbsp class*/ + &omap3xxx_mcbsp1_hwmod, + &omap3xxx_mcbsp2_hwmod, + &omap3xxx_mcbsp3_hwmod, + &omap3xxx_mcbsp4_hwmod, + &omap3xxx_mcbsp5_hwmod, + &omap3xxx_mcbsp2_sidetone_hwmod, + &omap3xxx_mcbsp3_sidetone_hwmod, NULL, };
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index e97ab46..8d8434b 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -38,6 +38,7 @@ static struct platform_device omap_mcbsp##port_nr = { \ }
#define MCBSP_CONFIG_TYPE2 0x2 +#define MCBSP_CONFIG_TYPE3 0x3
#define OMAP7XX_MCBSP1_BASE 0xfffb1000 #define OMAP7XX_MCBSP2_BASE 0xfffb1800
From: Benoit Cousson b-cousson@ti.com
Added a revision member inorder to facilitate the driver to differentiate between mcbsp in different omap.
Signed-off-by: Benoit Cousson b-cousson@ti.com Signed-off-by: Kishon Vijay Abraham I kishon@ti.com Signed-off-by: Charulatha V charu@ti.com --- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 321 ++++++++++++++++++++++++++++ arch/arm/plat-omap/include/plat/mcbsp.h | 1 + 2 files changed, 322 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index c2806bd..a3860df 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -24,6 +24,7 @@ #include <plat/cpu.h> #include <plat/gpio.h> #include <plat/dma.h> +#include <plat/mcbsp.h>
#include "omap_hwmod_common_data.h"
@@ -1435,6 +1436,320 @@ static struct omap_hwmod omap44xx_iva_hwmod = { };
/* + * 'mcbsp' class + * multi channel buffered serial port controller + */ + +static struct omap_hwmod_class_sysconfig omap44xx_mcbsp_sysc = { + .sysc_offs = 0x008c, + .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_ENAWAKEUP | + SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +static struct omap_hwmod_class omap44xx_mcbsp_hwmod_class = { + .name = "mcbsp", + .sysc = &omap44xx_mcbsp_sysc, + .rev = MCBSP_CONFIG_TYPE4, +}; + +/* mcbsp1 */ +static struct omap_hwmod omap44xx_mcbsp1_hwmod; +static struct omap_hwmod_irq_info omap44xx_mcbsp1_irqs[] = { + { .name = "tx", .irq = 17 + OMAP44XX_IRQ_GIC_START }, + { .name = "rx", .irq = 0 }, +}; + +static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = { + { .name = "tx", .dma_req = 32 + OMAP44XX_DMA_REQ_START }, + { .name = "rx", .dma_req = 33 + OMAP44XX_DMA_REQ_START }, +}; + +static struct omap_hwmod_addr_space omap44xx_mcbsp1_addrs[] = { + { + .name = "mpu", + .pa_start = 0x40122000, + .pa_end = 0x401220ff, + .flags = ADDR_TYPE_RT + }, +}; + +/* l4_abe -> mcbsp1 */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1 = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_mcbsp1_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_mcbsp1_addrs, + .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp1_addrs), + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap44xx_mcbsp1_dma_addrs[] = { + { + .name = "dma", + .pa_start = 0x49022000, + .pa_end = 0x490220ff, + .flags = ADDR_TYPE_RT + }, +}; + +/* l4_abe -> mcbsp1 (dma) */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1_dma = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_mcbsp1_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_mcbsp1_dma_addrs, + .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp1_dma_addrs), + .user = OCP_USER_SDMA, +}; + +/* mcbsp1 slave ports */ +static struct omap_hwmod_ocp_if *omap44xx_mcbsp1_slaves[] = { + &omap44xx_l4_abe__mcbsp1, + &omap44xx_l4_abe__mcbsp1_dma, +}; + +static struct omap_hwmod omap44xx_mcbsp1_hwmod = { + .name = "mcbsp1", + .class = &omap44xx_mcbsp_hwmod_class, + .mpu_irqs = omap44xx_mcbsp1_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_irqs), + .sdma_reqs = omap44xx_mcbsp1_sdma_reqs, + .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_sdma_reqs), + .main_clk = "mcbsp1_fck", + .prcm = { + .omap4 = { + .clkctrl_reg = OMAP4430_CM1_ABE_MCBSP1_CLKCTRL, + }, + }, + .slaves = omap44xx_mcbsp1_slaves, + .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp1_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), +}; + +/* mcbsp2 */ +static struct omap_hwmod omap44xx_mcbsp2_hwmod; +static struct omap_hwmod_irq_info omap44xx_mcbsp2_irqs[] = { + { .name = "tx", .irq = 22 + OMAP44XX_IRQ_GIC_START }, + { .name = "rx", .irq = 0 }, +}; + +static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = { + { .name = "tx", .dma_req = 16 + OMAP44XX_DMA_REQ_START }, + { .name = "rx", .dma_req = 17 + OMAP44XX_DMA_REQ_START }, +}; + +static struct omap_hwmod_addr_space omap44xx_mcbsp2_addrs[] = { + { + .name = "mpu", + .pa_start = 0x40124000, + .pa_end = 0x401240ff, + .flags = ADDR_TYPE_RT + }, +}; + +/* l4_abe -> mcbsp2 */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2 = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_mcbsp2_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_mcbsp2_addrs, + .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp2_addrs), + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap44xx_mcbsp2_dma_addrs[] = { + { + .name = "dma", + .pa_start = 0x49024000, + .pa_end = 0x490240ff, + .flags = ADDR_TYPE_RT + }, +}; + +/* l4_abe -> mcbsp2 (dma) */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2_dma = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_mcbsp2_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_mcbsp2_dma_addrs, + .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp2_dma_addrs), + .user = OCP_USER_SDMA, +}; + +/* mcbsp2 slave ports */ +static struct omap_hwmod_ocp_if *omap44xx_mcbsp2_slaves[] = { + &omap44xx_l4_abe__mcbsp2, + &omap44xx_l4_abe__mcbsp2_dma, +}; + +static struct omap_hwmod omap44xx_mcbsp2_hwmod = { + .name = "mcbsp2", + .class = &omap44xx_mcbsp_hwmod_class, + .mpu_irqs = omap44xx_mcbsp2_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_irqs), + .sdma_reqs = omap44xx_mcbsp2_sdma_reqs, + .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_sdma_reqs), + .main_clk = "mcbsp2_fck", + .prcm = { + .omap4 = { + .clkctrl_reg = OMAP4430_CM1_ABE_MCBSP2_CLKCTRL, + }, + }, + .slaves = omap44xx_mcbsp2_slaves, + .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp2_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), +}; + +/* mcbsp3 */ +static struct omap_hwmod omap44xx_mcbsp3_hwmod; +static struct omap_hwmod_irq_info omap44xx_mcbsp3_irqs[] = { + { .name = "tx", .irq = 23 + OMAP44XX_IRQ_GIC_START }, + { .name = "rx", .irq = 0 }, +}; + +static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = { + { .name = "tx", .dma_req = 18 + OMAP44XX_DMA_REQ_START }, + { .name = "rx", .dma_req = 19 + OMAP44XX_DMA_REQ_START }, +}; + +static struct omap_hwmod_addr_space omap44xx_mcbsp3_addrs[] = { + { + .name = "mpu", + .pa_start = 0x40126000, + .pa_end = 0x401260ff, + .flags = ADDR_TYPE_RT + }, +}; + +/* l4_abe -> mcbsp3 */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3 = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_mcbsp3_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_mcbsp3_addrs, + .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp3_addrs), + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap44xx_mcbsp3_dma_addrs[] = { + { + .name = "dma", + .pa_start = 0x49026000, + .pa_end = 0x490260ff, + .flags = ADDR_TYPE_RT + }, +}; + +/* l4_abe -> mcbsp3 (dma) */ +static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3_dma = { + .master = &omap44xx_l4_abe_hwmod, + .slave = &omap44xx_mcbsp3_hwmod, + .clk = "ocp_abe_iclk", + .addr = omap44xx_mcbsp3_dma_addrs, + .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp3_dma_addrs), + .user = OCP_USER_SDMA, +}; + +/* mcbsp3 slave ports */ +static struct omap_hwmod_ocp_if *omap44xx_mcbsp3_slaves[] = { + &omap44xx_l4_abe__mcbsp3, + &omap44xx_l4_abe__mcbsp3_dma, +}; + +static struct omap_hwmod omap44xx_mcbsp3_hwmod = { + .name = "mcbsp3", + .class = &omap44xx_mcbsp_hwmod_class, + .mpu_irqs = omap44xx_mcbsp3_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_irqs), + .sdma_reqs = omap44xx_mcbsp3_sdma_reqs, + .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_sdma_reqs), + .main_clk = "mcbsp3_fck", + .prcm = { + .omap4 = { + .clkctrl_reg = OMAP4430_CM1_ABE_MCBSP3_CLKCTRL, + }, + }, + .slaves = omap44xx_mcbsp3_slaves, + .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp3_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), +}; + +/* mcbsp4 */ +static struct omap_hwmod omap44xx_mcbsp4_hwmod; +static struct omap_hwmod_irq_info omap44xx_mcbsp4_irqs[] = { + { .name = "tx", .irq = 16 + OMAP44XX_IRQ_GIC_START }, + { .name = "rx", .irq = 0 }, +}; + +static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = { + { .name = "tx", .dma_req = 30 + OMAP44XX_DMA_REQ_START }, + { .name = "rx", .dma_req = 31 + OMAP44XX_DMA_REQ_START }, +}; + +static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = { + { + .name = "mpu", + .pa_start = 0x48096000, + .pa_end = 0x480960ff, + .flags = ADDR_TYPE_RT + }, +}; + +/* l4_per -> mcbsp4 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__mcbsp4 = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_mcbsp4_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_mcbsp4_addrs, + .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp4_addrs), + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod_addr_space omap44xx_mcbsp4_dma_addrs[] = { + { + .name = "dma", + .pa_start = 0x48096000, + .pa_end = 0x480960ff, + .flags = ADDR_TYPE_RT + }, +}; + +static struct omap_hwmod_ocp_if omap44xx_l4_per__mcbsp4_dma = { + .master = &omap44xx_l4_per_hwmod, + .slave = &omap44xx_mcbsp4_hwmod, + .clk = "l4_div_ck", + .addr = omap44xx_mcbsp4_dma_addrs, + .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp4_dma_addrs), + .user = OCP_USER_SDMA, +}; + +/* mcbsp4 slave ports */ +static struct omap_hwmod_ocp_if *omap44xx_mcbsp4_slaves[] = { + &omap44xx_l4_per__mcbsp4, + &omap44xx_l4_per__mcbsp4_dma, +}; + +static struct omap_hwmod omap44xx_mcbsp4_hwmod = { + .name = "mcbsp4", + .class = &omap44xx_mcbsp_hwmod_class, + .mpu_irqs = omap44xx_mcbsp4_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_irqs), + .sdma_reqs = omap44xx_mcbsp4_sdma_reqs, + .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_sdma_reqs), + .main_clk = "mcbsp4_fck", + .prcm = { + .omap4 = { + .clkctrl_reg = OMAP4430_CM_L4PER_MCBSP4_CLKCTRL, + }, + }, + .slaves = omap44xx_mcbsp4_slaves, + .slaves_cnt = ARRAY_SIZE(omap44xx_mcbsp4_slaves), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), +}; + +/* * 'mpu' class * mpu sub-system */ @@ -2050,6 +2365,12 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = { &omap44xx_iva_seq0_hwmod, &omap44xx_iva_seq1_hwmod,
+ /* mcbsp class */ + &omap44xx_mcbsp1_hwmod, + &omap44xx_mcbsp2_hwmod, + &omap44xx_mcbsp3_hwmod, + &omap44xx_mcbsp4_hwmod, + /* mpu class */ &omap44xx_mpu_hwmod,
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 8d8434b..06bd1dc 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -39,6 +39,7 @@ static struct platform_device omap_mcbsp##port_nr = { \
#define MCBSP_CONFIG_TYPE2 0x2 #define MCBSP_CONFIG_TYPE3 0x3 +#define MCBSP_CONFIG_TYPE4 0x4
#define OMAP7XX_MCBSP1_BASE 0xfffb1000 #define OMAP7XX_MCBSP2_BASE 0xfffb1800
Hi Kishon,
I found a couple of weird stuff in this patch that does not look good to me and that must be fixed before merging that code.
On 1/31/2011 3:50 PM, ABRAHAM, KISHON VIJAY wrote:
From: Benoit Coussonb-cousson@ti.com
Added a revision member inorder to facilitate the driver to differentiate between mcbsp in different omap.
Signed-off-by: Benoit Coussonb-cousson@ti.com Signed-off-by: Kishon Vijay Abraham Ikishon@ti.com Signed-off-by: Charulatha Vcharu@ti.com
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 321 ++++++++++++++++++++++++++++ arch/arm/plat-omap/include/plat/mcbsp.h | 1 + 2 files changed, 322 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index c2806bd..a3860df 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -24,6 +24,7 @@ #include<plat/cpu.h> #include<plat/gpio.h> #include<plat/dma.h> +#include<plat/mcbsp.h>
#include "omap_hwmod_common_data.h"
@@ -1435,6 +1436,320 @@ static struct omap_hwmod omap44xx_iva_hwmod = { };
/*
- 'mcbsp' class
- multi channel buffered serial port controller
- */
+static struct omap_hwmod_class_sysconfig omap44xx_mcbsp_sysc = {
- .sysc_offs = 0x008c,
- .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_ENAWAKEUP |
SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
- .sysc_fields =&omap_hwmod_sysc_type1,
+};
+static struct omap_hwmod_class omap44xx_mcbsp_hwmod_class = {
- .name = "mcbsp",
- .sysc =&omap44xx_mcbsp_sysc,
- .rev = MCBSP_CONFIG_TYPE4,
+};
+/* mcbsp1 */ +static struct omap_hwmod omap44xx_mcbsp1_hwmod; +static struct omap_hwmod_irq_info omap44xx_mcbsp1_irqs[] = {
- { .name = "tx", .irq = 17 + OMAP44XX_IRQ_GIC_START },
- { .name = "rx", .irq = 0 },
You should not do that! This is not even true. There is no more tx/rx lines in the HW anymore, so you should not try to emulate that in hwmod. You should adapt your driver to handle the unique IRQ line, since this is the standard since OMAP3430. These tx/rx lines were present but already mark as deprecated on OMAP3. They are now removed on OMAP4 & OMAP5.
[...]
+/* mcbsp4 */ +static struct omap_hwmod omap44xx_mcbsp4_hwmod; +static struct omap_hwmod_irq_info omap44xx_mcbsp4_irqs[] = {
- { .name = "tx", .irq = 16 + OMAP44XX_IRQ_GIC_START },
- { .name = "rx", .irq = 0 },
+};
+static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = {
- { .name = "tx", .dma_req = 30 + OMAP44XX_DMA_REQ_START },
- { .name = "rx", .dma_req = 31 + OMAP44XX_DMA_REQ_START },
+};
+static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = {
- {
.name = "mpu",
This is not needed in this case.
.pa_start = 0x48096000,.pa_end = 0x480960ff,.flags = ADDR_TYPE_RT- },
+};
+/* l4_per -> mcbsp4 */ +static struct omap_hwmod_ocp_if omap44xx_l4_per__mcbsp4 = {
- .master =&omap44xx_l4_per_hwmod,
- .slave =&omap44xx_mcbsp4_hwmod,
- .clk = "l4_div_ck",
- .addr = omap44xx_mcbsp4_addrs,
- .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp4_addrs),
- .user = OCP_USER_MPU,
+};
+static struct omap_hwmod_addr_space omap44xx_mcbsp4_dma_addrs[] = {
- {
.name = "dma",.pa_start = 0x48096000,.pa_end = 0x480960ff,.flags = ADDR_TYPE_RT
You should not do that. This is a duplication of the previous entry. In general, you should not hack the hwmod data, which is a representation of the HW, to fit you specific driver needs. You should request memory using name and if it failed you need to use the regular platform_get_resource method. This is not ideal, but this is the best we can do with the current platform_get_XXX API.
Please find below the modified version of this patch rebased on top of the spinlock + mcspi series to avoid merge conflict.
Regards, Benoit
---
Since the sidetone block is tightly coupled to the mcbsp, sidetone information is directly added to mcbsp2 & 3 hwmod dev_attr.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com Signed-off-by: Benoit Cousson b-cousson@ti.com --- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 10 ++++++++++ arch/arm/plat-omap/include/plat/mcbsp.h | 9 +++++++++ 2 files changed, 19 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 0fb05d5..7c50609 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1388,6 +1388,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_mcbsp2_slaves[] = { &omap3xxx_l4_per__mcbsp2_dma, };
+static struct omap_mcbsp_dev_attr omap34xx_mcbsp2_dev_attr = { + .sidetone = "mcbsp2_sidetone", +}; + static struct omap_hwmod omap3xxx_mcbsp2_hwmod = { .name = "mcbsp2", .class = &omap3xxx_mcbsp_hwmod_class, @@ -1407,6 +1411,7 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = { }, .slaves = omap3xxx_mcbsp2_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_slaves), + .dev_attr = &omap34xx_mcbsp2_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), };
@@ -1465,6 +1470,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_mcbsp3_slaves[] = { &omap3xxx_l4_per__mcbsp3_dma, };
+static struct omap_mcbsp_dev_attr omap34xx_mcbsp3_dev_attr = { + .sidetone = "mcbsp3_sidetone", +}; + static struct omap_hwmod omap3xxx_mcbsp3_hwmod = { .name = "mcbsp3", .class = &omap3xxx_mcbsp_hwmod_class, @@ -1484,6 +1493,7 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = { }, .slaves = omap3xxx_mcbsp3_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_slaves), + .dev_attr = &omap34xx_mcbsp3_dev_attr, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), };
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 06bd1dc..27bfb1d 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -489,6 +489,15 @@ struct omap_mcbsp { #endif void *reg_cache; }; + +/** + * omap_mcbsp_dev_attr - OMAP MCBSP device attributes for omap_hwmod + * @sidetone: name of the sidetone device + */ +struct omap_mcbsp_dev_attr { + const char *sidetone; +}; + extern struct omap_mcbsp **mcbsp_ptr; extern int omap_mcbsp_count, omap_mcbsp_cache_size;
Modify OMAP2+ McBSP to use omap hwmod framework APIs
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com Signed-off-by: Charulatha V charu@ti.com Signed-off-by: Shubhrajyoti D shubhrajyoti@ti.com --- arch/arm/mach-omap2/mcbsp.c | 685 +++---------------------------------------- 1 files changed, 43 insertions(+), 642 deletions(-)
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index bc004be..7d0fe2b 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -22,10 +22,10 @@ #include <plat/dma.h> #include <plat/cpu.h> #include <plat/mcbsp.h> +#include <plat/omap_device.h>
#include "control.h"
- /* McBSP internal signal muxing functions */
void omap2_mcbsp1_mux_clkr_src(u8 mux) @@ -101,664 +101,65 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id) } EXPORT_SYMBOL(omap2_mcbsp_set_clks_src);
- -/* Platform data */ - -#ifdef CONFIG_SOC_OMAP2420 -struct resource omap2420_mcbsp_res[][6] = { - { - { - .name = "mpu", - .start = OMAP24XX_MCBSP1_BASE, - .end = OMAP24XX_MCBSP1_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "dma", - .start = OMAP24XX_MCBSP1_BASE, - .end = OMAP24XX_MCBSP1_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_24XX_MCBSP1_IRQ_RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_24XX_MCBSP1_IRQ_TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP24XX_DMA_MCBSP1_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP24XX_DMA_MCBSP1_TX, - .flags = IORESOURCE_DMA, - }, - }, +struct omap_device_pm_latency omap2_mcbsp_latency[] = { { - { - .name = "mpu", - .start = OMAP24XX_MCBSP2_BASE, - .end = OMAP24XX_MCBSP2_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "dma", - .start = OMAP24XX_MCBSP2_BASE, - .end = OMAP24XX_MCBSP2_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_24XX_MCBSP2_IRQ_RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_24XX_MCBSP2_IRQ_TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP24XX_DMA_MCBSP2_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP24XX_DMA_MCBSP2_TX, - .flags = IORESOURCE_DMA, - }, + .deactivate_func = omap_device_idle_hwmods, + .activate_func = omap_device_enable_hwmods, + .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, }, }; -#define OMAP2420_MCBSP_RES_SZ ARRAY_SIZE(omap2420_mcbsp_res[1]) -#define OMAP2420_MCBSP_COUNT ARRAY_SIZE(omap2420_mcbsp_res) -#else -#define omap2420_mcbsp_res NULL -#define OMAP2420_MCBSP_RES_SZ 0 -#define OMAP2420_MCBSP_COUNT 0 -#endif +static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) +{ + int id, count = 1; + char *name = "omap-mcbsp"; + struct omap_hwmod *oh_device[2]; + struct omap_mcbsp_platform_data *pdata = NULL; + struct omap_device *od;
-#define omap2420_mcbsp_pdata NULL + sscanf(oh->name, "mcbsp%d", &id);
-#ifdef CONFIG_SOC_OMAP2430 -struct resource omap2430_mcbsp_res[][6] = { - { - { - .name = "mpu", - .start = OMAP24XX_MCBSP1_BASE, - .end = OMAP24XX_MCBSP1_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "dma", - .start = OMAP24XX_MCBSP1_BASE, - .end = OMAP24XX_MCBSP1_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_24XX_MCBSP1_IRQ_RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_24XX_MCBSP1_IRQ_TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP24XX_DMA_MCBSP1_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP24XX_DMA_MCBSP1_TX, - .flags = IORESOURCE_DMA, - }, - }, - { - { - .name = "mpu", - .start = OMAP24XX_MCBSP2_BASE, - .end = OMAP24XX_MCBSP2_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "dma", - .start = OMAP24XX_MCBSP2_BASE, - .end = OMAP24XX_MCBSP2_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_24XX_MCBSP2_IRQ_RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_24XX_MCBSP2_IRQ_TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP24XX_DMA_MCBSP2_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP24XX_DMA_MCBSP2_TX, - .flags = IORESOURCE_DMA, - }, - }, - { - { - .name = "mpu", - .start = OMAP2430_MCBSP3_BASE, - .end = OMAP2430_MCBSP3_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "dma", - .start = OMAP2430_MCBSP3_BASE, - .end = OMAP2430_MCBSP3_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_24XX_MCBSP3_IRQ_RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_24XX_MCBSP3_IRQ_TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP24XX_DMA_MCBSP3_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP24XX_DMA_MCBSP3_TX, - .flags = IORESOURCE_DMA, - }, - }, - { - { - .name = "mpu", - .start = OMAP2430_MCBSP4_BASE, - .end = OMAP2430_MCBSP4_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "dma", - .start = OMAP2430_MCBSP4_BASE, - .end = OMAP2430_MCBSP4_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_24XX_MCBSP4_IRQ_RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_24XX_MCBSP4_IRQ_TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP24XX_DMA_MCBSP4_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP24XX_DMA_MCBSP4_TX, - .flags = IORESOURCE_DMA, - }, - }, - { - { - .name = "mpu", - .start = OMAP2430_MCBSP5_BASE, - .end = OMAP2430_MCBSP5_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "dma", - .start = OMAP2430_MCBSP5_BASE, - .end = OMAP2430_MCBSP5_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_24XX_MCBSP5_IRQ_RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_24XX_MCBSP5_IRQ_TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP24XX_DMA_MCBSP5_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP24XX_DMA_MCBSP5_TX, - .flags = IORESOURCE_DMA, - }, - }, -}; -#define OMAP2430_MCBSP_RES_SZ ARRAY_SIZE(omap2430_mcbsp_res[1]) -#define OMAP2430_MCBSP_COUNT ARRAY_SIZE(omap2430_mcbsp_res) -#else -#define omap2430_mcbsp_res NULL -#define OMAP2430_MCBSP_RES_SZ 0 -#define OMAP2430_MCBSP_COUNT 0 -#endif - -#define omap2430_mcbsp_pdata NULL + pdata = kzalloc(sizeof(struct omap_mcbsp_platform_data), GFP_KERNEL); + if (!pdata) { + pr_err("%s: No memory for mcbsp\n", __func__); + return -ENOMEM; + }
-#ifdef CONFIG_ARCH_OMAP3 -struct resource omap34xx_mcbsp_res[][7] = { - { - { - .name = "mpu", - .start = OMAP34XX_MCBSP1_BASE, - .end = OMAP34XX_MCBSP1_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "dma", - .start = OMAP34XX_MCBSP1_BASE, - .end = OMAP34XX_MCBSP1_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_24XX_MCBSP1_IRQ_RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_24XX_MCBSP1_IRQ_TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP24XX_DMA_MCBSP1_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP24XX_DMA_MCBSP1_TX, - .flags = IORESOURCE_DMA, - }, - }, - { - { - .name = "mpu", - .start = OMAP34XX_MCBSP2_BASE, - .end = OMAP34XX_MCBSP2_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "dma", - .start = OMAP34XX_MCBSP2_BASE, - .end = OMAP34XX_MCBSP2_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "sidetone", - .start = OMAP34XX_MCBSP2_ST_BASE, - .end = OMAP34XX_MCBSP2_ST_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_24XX_MCBSP2_IRQ_RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_24XX_MCBSP2_IRQ_TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP24XX_DMA_MCBSP2_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP24XX_DMA_MCBSP2_TX, - .flags = IORESOURCE_DMA, - }, - }, - { - { - .name = "mpu", - .start = OMAP34XX_MCBSP3_BASE, - .end = OMAP34XX_MCBSP3_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "dma", - .start = OMAP34XX_MCBSP3_BASE, - .end = OMAP34XX_MCBSP3_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "sidetone", - .start = OMAP34XX_MCBSP3_ST_BASE, - .end = OMAP34XX_MCBSP3_ST_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_24XX_MCBSP3_IRQ_RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_24XX_MCBSP3_IRQ_TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP24XX_DMA_MCBSP3_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP24XX_DMA_MCBSP3_TX, - .flags = IORESOURCE_DMA, - }, - }, - { - { - .name = "mpu", - .start = OMAP34XX_MCBSP4_BASE, - .end = OMAP34XX_MCBSP4_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "dma", - .start = OMAP34XX_MCBSP4_BASE, - .end = OMAP34XX_MCBSP4_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_24XX_MCBSP4_IRQ_RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_24XX_MCBSP4_IRQ_TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP24XX_DMA_MCBSP4_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP24XX_DMA_MCBSP4_TX, - .flags = IORESOURCE_DMA, - }, - }, - { - { - .name = "mpu", - .start = OMAP34XX_MCBSP5_BASE, - .end = OMAP34XX_MCBSP5_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "dma", - .start = OMAP34XX_MCBSP5_BASE, - .end = OMAP34XX_MCBSP5_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = INT_24XX_MCBSP5_IRQ_RX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = INT_24XX_MCBSP5_IRQ_TX, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP24XX_DMA_MCBSP5_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP24XX_DMA_MCBSP5_TX, - .flags = IORESOURCE_DMA, - }, - }, -}; + if (oh->class->rev == MCBSP_CONFIG_TYPE3) { + if (id == 2) + pdata->buffer_size = 0x500; /*FIFO size is 1024 + 256*/ + else + pdata->buffer_size = 0x80; /*FIFO size is 128*/ + }
-static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { - { - .buffer_size = 0x80, /* The FIFO has 128 locations */ - }, - { - .buffer_size = 0x500, /* The FIFO has 1024 + 256 locations */ - }, - { - .buffer_size = 0x80, /* The FIFO has 128 locations */ - }, - { - .buffer_size = 0x80, /* The FIFO has 128 locations */ - }, - { - .buffer_size = 0x80, /* The FIFO has 128 locations */ - }, -}; -#define OMAP34XX_MCBSP_RES_SZ ARRAY_SIZE(omap34xx_mcbsp_res[1]) -#define OMAP34XX_MCBSP_COUNT ARRAY_SIZE(omap34xx_mcbsp_res) -#else -#define omap34xx_mcbsp_pdata NULL -#define omap34XX_mcbsp_res NULL -#define OMAP34XX_MCBSP_RES_SZ 0 -#define OMAP34XX_MCBSP_COUNT 0 -#endif + oh_device[0] = oh;
-struct resource omap44xx_mcbsp_res[][6] = { - { - { - .name = "mpu", - .start = OMAP44XX_MCBSP1_BASE, - .end = OMAP44XX_MCBSP1_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "dma", - .start = OMAP44XX_MCBSP1_DMA_BASE, - .end = OMAP44XX_MCBSP1_DMA_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = 0, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = OMAP44XX_IRQ_MCBSP1, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP44XX_DMA_MCBSP1_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP44XX_DMA_MCBSP1_TX, - .flags = IORESOURCE_DMA, - }, - }, - { - { - .name = "mpu", - .start = OMAP44XX_MCBSP2_BASE, - .end = OMAP44XX_MCBSP2_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "dma", - .start = OMAP44XX_MCBSP2_DMA_BASE, - .end = OMAP44XX_MCBSP2_DMA_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = 0, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = OMAP44XX_IRQ_MCBSP2, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP44XX_DMA_MCBSP2_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP44XX_DMA_MCBSP2_TX, - .flags = IORESOURCE_DMA, - }, - }, - { - { - .name = "mpu", - .start = OMAP44XX_MCBSP3_BASE, - .end = OMAP44XX_MCBSP3_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "dma", - .start = OMAP44XX_MCBSP3_DMA_BASE, - .end = OMAP44XX_MCBSP3_DMA_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = 0, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = OMAP44XX_IRQ_MCBSP3, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP44XX_DMA_MCBSP3_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP44XX_DMA_MCBSP3_TX, - .flags = IORESOURCE_DMA, - }, - }, - { - { - .name = "mpu", - .start = OMAP44XX_MCBSP4_BASE, - .end = OMAP44XX_MCBSP4_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "dma", - .start = OMAP44XX_MCBSP4_BASE, - .end = OMAP44XX_MCBSP4_BASE + SZ_256, - .flags = IORESOURCE_MEM, - }, - { - .name = "rx", - .start = 0, - .flags = IORESOURCE_IRQ, - }, - { - .name = "tx", - .start = OMAP44XX_IRQ_MCBSP4, - .flags = IORESOURCE_IRQ, - }, - { - .name = "rx", - .start = OMAP44XX_DMA_MCBSP4_RX, - .flags = IORESOURCE_DMA, - }, - { - .name = "tx", - .start = OMAP44XX_DMA_MCBSP4_TX, - .flags = IORESOURCE_DMA, - }, - }, -}; -#define omap44xx_mcbsp_pdata NULL -#define OMAP44XX_MCBSP_RES_SZ ARRAY_SIZE(omap44xx_mcbsp_res[1]) -#define OMAP44XX_MCBSP_COUNT ARRAY_SIZE(omap44xx_mcbsp_res) + if (oh->dev_attr) { + oh_device[1] = omap_hwmod_lookup(( + (struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone); + count++; + } + od = omap_device_build_ss(name, id, oh_device, count, pdata, + sizeof(*pdata), omap2_mcbsp_latency, + ARRAY_SIZE(omap2_mcbsp_latency), false); + kfree(pdata); + if (IS_ERR(od)) { + pr_err("%s: Cant build omap_device for %s:%s.\n", __func__, + name, oh->name); + return PTR_ERR(od); + } + omap_mcbsp_count++; + return 0; +}
static int __init omap2_mcbsp_init(void) { - if (cpu_is_omap2420()) - omap_mcbsp_count = OMAP2420_MCBSP_COUNT; - else if (cpu_is_omap2430()) - omap_mcbsp_count = OMAP2430_MCBSP_COUNT; - else if (cpu_is_omap34xx()) - omap_mcbsp_count = OMAP34XX_MCBSP_COUNT; - else if (cpu_is_omap44xx()) - omap_mcbsp_count = OMAP44XX_MCBSP_COUNT; + omap_hwmod_for_each_by_class("mcbsp", omap_init_mcbsp, NULL);
mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *), GFP_KERNEL); if (!mcbsp_ptr) return -ENOMEM;
- if (cpu_is_omap2420()) - omap_mcbsp_register_board_cfg(omap2420_mcbsp_res[0], - OMAP2420_MCBSP_RES_SZ, - omap2420_mcbsp_pdata, - OMAP2420_MCBSP_COUNT); - if (cpu_is_omap2430()) - omap_mcbsp_register_board_cfg(omap2430_mcbsp_res[0], - OMAP2420_MCBSP_RES_SZ, - omap2430_mcbsp_pdata, - OMAP2430_MCBSP_COUNT); - if (cpu_is_omap34xx()) - omap_mcbsp_register_board_cfg(omap34xx_mcbsp_res[0], - OMAP34XX_MCBSP_RES_SZ, - omap34xx_mcbsp_pdata, - OMAP34XX_MCBSP_COUNT); - if (cpu_is_omap44xx()) - omap_mcbsp_register_board_cfg(omap44xx_mcbsp_res[0], - OMAP44XX_MCBSP_RES_SZ, - omap44xx_mcbsp_pdata, - OMAP44XX_MCBSP_COUNT); - return omap_mcbsp_init(); } arch_initcall(omap2_mcbsp_init);
Looks good, but...
On 01/31/2011 04:50 PM, ext Kishon Vijay Abraham I wrote:
Modify OMAP2+ McBSP to use omap hwmod framework APIs
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com Signed-off-by: Charulatha V charu@ti.com Signed-off-by: Shubhrajyoti D shubhrajyoti@ti.com
arch/arm/mach-omap2/mcbsp.c | 685 +++---------------------------------------- 1 files changed, 43 insertions(+), 642 deletions(-)
...
- if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
if (id == 2)pdata->buffer_size = 0x500; /*FIFO size is 1024 + 256*/elsepdata->buffer_size = 0x80; /*FIFO size is 128*/- }
I would add spaces around these comments (after /* and before */).
On Tue, 01 Feb 2011 14:22:49 +0200 Peter Ujfalusi peter.ujfalusi@nokia.com wrote:
Looks good, but...
- if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
if (id == 2)pdata->buffer_size = 0x500; /*FIFO size is 1024 + 256*/elsepdata->buffer_size = 0x80; /*FIFO size is 128*/- }
I would add spaces around these comments (after /* and before */).
Actually this part of code doesn't compile for CONFIG_ARCH_OMAP2 if CONFIG_ARCH_OMAP3 is not set. Reason is that the buffer_size in under CONFIG_ARCH_OMAP3 compilation in struct omap_mcbsp_platform_data definition.
I think it's easiest if this patch just removes that conditional compilation from struct omap_mcbsp_platform_data as it really doesn't save that much from non !OMAP3 builds.
On Tue, Feb 1, 2011 at 11:14 PM, Jarkko Nikula jhnikula@gmail.com wrote:
On Tue, 01 Feb 2011 14:22:49 +0200 Peter Ujfalusi peter.ujfalusi@nokia.com wrote:
Looks good, but...
- if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
- if (id == 2)
- pdata->buffer_size = 0x500; /*FIFO size is 1024 + 256*/
- else
- pdata->buffer_size = 0x80; /*FIFO size is 128*/
- }
I would add spaces around these comments (after /* and before */).
Actually this part of code doesn't compile for CONFIG_ARCH_OMAP2 if CONFIG_ARCH_OMAP3 is not set. Reason is that the buffer_size in under CONFIG_ARCH_OMAP3 compilation in struct omap_mcbsp_platform_data definition.
I think it's easiest if this patch just removes that conditional compilation from struct omap_mcbsp_platform_data as it really doesn't save that much from non !OMAP3 builds.
Thanks. Will fix it in the next version.
-- Jarkko
* ABRAHAM, KISHON VIJAY kishon@ti.com [110201 22:22]:
On Tue, Feb 1, 2011 at 11:14 PM, Jarkko Nikula jhnikula@gmail.com wrote:
On Tue, 01 Feb 2011 14:22:49 +0200 Peter Ujfalusi peter.ujfalusi@nokia.com wrote:
Looks good, but...
- if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
- if (id == 2)
- pdata->buffer_size = 0x500; /*FIFO size is 1024 + 256*/
- else
- pdata->buffer_size = 0x80; /*FIFO size is 128*/
- }
I would add spaces around these comments (after /* and before */).
Actually this part of code doesn't compile for CONFIG_ARCH_OMAP2 if CONFIG_ARCH_OMAP3 is not set. Reason is that the buffer_size in under CONFIG_ARCH_OMAP3 compilation in struct omap_mcbsp_platform_data definition.
I think it's easiest if this patch just removes that conditional compilation from struct omap_mcbsp_platform_data as it really doesn't save that much from non !OMAP3 builds.
Thanks. Will fix it in the next version.
Any news on updating this series?
Note that you can now leave out the omap4 hwmod data as that has been merged to omap-for-linus.
Regards,
Tony
On Thu, 17 Feb 2011 15:41:40 -0800 Tony Lindgren tony@atomide.com wrote:
Actually this part of code doesn't compile for CONFIG_ARCH_OMAP2 if CONFIG_ARCH_OMAP3 is not set. Reason is that the buffer_size in under CONFIG_ARCH_OMAP3 compilation in struct omap_mcbsp_platform_data definition.
I think it's easiest if this patch just removes that conditional compilation from struct omap_mcbsp_platform_data as it really doesn't save that much from non !OMAP3 builds.
Thanks. Will fix it in the next version.
Any news on updating this series?
Note that you can now leave out the omap4 hwmod data as that has been merged to omap-for-linus.
My impression from last round was that there is not that many changes required. Of course there must not have bisect issues like above, should not break OMAP1 (which I think was addressed already) but otherwise I think most of the issues were small.
Kevin had concerns about PM testing but I would not put that much emphasis on that since the set should not make things any worse but should make possible to go forward with PM.
Hi,
I'll send patch series in a short while.
-Kishon
On Fri, Feb 18, 2011 at 1:38 PM, Jarkko Nikula jhnikula@gmail.com wrote:
On Thu, 17 Feb 2011 15:41:40 -0800 Tony Lindgren tony@atomide.com wrote:
Actually this part of code doesn't compile for CONFIG_ARCH_OMAP2 if CONFIG_ARCH_OMAP3 is not set. Reason is that the buffer_size in under CONFIG_ARCH_OMAP3 compilation in struct omap_mcbsp_platform_data definition.
I think it's easiest if this patch just removes that conditional compilation from struct omap_mcbsp_platform_data as it really doesn't save that much from non !OMAP3 builds.
Thanks. Will fix it in the next version.
Any news on updating this series?
Note that you can now leave out the omap4 hwmod data as that has been merged to omap-for-linus.
My impression from last round was that there is not that many changes required. Of course there must not have bisect issues like above, should not break OMAP1 (which I think was addressed already) but otherwise I think most of the issues were small.
Kevin had concerns about PM testing but I would not put that much emphasis on that since the set should not make things any worse but should make possible to go forward with PM.
-- Jarkko
McBSP2/3 in OMAP3 has sidetone feature which requires autoidle to be disabled before starting the sidetone. Also SYSCONFIG register has to be set with smart idle or no idle depending on the dma op mode (threshold or element sync). For doing these operations dynamically at runtime, omap_device APIs are used to modify SYSCONFIG register.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- arch/arm/plat-omap/mcbsp.c | 66 +++++++++++++++++++++++-------------------- 1 files changed, 35 insertions(+), 31 deletions(-)
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 275a37a..9bc2c73 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -27,6 +27,7 @@
#include <plat/dma.h> #include <plat/mcbsp.h> +#include <plat/omap_device.h>
/* XXX These "sideways" includes are a sign that something is wrong */ #include "../mach-omap2/cm2xxx_3xxx.h" @@ -228,9 +229,19 @@ void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config) EXPORT_SYMBOL(omap_mcbsp_config);
#ifdef CONFIG_ARCH_OMAP3 +static struct omap_device *find_omap_device_by_dev(struct device *dev) +{ + struct platform_device *pdev = container_of(dev, + struct platform_device, dev); + return container_of(pdev, struct omap_device, pdev); +} + static void omap_st_on(struct omap_mcbsp *mcbsp) { unsigned int w; + struct omap_device *od; + + od = find_omap_device_by_dev(mcbsp->dev);
/* * Sidetone uses McBSP ICLK - which must not idle when sidetones @@ -244,8 +255,7 @@ static void omap_st_on(struct omap_mcbsp *mcbsp) w = MCBSP_READ(mcbsp, SSELCR); MCBSP_WRITE(mcbsp, SSELCR, w | SIDETONEEN);
- w = MCBSP_ST_READ(mcbsp, SYSCONFIG); - MCBSP_ST_WRITE(mcbsp, SYSCONFIG, w & ~(ST_AUTOIDLE)); + omap_device_disable_autoidle(od);
/* Enable Sidetone from Sidetone Core */ w = MCBSP_ST_READ(mcbsp, SSELCR); @@ -255,12 +265,14 @@ static void omap_st_on(struct omap_mcbsp *mcbsp) static void omap_st_off(struct omap_mcbsp *mcbsp) { unsigned int w; + struct omap_device *od; + + od = find_omap_device_by_dev(mcbsp->dev);
w = MCBSP_ST_READ(mcbsp, SSELCR); MCBSP_ST_WRITE(mcbsp, SSELCR, w & ~(ST_SIDETONEEN));
- w = MCBSP_ST_READ(mcbsp, SYSCONFIG); - MCBSP_ST_WRITE(mcbsp, SYSCONFIG, w | ST_AUTOIDLE); + omap_device_enable_autoidle(od);
w = MCBSP_READ(mcbsp, SSELCR); MCBSP_WRITE(mcbsp, SSELCR, w & ~(SIDETONEEN)); @@ -273,9 +285,11 @@ static void omap_st_off(struct omap_mcbsp *mcbsp) static void omap_st_fir_write(struct omap_mcbsp *mcbsp, s16 *fir) { u16 val, i; + struct omap_device *od;
- val = MCBSP_ST_READ(mcbsp, SYSCONFIG); - MCBSP_ST_WRITE(mcbsp, SYSCONFIG, val & ~(ST_AUTOIDLE)); + od = find_omap_device_by_dev(mcbsp->dev); + + omap_device_disable_autoidle(od);
val = MCBSP_ST_READ(mcbsp, SSELCR);
@@ -303,9 +317,11 @@ static void omap_st_chgain(struct omap_mcbsp *mcbsp) { u16 w; struct omap_mcbsp_st_data *st_data = mcbsp->st_data; + struct omap_device *od; + + od = find_omap_device_by_dev(mcbsp->dev);
- w = MCBSP_ST_READ(mcbsp, SYSCONFIG); - MCBSP_ST_WRITE(mcbsp, SYSCONFIG, w & ~(ST_AUTOIDLE)); + omap_device_disable_autoidle(od);
w = MCBSP_ST_READ(mcbsp, SSELCR);
@@ -648,49 +664,37 @@ EXPORT_SYMBOL(omap_mcbsp_get_dma_op_mode);
static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp) { + struct omap_device *od; + + od = find_omap_device_by_dev(mcbsp->dev); /* * Enable wakup behavior, smart idle and all wakeups * REVISIT: some wakeups may be unnecessary */ if (cpu_is_omap34xx() || cpu_is_omap44xx()) { - u16 syscon; - - syscon = MCBSP_READ(mcbsp, SYSCON); - syscon &= ~(ENAWAKEUP | SIDLEMODE(0x03) | CLOCKACTIVITY(0x03)); - - if (mcbsp->dma_op_mode == MCBSP_DMA_MODE_THRESHOLD) { - syscon |= (ENAWAKEUP | SIDLEMODE(0x02) | - CLOCKACTIVITY(0x02)); + if (mcbsp->dma_op_mode != MCBSP_DMA_MODE_THRESHOLD) + omap_device_noidle(od); + else MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN); - } else { - syscon |= SIDLEMODE(0x01); - } - - MCBSP_WRITE(mcbsp, SYSCON, syscon); } }
static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp) { + struct omap_device *od; + + od = find_omap_device_by_dev(mcbsp->dev); + /* * Disable wakup behavior, smart idle and all wakeups */ if (cpu_is_omap34xx() || cpu_is_omap44xx()) { - u16 syscon; - - syscon = MCBSP_READ(mcbsp, SYSCON); - syscon &= ~(ENAWAKEUP | SIDLEMODE(0x03) | CLOCKACTIVITY(0x03)); /* * HW bug workaround - If no_idle mode is taken, we need to * go to smart_idle before going to always_idle, or the * device will not hit retention anymore. */ - syscon |= SIDLEMODE(0x02); - MCBSP_WRITE(mcbsp, SYSCON, syscon); - - syscon &= ~(SIDLEMODE(0x03)); - MCBSP_WRITE(mcbsp, SYSCON, syscon); - + omap_device_default_idle(od); MCBSP_WRITE(mcbsp, WAKEUPEN, 0); } }
Hi,
On 01/31/2011 04:50 PM, ext Kishon Vijay Abraham I wrote:
McBSP2/3 in OMAP3 has sidetone feature which requires autoidle to be disabled before starting the sidetone. Also SYSCONFIG register has to be set with smart idle or no idle depending on the dma op mode (threshold or element sync). For doing these operations dynamically at runtime, omap_device APIs are used to modify SYSCONFIG register.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com
arch/arm/plat-omap/mcbsp.c | 66 +++++++++++++++++++++++-------------------- 1 files changed, 35 insertions(+), 31 deletions(-)
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
...
static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp) {
- struct omap_device *od;
- od = find_omap_device_by_dev(mcbsp->dev); /*
*/ if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
- Enable wakup behavior, smart idle and all wakeups
- REVISIT: some wakeups may be unnecessary
u16 syscon;syscon = MCBSP_READ(mcbsp, SYSCON);syscon &= ~(ENAWAKEUP | SIDLEMODE(0x03) | CLOCKACTIVITY(0x03));if (mcbsp->dma_op_mode == MCBSP_DMA_MODE_THRESHOLD) {syscon |= (ENAWAKEUP | SIDLEMODE(0x02) |CLOCKACTIVITY(0x02));
if (mcbsp->dma_op_mode != MCBSP_DMA_MODE_THRESHOLD)omap_device_noidle(od);else
Would it make sense to call here: omap_device_smartidle(od); ? What happens, if we configure McBSP to element mode, play a sample, configure it to threshold? I think we should explicitly as for smartidle, when we suppose to be in smartidle.
MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN);
} else {syscon |= SIDLEMODE(0x01);}MCBSP_WRITE(mcbsp, SYSCON, syscon);}
static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp) {
- struct omap_device *od;
- od = find_omap_device_by_dev(mcbsp->dev);
- /*
*/ if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
- Disable wakup behavior, smart idle and all wakeups
u16 syscon;syscon = MCBSP_READ(mcbsp, SYSCON);syscon &= ~(ENAWAKEUP | SIDLEMODE(0x03) | CLOCKACTIVITY(0x03));*/
- HW bug workaround - If no_idle mode is taken, we need to
- go to smart_idle before going to always_idle, or the
- device will not hit retention anymore.
syscon |= SIDLEMODE(0x02);MCBSP_WRITE(mcbsp, SYSCON, syscon);syscon &= ~(SIDLEMODE(0x03));MCBSP_WRITE(mcbsp, SYSCON, syscon);
omap_device_default_idle(od);
Hrm, it would be better to do it as the comment said: omap_device_smartidle(od); omap_device_forceidle(od);
BTW: what is the default_idle in case of McBSP?
On Tue, Feb 1, 2011 at 5:49 PM, Peter Ujfalusi peter.ujfalusi@nokia.com wrote:
Hi,
On 01/31/2011 04:50 PM, ext Kishon Vijay Abraham I wrote:
McBSP2/3 in OMAP3 has sidetone feature which requires autoidle to be disabled before starting the sidetone. Also SYSCONFIG register has to be set with smart idle or no idle depending on the dma op mode (threshold or element sync). For doing these operations dynamically at runtime, omap_device APIs are used to modify SYSCONFIG register.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com
arch/arm/plat-omap/mcbsp.c | 66 +++++++++++++++++++++++-------------------- 1 files changed, 35 insertions(+), 31 deletions(-)
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
...
static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp) {
- struct omap_device *od;
- od = find_omap_device_by_dev(mcbsp->dev);
/* * Enable wakup behavior, smart idle and all wakeups * REVISIT: some wakeups may be unnecessary */ if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
- u16 syscon;
- syscon = MCBSP_READ(mcbsp, SYSCON);
- syscon &= ~(ENAWAKEUP | SIDLEMODE(0x03) | CLOCKACTIVITY(0x03));
- if (mcbsp->dma_op_mode == MCBSP_DMA_MODE_THRESHOLD) {
- syscon |= (ENAWAKEUP | SIDLEMODE(0x02) |
- CLOCKACTIVITY(0x02));
- if (mcbsp->dma_op_mode != MCBSP_DMA_MODE_THRESHOLD)
- omap_device_noidle(od);
- else
Would it make sense to call here: omap_device_smartidle(od); ?
I dint explicitly call it because, pm_runtime_get_sync() would have already set the SYSCONFIG to smartidle.
What happens, if we configure McBSP to element mode, play a sample, configure it to threshold? I think we should explicitly as for smartidle, when we suppose to be in smartidle.
In either ways, this function will be called when we do a request and this function (omap34xx_mcbsp_request) gets called after pm_runtime_get_sync. So based on the value of dma_op_mode at the time of request, either noidle or smartidle will be set.
MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN);
- } else {
- syscon |= SIDLEMODE(0x01);
- }
- MCBSP_WRITE(mcbsp, SYSCON, syscon);
} }
static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp) {
- struct omap_device *od;
- od = find_omap_device_by_dev(mcbsp->dev);
/* * Disable wakup behavior, smart idle and all wakeups */ if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
- u16 syscon;
- syscon = MCBSP_READ(mcbsp, SYSCON);
- syscon &= ~(ENAWAKEUP | SIDLEMODE(0x03) | CLOCKACTIVITY(0x03));
/* * HW bug workaround - If no_idle mode is taken, we need to * go to smart_idle before going to always_idle, or the * device will not hit retention anymore. */
- syscon |= SIDLEMODE(0x02);
- MCBSP_WRITE(mcbsp, SYSCON, syscon);
- syscon &= ~(SIDLEMODE(0x03));
- MCBSP_WRITE(mcbsp, SYSCON, syscon);
- omap_device_default_idle(od);
MCBSP_WRITE(mcbsp, WAKEUPEN, 0);
Hrm, it would be better to do it as the comment said: omap_device_smartidle(od); omap_device_forceidle(od);
hmmm..ok. Will make this change in the next version.
BTW: what is the default_idle in case of McBSP?
The default idle mode for McBSP is SMARTIDLE. It is actually based on SWSUP flag. If it is set, the idlemode is NOIDLE else SMARTIDLE. Pls have a look at my patch that implements omap_device_default_idle() [1].
[1]http://permalink.gmane.org/gmane.linux.ports.arm.omap/51134
-- Péter
Add pm runtime support for McBSP driver. Reference to fclk is not removed because it is required when the functional clock is switched from one source to another.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com --- arch/arm/mach-omap2/mcbsp.c | 5 +++-- arch/arm/plat-omap/include/plat/mcbsp.h | 1 - arch/arm/plat-omap/mcbsp.c | 23 ++++++----------------- 3 files changed, 9 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index 7d0fe2b..e232a49 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -23,6 +23,7 @@ #include <plat/cpu.h> #include <plat/mcbsp.h> #include <plat/omap_device.h> +#include <linux/pm_runtime.h>
#include "control.h"
@@ -83,7 +84,7 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id) return -EINVAL; }
- clk_disable(mcbsp->fclk); + pm_runtime_put_sync(mcbsp->dev);
r = clk_set_parent(mcbsp->fclk, fck_src); if (IS_ERR_VALUE(r)) { @@ -93,7 +94,7 @@ int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id) return -EINVAL; }
- clk_enable(mcbsp->fclk); + pm_runtime_get_sync(mcbsp->dev);
clk_put(fck_src);
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 27bfb1d..75c176c 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -479,7 +479,6 @@ struct omap_mcbsp { /* Protect the field .free, while checking if the mcbsp is in use */ spinlock_t lock; struct omap_mcbsp_platform_data *pdata; - struct clk *iclk; struct clk *fclk; #ifdef CONFIG_ARCH_OMAP3 struct omap_mcbsp_st_data *st_data; diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 9bc2c73..63938a2 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -28,6 +28,7 @@ #include <plat/dma.h> #include <plat/mcbsp.h> #include <plat/omap_device.h> +#include <linux/pm_runtime.h>
/* XXX These "sideways" includes are a sign that something is wrong */ #include "../mach-omap2/cm2xxx_3xxx.h" @@ -768,8 +769,7 @@ int omap_mcbsp_request(unsigned int id) if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request) mcbsp->pdata->ops->request(id);
- clk_enable(mcbsp->iclk); - clk_enable(mcbsp->fclk); + pm_runtime_get_sync(mcbsp->dev);
/* Do procedure specific to omap34xx arch, if applicable */ omap34xx_mcbsp_request(mcbsp); @@ -817,8 +817,7 @@ err_clk_disable: /* Do procedure specific to omap34xx arch, if applicable */ omap34xx_mcbsp_free(mcbsp);
- clk_disable(mcbsp->fclk); - clk_disable(mcbsp->iclk); + pm_runtime_put_sync(mcbsp->dev);
spin_lock(&mcbsp->lock); mcbsp->free = true; @@ -848,8 +847,7 @@ void omap_mcbsp_free(unsigned int id) /* Do procedure specific to omap34xx arch, if applicable */ omap34xx_mcbsp_free(mcbsp);
- clk_disable(mcbsp->fclk); - clk_disable(mcbsp->iclk); + pm_runtime_put_sync(mcbsp->dev);
if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) { /* Free IRQs */ @@ -1862,32 +1860,24 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) } mcbsp->dma_tx_sync = res->start;
- mcbsp->iclk = clk_get(&pdev->dev, "ick"); - if (IS_ERR(mcbsp->iclk)) { - ret = PTR_ERR(mcbsp->iclk); - dev_err(&pdev->dev, "unable to get ick: %d\n", ret); - goto err_res; - } - mcbsp->fclk = clk_get(&pdev->dev, "fck"); if (IS_ERR(mcbsp->fclk)) { ret = PTR_ERR(mcbsp->fclk); dev_err(&pdev->dev, "unable to get fck: %d\n", ret); - goto err_fclk; + goto err_res; }
mcbsp->pdata = pdata; mcbsp->dev = &pdev->dev; mcbsp_ptr[id] = mcbsp; platform_set_drvdata(pdev, mcbsp); + pm_runtime_enable(mcbsp->dev);
/* Initialize mcbsp properties for OMAP34XX if needed / applicable */ omap34xx_device_init(mcbsp);
return 0;
-err_fclk: - clk_put(mcbsp->iclk); err_res: iounmap(mcbsp->io_base); err_ioremap: @@ -1910,7 +1900,6 @@ static int __devexit omap_mcbsp_remove(struct platform_device *pdev) omap34xx_device_exit(mcbsp);
clk_put(mcbsp->fclk); - clk_put(mcbsp->iclk);
iounmap(mcbsp->io_base); kfree(mcbsp);
After McBSP driver is hwmod adapted, the information about the hw would be obtained from the hwmod database by the mcbsp driver. Since DMA programming is handled by the client driver, APIs are provided to pass the DMA channel number and base address of data register required by the client driver for DMA programming.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com Signed-off-by: Charulatha V charu@ti.com --- arch/arm/mach-omap2/mcbsp.c | 2 + arch/arm/plat-omap/include/plat/mcbsp.h | 7 +++ arch/arm/plat-omap/mcbsp.c | 64 +++++++++++++++++++++++++++++++ 3 files changed, 73 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index e232a49..3e87527 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -125,6 +125,8 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) return -ENOMEM; }
+ pdata->mcbsp_config_type = oh->class->rev; + if (oh->class->rev == MCBSP_CONFIG_TYPE3) { if (id == 2) pdata->buffer_size = 0x500; /*FIFO size is 1024 + 256*/ diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 75c176c..54058a3 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -81,6 +81,8 @@ static struct platform_device omap_mcbsp##port_nr = { \ #define OMAP_MCBSP_REG_DRR1 0x02 #define OMAP_MCBSP_REG_DXR2 0x04 #define OMAP_MCBSP_REG_DXR1 0x06 +#define OMAP_MCBSP_REG_DRR 0x02 +#define OMAP_MCBSP_REG_DXR 0x06 #define OMAP_MCBSP_REG_SPCR2 0x08 #define OMAP_MCBSP_REG_SPCR1 0x0a #define OMAP_MCBSP_REG_RCR2 0x0c @@ -437,6 +439,7 @@ struct omap_mcbsp_platform_data { unsigned long phys_base_st; u16 buffer_size; #endif + unsigned int mcbsp_config_type; };
struct omap_mcbsp_st_data { @@ -487,6 +490,7 @@ struct omap_mcbsp { u16 max_rx_thres; #endif void *reg_cache; + unsigned int mcbsp_config_type; };
/** @@ -555,6 +559,9 @@ int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type); void omap2_mcbsp1_mux_clkr_src(u8 mux); void omap2_mcbsp1_mux_fsr_src(u8 mux);
+int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream); +int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream); + #ifdef CONFIG_ARCH_OMAP3 /* Sidetone specific API */ int omap_st_set_chgain(unsigned int id, int channel, s16 chgain); diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 63938a2..1626e02 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -229,6 +229,69 @@ void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config) } EXPORT_SYMBOL(omap_mcbsp_config);
+/** + * omap_mcbsp_dma_params - returns the dma channel number + * @id - mcbsp id + * @stream - indicates the direction of data flow (rx or tx) + * + * Returns the dma channel number for the rx channel or tx channel + * based on the value of @stream for the requested mcbsp given by @id + */ +int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream) +{ + struct omap_mcbsp *mcbsp; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return -ENODEV; + } + mcbsp = id_to_mcbsp_ptr(id); + + if (stream) + return mcbsp->dma_rx_sync; + else + return mcbsp->dma_tx_sync; +} +EXPORT_SYMBOL(omap_mcbsp_dma_ch_params); + +/** + * omap_mcbsp_dma_reg_params - returns the address of mcbsp data register + * @id - mcbsp id + * @stream - indicates the direction of data flow (rx or tx) + * + * Returns the address of mcbsp data transmit register or data receive register + * to be used by DMA for transferring/receiving data based on the value of + * @stream for the requested mcbsp given by @id + */ +int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream) +{ + struct omap_mcbsp *mcbsp; + int data_reg; + + if (!omap_mcbsp_check_valid_id(id)) { + printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); + return -ENODEV; + } + mcbsp = id_to_mcbsp_ptr(id); + + data_reg = mcbsp->phys_dma_base; + + if (mcbsp->mcbsp_config_type < MCBSP_CONFIG_TYPE2) { + if (stream) + data_reg += OMAP_MCBSP_REG_DRR1; + else + data_reg += OMAP_MCBSP_REG_DXR1; + } else { + if (stream) + data_reg += OMAP_MCBSP_REG_DRR; + else + data_reg += OMAP_MCBSP_REG_DXR; + } + + return data_reg; +} +EXPORT_SYMBOL(omap_mcbsp_dma_reg_params); + #ifdef CONFIG_ARCH_OMAP3 static struct omap_device *find_omap_device_by_dev(struct device *dev) { @@ -1870,6 +1933,7 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) mcbsp->pdata = pdata; mcbsp->dev = &pdev->dev; mcbsp_ptr[id] = mcbsp; + mcbsp->mcbsp_config_type = pdata->mcbsp_config_type; platform_set_drvdata(pdev, mcbsp); pm_runtime_enable(mcbsp->dev);
Removed the use of macros to obtain base address and DMA channel number. Instead use the McBSP driver API's that passes base address and DMA channel number to the client driver.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com Cc: Jarkko Nikula jhnikula@gmail.com Cc: Peter Ujfalusi peter.ujfalusi@nokia.com --- sound/soc/omap/omap-mcbsp.c | 126 ++----------------------------------------- 1 files changed, 4 insertions(+), 122 deletions(-)
diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c index ede6afd..2175f09 100644 --- a/sound/soc/omap/omap-mcbsp.c +++ b/sound/soc/omap/omap-mcbsp.c @@ -69,110 +69,6 @@ static struct omap_mcbsp_data mcbsp_data[NUM_LINKS]; */ static struct omap_pcm_dma_data omap_mcbsp_dai_dma_params[NUM_LINKS][2];
-#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) -static const int omap1_dma_reqs[][2] = { - { OMAP_DMA_MCBSP1_TX, OMAP_DMA_MCBSP1_RX }, - { OMAP_DMA_MCBSP2_TX, OMAP_DMA_MCBSP2_RX }, - { OMAP_DMA_MCBSP3_TX, OMAP_DMA_MCBSP3_RX }, -}; -static const unsigned long omap1_mcbsp_port[][2] = { - { OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1, - OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1 }, - { OMAP1510_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1, - OMAP1510_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1 }, - { OMAP1510_MCBSP3_BASE + OMAP_MCBSP_REG_DXR1, - OMAP1510_MCBSP3_BASE + OMAP_MCBSP_REG_DRR1 }, -}; -#else -static const int omap1_dma_reqs[][2] = {}; -static const unsigned long omap1_mcbsp_port[][2] = {}; -#endif - -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) -static const int omap24xx_dma_reqs[][2] = { - { OMAP24XX_DMA_MCBSP1_TX, OMAP24XX_DMA_MCBSP1_RX }, - { OMAP24XX_DMA_MCBSP2_TX, OMAP24XX_DMA_MCBSP2_RX }, -#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_ARCH_OMAP3) - { OMAP24XX_DMA_MCBSP3_TX, OMAP24XX_DMA_MCBSP3_RX }, - { OMAP24XX_DMA_MCBSP4_TX, OMAP24XX_DMA_MCBSP4_RX }, - { OMAP24XX_DMA_MCBSP5_TX, OMAP24XX_DMA_MCBSP5_RX }, -#endif -}; -#else -static const int omap24xx_dma_reqs[][2] = {}; -#endif - -#if defined(CONFIG_ARCH_OMAP4) -static const int omap44xx_dma_reqs[][2] = { - { OMAP44XX_DMA_MCBSP1_TX, OMAP44XX_DMA_MCBSP1_RX }, - { OMAP44XX_DMA_MCBSP2_TX, OMAP44XX_DMA_MCBSP2_RX }, - { OMAP44XX_DMA_MCBSP3_TX, OMAP44XX_DMA_MCBSP3_RX }, - { OMAP44XX_DMA_MCBSP4_TX, OMAP44XX_DMA_MCBSP4_RX }, -}; -#else -static const int omap44xx_dma_reqs[][2] = {}; -#endif - -#if defined(CONFIG_SOC_OMAP2420) -static const unsigned long omap2420_mcbsp_port[][2] = { - { OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1, - OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1 }, - { OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1, - OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1 }, -}; -#else -static const unsigned long omap2420_mcbsp_port[][2] = {}; -#endif - -#if defined(CONFIG_SOC_OMAP2430) -static const unsigned long omap2430_mcbsp_port[][2] = { - { OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR, - OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DRR }, - { OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR, - OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR }, - { OMAP2430_MCBSP3_BASE + OMAP_MCBSP_REG_DXR, - OMAP2430_MCBSP3_BASE + OMAP_MCBSP_REG_DRR }, - { OMAP2430_MCBSP4_BASE + OMAP_MCBSP_REG_DXR, - OMAP2430_MCBSP4_BASE + OMAP_MCBSP_REG_DRR }, - { OMAP2430_MCBSP5_BASE + OMAP_MCBSP_REG_DXR, - OMAP2430_MCBSP5_BASE + OMAP_MCBSP_REG_DRR }, -}; -#else -static const unsigned long omap2430_mcbsp_port[][2] = {}; -#endif - -#if defined(CONFIG_ARCH_OMAP3) -static const unsigned long omap34xx_mcbsp_port[][2] = { - { OMAP34XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR, - OMAP34XX_MCBSP1_BASE + OMAP_MCBSP_REG_DRR }, - { OMAP34XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR, - OMAP34XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR }, - { OMAP34XX_MCBSP3_BASE + OMAP_MCBSP_REG_DXR, - OMAP34XX_MCBSP3_BASE + OMAP_MCBSP_REG_DRR }, - { OMAP34XX_MCBSP4_BASE + OMAP_MCBSP_REG_DXR, - OMAP34XX_MCBSP4_BASE + OMAP_MCBSP_REG_DRR }, - { OMAP34XX_MCBSP5_BASE + OMAP_MCBSP_REG_DXR, - OMAP34XX_MCBSP5_BASE + OMAP_MCBSP_REG_DRR }, -}; -#else -static const unsigned long omap34xx_mcbsp_port[][2] = {}; -#endif - -#if defined(CONFIG_ARCH_OMAP4) -static const unsigned long omap44xx_mcbsp_port[][2] = { - { OMAP44XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR, - OMAP44XX_MCBSP1_BASE + OMAP_MCBSP_REG_DRR }, - { OMAP44XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR, - OMAP44XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR }, - { OMAP44XX_MCBSP3_BASE + OMAP_MCBSP_REG_DXR, - OMAP44XX_MCBSP3_BASE + OMAP_MCBSP_REG_DRR }, - { OMAP44XX_MCBSP4_BASE + OMAP_MCBSP_REG_DXR, - OMAP44XX_MCBSP4_BASE + OMAP_MCBSP_REG_DRR }, -}; -#else -static const unsigned long omap44xx_mcbsp_port[][2] = {}; -#endif - static void omap_mcbsp_set_threshold(struct snd_pcm_substream *substream) { struct snd_soc_pcm_runtime *rtd = substream->private_data; @@ -346,24 +242,10 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, unsigned int format, div, framesize, master;
dma_data = &omap_mcbsp_dai_dma_params[cpu_dai->id][substream->stream]; - if (cpu_class_is_omap1()) { - dma = omap1_dma_reqs[bus_id][substream->stream]; - port = omap1_mcbsp_port[bus_id][substream->stream]; - } else if (cpu_is_omap2420()) { - dma = omap24xx_dma_reqs[bus_id][substream->stream]; - port = omap2420_mcbsp_port[bus_id][substream->stream]; - } else if (cpu_is_omap2430()) { - dma = omap24xx_dma_reqs[bus_id][substream->stream]; - port = omap2430_mcbsp_port[bus_id][substream->stream]; - } else if (cpu_is_omap343x()) { - dma = omap24xx_dma_reqs[bus_id][substream->stream]; - port = omap34xx_mcbsp_port[bus_id][substream->stream]; - } else if (cpu_is_omap44xx()) { - dma = omap44xx_dma_reqs[bus_id][substream->stream]; - port = omap44xx_mcbsp_port[bus_id][substream->stream]; - } else { - return -ENODEV; - } + + dma = omap_mcbsp_dma_ch_params(bus_id, substream->stream); + port = omap_mcbsp_dma_reg_params(bus_id, substream->stream); + switch (params_format(params)) { case SNDRV_PCM_FORMAT_S16_LE: dma_data->data_type = OMAP_DMA_DATA_TYPE_S16;
On Mon, Jan 31, 2011 at 08:20:36PM +0530, Kishon Vijay Abraham I wrote:
Removed the use of macros to obtain base address and DMA channel number. Instead use the McBSP driver API's that passes base address and DMA channel number to the client driver.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com Cc: Jarkko Nikula jhnikula@gmail.com Cc: Peter Ujfalusi peter.ujfalusi@nokia.com
Acked-by: Mark Brown broonie@opensource.wolfsonmicro.com
Information like base address and DMA channel nubers should no longer be obtained using macros. These information should be obtained from hwmod database. Hence the macros that define the base address are removed.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com Signed-off-by: Charulatha V charu@ti.com --- arch/arm/mach-omap1/mcbsp.c | 64 +++++++++++++++--------------- arch/arm/plat-omap/include/plat/mcbsp.h | 50 +----------------------- 2 files changed, 33 insertions(+), 81 deletions(-)
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index 2b89ebd..d90f649 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c @@ -83,14 +83,14 @@ struct resource omap7xx_mcbsp_res[][6] = { { { .name = "mpu", - .start = OMAP7XX_MCBSP1_BASE, - .end = OMAP7XX_MCBSP1_BASE + SZ_256, + .start = 0xfffb1000, + .end = 0xfffb10ff, .flags = IORESOURCE_MEM, }, { .name = "dma", - .start = OMAP7XX_MCBSP1_BASE, - .end = OMAP7XX_MCBSP1_BASE + SZ_256, + .start = 0xfffb1000, + .end = 0xfffb10ff, .flags = IORESOURCE_MEM, }, { @@ -117,14 +117,14 @@ struct resource omap7xx_mcbsp_res[][6] = { { { .name = "mpu", - .start = OMAP7XX_MCBSP2_BASE, - .end = OMAP7XX_MCBSP2_BASE + SZ_256, + .start = 0xfffb1800, + .end = 0xfffb18ff, .flags = IORESOURCE_MEM, }, { .name = "dma", - .start = OMAP7XX_MCBSP2_BASE, - .end = OMAP7XX_MCBSP2_BASE + SZ_256, + .start = 0xfffb1800, + .end = 0xfffb18ff, .flags = IORESOURCE_MEM, }, { @@ -172,14 +172,14 @@ struct resource omap15xx_mcbsp_res[][6] = { { { .name = "mpu", - .start = OMAP1510_MCBSP1_BASE, - .end = OMAP1510_MCBSP1_BASE + SZ_256, + .start = 0xe1011800, + .end = 0xe10118ff, .flags = IORESOURCE_MEM, }, { .name = "dma", - .start = OMAP1510_MCBSP1_BASE, - .end = OMAP1510_MCBSP1_BASE + SZ_256, + .start = 0xe1011800, + .end = 0xe10118ff, .flags = IORESOURCE_MEM, }, { @@ -206,14 +206,14 @@ struct resource omap15xx_mcbsp_res[][6] = { { { .name = "mpu", - .start = OMAP1510_MCBSP2_BASE, - .end = OMAP1510_MCBSP2_BASE + SZ_256, + .start = 0xfffb1000, + .end = 0xfffb10ff, .flags = IORESOURCE_MEM, }, { .name = "dma", - .start = OMAP1510_MCBSP2_BASE, - .end = OMAP1510_MCBSP2_BASE + SZ_256, + .start = 0xfffb1000, + .end = 0xfffb10ff, .flags = IORESOURCE_MEM, }, { @@ -240,14 +240,14 @@ struct resource omap15xx_mcbsp_res[][6] = { { { .name = "mpu", - .start = OMAP1510_MCBSP3_BASE, - .end = OMAP1510_MCBSP3_BASE + SZ_256, + .start = 0xe1017000, + .end = 0xe10170ff, .flags = IORESOURCE_MEM, }, { .name = "dma", - .start = OMAP1510_MCBSP3_BASE, - .end = OMAP1510_MCBSP3_BASE + SZ_256, + .start = 0xe1017000, + .end = 0xe10170ff, .flags = IORESOURCE_MEM, }, { @@ -298,14 +298,14 @@ struct resource omap16xx_mcbsp_res[][6] = { { { .name = "mpu", - .start = OMAP1610_MCBSP1_BASE, - .end = OMAP1610_MCBSP1_BASE + SZ_256, + .start = 0xe1011800, + .end = 0xe10118ff, .flags = IORESOURCE_MEM, }, { .name = "dma", - .start = OMAP1610_MCBSP1_BASE, - .end = OMAP1610_MCBSP1_BASE + SZ_256, + .start = 0xe1011800, + .end = 0xe10118ff, .flags = IORESOURCE_MEM, }, { @@ -332,14 +332,14 @@ struct resource omap16xx_mcbsp_res[][6] = { { { .name = "mpu", - .start = OMAP1610_MCBSP2_BASE, - .end = OMAP1610_MCBSP2_BASE + SZ_256, + .start = 0xfffb1000, + .end = 0xfffb10ff, .flags = IORESOURCE_MEM, }, { .name = "dma", - .start = OMAP1610_MCBSP2_BASE, - .end = OMAP1610_MCBSP2_BASE + SZ_256, + .start = 0xfffb1000, + .end = 0xfffb10ff, .flags = IORESOURCE_MEM, }, { @@ -366,14 +366,14 @@ struct resource omap16xx_mcbsp_res[][6] = { { { .name = "mpu", - .start = OMAP1610_MCBSP3_BASE, - .end = OMAP1610_MCBSP3_BASE + SZ_256, + .start = 0xe1017000, + .end = 0xe10170ff, .flags = IORESOURCE_MEM, }, { .name = "dma", - .start = OMAP1610_MCBSP3_BASE, - .end = OMAP1610_MCBSP3_BASE + SZ_256, + .start = 0xe1017000, + .end = 0xe10170ff, .flags = IORESOURCE_MEM, }, { diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 54058a3..2c827ef 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h @@ -41,41 +41,7 @@ static struct platform_device omap_mcbsp##port_nr = { \ #define MCBSP_CONFIG_TYPE3 0x3 #define MCBSP_CONFIG_TYPE4 0x4
-#define OMAP7XX_MCBSP1_BASE 0xfffb1000 -#define OMAP7XX_MCBSP2_BASE 0xfffb1800 - -#define OMAP1510_MCBSP1_BASE 0xe1011800 -#define OMAP1510_MCBSP2_BASE 0xfffb1000 -#define OMAP1510_MCBSP3_BASE 0xe1017000 - -#define OMAP1610_MCBSP1_BASE 0xe1011800 -#define OMAP1610_MCBSP2_BASE 0xfffb1000 -#define OMAP1610_MCBSP3_BASE 0xe1017000 - -#define OMAP24XX_MCBSP1_BASE 0x48074000 -#define OMAP24XX_MCBSP2_BASE 0x48076000 -#define OMAP2430_MCBSP3_BASE 0x4808c000 -#define OMAP2430_MCBSP4_BASE 0x4808e000 -#define OMAP2430_MCBSP5_BASE 0x48096000 - -#define OMAP34XX_MCBSP1_BASE 0x48074000 -#define OMAP34XX_MCBSP2_BASE 0x49022000 -#define OMAP34XX_MCBSP2_ST_BASE 0x49028000 -#define OMAP34XX_MCBSP3_BASE 0x49024000 -#define OMAP34XX_MCBSP3_ST_BASE 0x4902A000 -#define OMAP34XX_MCBSP3_BASE 0x49024000 -#define OMAP34XX_MCBSP4_BASE 0x49026000 -#define OMAP34XX_MCBSP5_BASE 0x48096000 - -#define OMAP44XX_MCBSP1_BASE 0x40122000 -#define OMAP44XX_MCBSP1_DMA_BASE 0x49022000 -#define OMAP44XX_MCBSP2_BASE 0x40124000 -#define OMAP44XX_MCBSP2_DMA_BASE 0x49024000 -#define OMAP44XX_MCBSP3_BASE 0x40126000 -#define OMAP44XX_MCBSP3_DMA_BASE 0x49026000 -#define OMAP44XX_MCBSP4_BASE 0x48096000 - -#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) +#ifdef CONFIG_ARCH_OMAP1
#define OMAP_MCBSP_REG_DRR2 0x00 #define OMAP_MCBSP_REG_DRR1 0x02 @@ -115,13 +81,6 @@ static struct platform_device omap_mcbsp##port_nr = { \ #define OMAP_MCBSP_REG_XCCR 0x00 #define OMAP_MCBSP_REG_RCCR 0x00
-#define AUDIO_MCBSP_DATAWRITE (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1) -#define AUDIO_MCBSP_DATAREAD (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1) - -#define AUDIO_MCBSP OMAP_MCBSP1 -#define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX -#define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX - #else
#define OMAP_MCBSP_REG_DRR2 0x00 @@ -177,13 +136,6 @@ static struct platform_device omap_mcbsp##port_nr = { \ #define OMAP_ST_REG_SFIRCR 0x28 #define OMAP_ST_REG_SSELCR 0x2C
-#define AUDIO_MCBSP_DATAWRITE (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1) -#define AUDIO_MCBSP_DATAREAD (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1) - -#define AUDIO_MCBSP OMAP_MCBSP2 -#define AUDIO_DMA_TX OMAP24XX_DMA_MCBSP2_TX -#define AUDIO_DMA_RX OMAP24XX_DMA_MCBSP2_RX - #endif
/************************** McBSP SPCR1 bit definitions ***********************/
On Mon, 31 Jan 2011 20:20:37 +0530 Kishon Vijay Abraham I kishon@ti.com wrote:
Information like base address and DMA channel nubers should no longer be obtained using macros. These information should be obtained from hwmod database. Hence the macros that define the base address are removed.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com Signed-off-by: Charulatha V charu@ti.com
arch/arm/mach-omap1/mcbsp.c | 64 +++++++++++++++--------------- arch/arm/plat-omap/include/plat/mcbsp.h | 50 +----------------------- 2 files changed, 33 insertions(+), 81 deletions(-)
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index 2b89ebd..d90f649 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c @@ -83,14 +83,14 @@ struct resource omap7xx_mcbsp_res[][6] = { { { .name = "mpu",
.start = OMAP7XX_MCBSP1_BASE,.end = OMAP7XX_MCBSP1_BASE + SZ_256,
.start = 0xfffb1000,.end = 0xfffb10ff,
For these changes I don't see immediate reason as they reduce readability. Is this better to do outside of this set together with a patch that adds these into hwmod database etc?
-#define AUDIO_MCBSP_DATAWRITE (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1) -#define AUDIO_MCBSP_DATAREAD (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1)
-#define AUDIO_MCBSP OMAP_MCBSP1 -#define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX -#define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX
#else
#define OMAP_MCBSP_REG_DRR2 0x00 @@ -177,13 +136,6 @@ static struct platform_device omap_mcbsp##port_nr = { \ #define OMAP_ST_REG_SFIRCR 0x28 #define OMAP_ST_REG_SSELCR 0x2C
-#define AUDIO_MCBSP_DATAWRITE (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1) -#define AUDIO_MCBSP_DATAREAD (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1)
-#define AUDIO_MCBSP OMAP_MCBSP2 -#define AUDIO_DMA_TX OMAP24XX_DMA_MCBSP2_TX -#define AUDIO_DMA_RX OMAP24XX_DMA_MCBSP2_RX
These looks things that can be removed immediately and independently from this set.
On Tue, Feb 1, 2011 at 11:37 PM, Jarkko Nikula jhnikula@gmail.com wrote:
On Mon, 31 Jan 2011 20:20:37 +0530 Kishon Vijay Abraham I kishon@ti.com wrote:
Information like base address and DMA channel nubers should no longer be obtained using macros. These information should be obtained from hwmod database. Hence the macros that define the base address are removed.
Signed-off-by: Kishon Vijay Abraham I kishon@ti.com Signed-off-by: Charulatha V charu@ti.com
arch/arm/mach-omap1/mcbsp.c | 64 +++++++++++++++--------------- arch/arm/plat-omap/include/plat/mcbsp.h | 50 +----------------------- 2 files changed, 33 insertions(+), 81 deletions(-)
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index 2b89ebd..d90f649 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c @@ -83,14 +83,14 @@ struct resource omap7xx_mcbsp_res[][6] = { { { .name = "mpu",
- .start = OMAP7XX_MCBSP1_BASE,
- .end = OMAP7XX_MCBSP1_BASE + SZ_256,
- .start = 0xfffb1000,
- .end = 0xfffb10ff,
For these changes I don't see immediate reason as they reduce readability.
Maybe I should leave without modifying these resources. The main purpose of doing this is to remove macros defined in mcbsp.h so that the client drivers don't use it directly.
Is this better to do outside of this set together with a patch that adds these into hwmod database etc?
OMAP1 does not have hwmod database.
-#define AUDIO_MCBSP_DATAWRITE (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1) -#define AUDIO_MCBSP_DATAREAD (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1)
-#define AUDIO_MCBSP OMAP_MCBSP1 -#define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX -#define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX
#else
#define OMAP_MCBSP_REG_DRR2 0x00 @@ -177,13 +136,6 @@ static struct platform_device omap_mcbsp##port_nr = { \ #define OMAP_ST_REG_SFIRCR 0x28 #define OMAP_ST_REG_SSELCR 0x2C
-#define AUDIO_MCBSP_DATAWRITE (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1) -#define AUDIO_MCBSP_DATAREAD (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1)
-#define AUDIO_MCBSP OMAP_MCBSP2 -#define AUDIO_DMA_TX OMAP24XX_DMA_MCBSP2_TX -#define AUDIO_DMA_RX OMAP24XX_DMA_MCBSP2_RX
These looks things that can be removed immediately and independently from this set.
ok.
-- Jarkko
On Mon, 31 Jan 2011 20:20:24 +0530 Kishon Vijay Abraham I kishon@ti.com wrote:
Modify OMAP McBSP driver to use omap hwmod framework and pm runtime APIs.
Created on top of linux OMAP master (linux-omap-2.6 :master) Did digital loopback testing on OMAP4430, OMAP3430 and OMAP2430 SDP boards. Verified that this patch series does not break the OMAP1 build.
Patch series modifies audio layer and hence would appreciate the help of some audio guy to test this series.
Patch series requires the following patch to be present http://permalink.gmane.org/gmane.linux.ports.arm.omap/51132 http://permalink.gmane.org/gmane.linux.ports.arm.omap/51133 http://permalink.gmane.org/gmane.linux.ports.arm.omap/51134
Generally I don't see any major show stopper here in audio point of view after fixing those few minor details. I tested and Beagle plays fine and N810 too with some tweaks (not related to this set).
Mark, Liam: is it ok if the 12/13 goes together with rest of the set via linux-omap when ready?
On Tue, 2011-02-01 at 19:53 +0200, Jarkko Nikula wrote:
On Mon, 31 Jan 2011 20:20:24 +0530 Kishon Vijay Abraham I kishon@ti.com wrote:
Modify OMAP McBSP driver to use omap hwmod framework and pm runtime APIs.
Created on top of linux OMAP master (linux-omap-2.6 :master) Did digital loopback testing on OMAP4430, OMAP3430 and OMAP2430 SDP boards. Verified that this patch series does not break the OMAP1 build.
Patch series modifies audio layer and hence would appreciate the help of some audio guy to test this series.
Patch series requires the following patch to be present http://permalink.gmane.org/gmane.linux.ports.arm.omap/51132 http://permalink.gmane.org/gmane.linux.ports.arm.omap/51133 http://permalink.gmane.org/gmane.linux.ports.arm.omap/51134
Generally I don't see any major show stopper here in audio point of view after fixing those few minor details. I tested and Beagle plays fine and N810 too with some tweaks (not related to this set).
Mark, Liam: is it ok if the 12/13 goes together with rest of the set via linux-omap when ready?
Yep, that should be OK.
Liam
On 02/01/2011 07:53 PM, ext Jarkko Nikula wrote:
On Mon, 31 Jan 2011 20:20:24 +0530 Kishon Vijay Abraham I kishon@ti.com wrote:
Modify OMAP McBSP driver to use omap hwmod framework and pm runtime APIs.
Created on top of linux OMAP master (linux-omap-2.6 :master) Did digital loopback testing on OMAP4430, OMAP3430 and OMAP2430 SDP boards. Verified that this patch series does not break the OMAP1 build.
Patch series modifies audio layer and hence would appreciate the help of some audio guy to test this series.
Patch series requires the following patch to be present http://permalink.gmane.org/gmane.linux.ports.arm.omap/51132 http://permalink.gmane.org/gmane.linux.ports.arm.omap/51133 http://permalink.gmane.org/gmane.linux.ports.arm.omap/51134
Generally I don't see any major show stopper here in audio point of view after fixing those few minor details. I tested and Beagle plays fine and N810 too with some tweaks (not related to this set).
I have not tested the series on HW, but it looks OK for me as well.
All: Acked-by: Peter Ujfalusi peter.ujfalusi@nokia.com
* Mark Brown broonie@opensource.wolfsonmicro.com [110201 13:25]:
On Tue, Feb 01, 2011 at 07:53:26PM +0200, Jarkko Nikula wrote:
Mark, Liam: is it ok if the 12/13 goes together with rest of the set via linux-omap when ready?
I already acked it.
OK assuming the next series is OK I'll queue it. Still need Paul's ack on the hwmod name addition.
Regards,
Tony
Kishon Vijay Abraham I kishon@ti.com writes:
Modify OMAP McBSP driver to use omap hwmod framework and pm runtime APIs.
Created on top of linux OMAP master (linux-omap-2.6 :master) Did digital loopback testing on OMAP4430, OMAP3430 and OMAP2430 SDP boards. Verified that this patch series does not break the OMAP1 build.
Can you also do a basic loopback test on OMAP1? I believe your team now has some OSK boards.
Thanks,
Kevin
Patch series modifies audio layer and hence would appreciate the help of some audio guy to test this series.
Patch series requires the following patch to be present http://permalink.gmane.org/gmane.linux.ports.arm.omap/51132 http://permalink.gmane.org/gmane.linux.ports.arm.omap/51133 http://permalink.gmane.org/gmane.linux.ports.arm.omap/51134
V2:
- Added omap_hwmod_lookup() in the callback to omap_hwmod_for_each_by_class()
to obtain hwmod data for sidetone. Previously this nesting of hwmod APIs was prevented by the use of mutex.
- Added a revision member in hwmod database inorder to facilitate the driver
to differentiate between different OMAP.
Created APIs to pass DMA params from McBSP driver to client drivers
Cleaned up sound soc by removing the use of macros to obtain base address
and DMA channel number and instead use APIs exposed by the driver.
- Removed macros defined in mcbsp driver for data that is obtained from
hwmod database
V1:
- McBSP is designed to use multiple hwmods for a single device when the McBSP
device has sidetone feature.
- To avoid funcionality break of OMAP1 McBSP in between the series
and to keep the patches readable, implementation was done in two steps:
- First modify mcbsp driver to use platform_get* APIs
- then convert it to use hwmod framework for OMAP2+.
- API's like omap_device_noidle() and omap_device_default_idle() is used to
change the SYCONFIG register bits. This change is done to align with the discussion on [2]
Use '.rev' of omap_hwmod class to identify OMAP3 specific settings
Use *ST_* macros for idlest_idle bit
Incorporate other general review comments provided for hwmod adpatation
of other OMAP driver's (eg., do pdata free after a omap_device_build())
- Retain fclk even after pm_runtime adaptation to facilitate switching of
functional clock from one source to another
- Add member 'name' to omap_hwmod_addr_space struct so that the driver need
not rely on the order to get the proper resource [3].
Discussions related to the first RFC patch can be found at [1]
Benoit Cousson (1): OMAP4: hwmod data: Add McBSP
Charulatha V (3): OMAP2420: hwmod data: Add McBSP OMAP2430: hwmod data: Add McBSP OMAP3: hwmod data: Add McBSP
Kishon Vijay Abraham I (9): OMAP: hwmod: Add member 'name' to omap_hwmod_addr_space struct OMAP: McBSP: Convert McBSP to platform device model OMAP3: hwmod: add dev_attr for McBSP sidetone OMAP2+: McBSP: hwmod adaptation for McBSP OMAP: McBSP: use omap_device APIs to modify SYSCONFIG OMAP: McBSP: Add pm runtime support OMAP: McBSP: APIs to pass DMA params from McBSP driver to client drivers ASoC: McBSP: get hw params from McBSP driver OMAP: hwmod: Removal of macros for data that is obtained from hwmod database
arch/arm/mach-omap1/mcbsp.c | 383 +++++++++++++++---- arch/arm/mach-omap2/mcbsp.c | 228 +++--------- arch/arm/mach-omap2/omap_hwmod.c | 1 + arch/arm/mach-omap2/omap_hwmod_2420_data.c | 167 ++++++++ arch/arm/mach-omap2/omap_hwmod_2430_data.c | 417 ++++++++++++++++++++ arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 544 ++++++++++++++++++++++++++ arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 321 +++++++++++++++ arch/arm/mach-omap2/prcm-common.h | 4 + arch/arm/plat-omap/devices.c | 10 +- arch/arm/plat-omap/include/plat/mcbsp.h | 69 +--- arch/arm/plat-omap/include/plat/omap_hwmod.h | 4 +- arch/arm/plat-omap/mcbsp.c | 207 +++++++--- sound/soc/omap/omap-mcbsp.c | 126 +------ 13 files changed, 2006 insertions(+), 475 deletions(-)
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Kishon Vijay Abraham I kishon@ti.com writes:
Modify OMAP McBSP driver to use omap hwmod framework and pm runtime APIs.
Created on top of linux OMAP master (linux-omap-2.6 :master) Did digital loopback testing on OMAP4430, OMAP3430 and OMAP2430 SDP boards. Verified that this patch series does not break the OMAP1 build.
Can you also do some basic PM testing with audio? e.g. does audio still work after suspend/resume what about with CPUidle when retention and/or off are hit during idle?
Kevin
Patch series modifies audio layer and hence would appreciate the help of some audio guy to test this series.
Patch series requires the following patch to be present http://permalink.gmane.org/gmane.linux.ports.arm.omap/51132 http://permalink.gmane.org/gmane.linux.ports.arm.omap/51133 http://permalink.gmane.org/gmane.linux.ports.arm.omap/51134
V2:
- Added omap_hwmod_lookup() in the callback to omap_hwmod_for_each_by_class()
to obtain hwmod data for sidetone. Previously this nesting of hwmod APIs was prevented by the use of mutex.
- Added a revision member in hwmod database inorder to facilitate the driver
to differentiate between different OMAP.
Created APIs to pass DMA params from McBSP driver to client drivers
Cleaned up sound soc by removing the use of macros to obtain base address
and DMA channel number and instead use APIs exposed by the driver.
- Removed macros defined in mcbsp driver for data that is obtained from
hwmod database
V1:
- McBSP is designed to use multiple hwmods for a single device when the McBSP
device has sidetone feature.
- To avoid funcionality break of OMAP1 McBSP in between the series
and to keep the patches readable, implementation was done in two steps:
- First modify mcbsp driver to use platform_get* APIs
- then convert it to use hwmod framework for OMAP2+.
- API's like omap_device_noidle() and omap_device_default_idle() is used to
change the SYCONFIG register bits. This change is done to align with the discussion on [2]
Use '.rev' of omap_hwmod class to identify OMAP3 specific settings
Use *ST_* macros for idlest_idle bit
Incorporate other general review comments provided for hwmod adpatation
of other OMAP driver's (eg., do pdata free after a omap_device_build())
- Retain fclk even after pm_runtime adaptation to facilitate switching of
functional clock from one source to another
- Add member 'name' to omap_hwmod_addr_space struct so that the driver need
not rely on the order to get the proper resource [3].
Discussions related to the first RFC patch can be found at [1]
Benoit Cousson (1): OMAP4: hwmod data: Add McBSP
Charulatha V (3): OMAP2420: hwmod data: Add McBSP OMAP2430: hwmod data: Add McBSP OMAP3: hwmod data: Add McBSP
Kishon Vijay Abraham I (9): OMAP: hwmod: Add member 'name' to omap_hwmod_addr_space struct OMAP: McBSP: Convert McBSP to platform device model OMAP3: hwmod: add dev_attr for McBSP sidetone OMAP2+: McBSP: hwmod adaptation for McBSP OMAP: McBSP: use omap_device APIs to modify SYSCONFIG OMAP: McBSP: Add pm runtime support OMAP: McBSP: APIs to pass DMA params from McBSP driver to client drivers ASoC: McBSP: get hw params from McBSP driver OMAP: hwmod: Removal of macros for data that is obtained from hwmod database
arch/arm/mach-omap1/mcbsp.c | 383 +++++++++++++++---- arch/arm/mach-omap2/mcbsp.c | 228 +++--------- arch/arm/mach-omap2/omap_hwmod.c | 1 + arch/arm/mach-omap2/omap_hwmod_2420_data.c | 167 ++++++++ arch/arm/mach-omap2/omap_hwmod_2430_data.c | 417 ++++++++++++++++++++ arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 544 ++++++++++++++++++++++++++ arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 321 +++++++++++++++ arch/arm/mach-omap2/prcm-common.h | 4 + arch/arm/plat-omap/devices.c | 10 +- arch/arm/plat-omap/include/plat/mcbsp.h | 69 +--- arch/arm/plat-omap/include/plat/omap_hwmod.h | 4 +- arch/arm/plat-omap/mcbsp.c | 207 +++++++--- sound/soc/omap/omap-mcbsp.c | 126 +------ 13 files changed, 2006 insertions(+), 475 deletions(-)
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participants (9)
-
ABRAHAM, KISHON VIJAY -
Cousson, Benoit -
Jarkko Nikula -
Kevin Hilman -
Kishon Vijay Abraham I
-
Liam Girdwood -
Mark Brown -
Peter Ujfalusi -
Tony Lindgren