[alsa-devel] [PATCH 1/3] clk: mxs: clk-imx28: Provide a dummy clock
Sometimes it is useful to be able to pass a dummy clock for a driver.
Add support for a dummy clock.
Cc: Mike Turquette mturquette@linaro.org Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- Documentation/devicetree/bindings/clock/imx28-clock.txt | 1 + drivers/clk/mxs/clk-imx28.c | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/clock/imx28-clock.txt b/Documentation/devicetree/bindings/clock/imx28-clock.txt index e6587af..5a153ef 100644 --- a/Documentation/devicetree/bindings/clock/imx28-clock.txt +++ b/Documentation/devicetree/bindings/clock/imx28-clock.txt @@ -76,6 +76,7 @@ clocks and IDs. usb0_phy 62 usb1_phy 63 enet_out 64 + dummy 65
Examples:
diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c index 4faf0af..6b55211 100644 --- a/drivers/clk/mxs/clk-imx28.c +++ b/drivers/clk/mxs/clk-imx28.c @@ -143,7 +143,7 @@ enum imx28_clk { emi_xtal, lcdif_div, etm_div, ptp, saif0_div, saif1_div, clk32k_div, rtc, lradc, spdif_div, clk32k, pwm, uart, ssp0, ssp1, ssp2, ssp3, gpmi, spdif, emi, saif0, saif1, lcdif, etm, - fec, can0, can1, usb0, usb1, usb0_phy, usb1_phy, enet_out, + fec, can0, can1, usb0, usb1, usb0_phy, usb1_phy, enet_out, dummy, clk_max };
@@ -234,6 +234,7 @@ int __init mx28_clocks_init(void) clks[usb0_phy] = clk_register_gate(NULL, "usb0_phy", "pll0", 0, PLL0CTRL0, 18, 0, &mxs_lock); clks[usb1_phy] = clk_register_gate(NULL, "usb1_phy", "pll1", 0, PLL1CTRL0, 18, 0, &mxs_lock); clks[enet_out] = clk_register_gate(NULL, "enet_out", "pll2", 0, ENET, 18, 0, &mxs_lock); + clks[dummy] = mxs_clk_fixed("dummy", 0);
for (i = 0; i < ARRAY_SIZE(clks); i++) if (IS_ERR(clks[i])) {
Since commit 9e13f345887 (ASoC: sgtl5000: Let the codec acquire its clock) it is necessary to pass a codec clock to the sgtl5000 driver.
Since the saif mclk cannot be passed as a real clock within the clock framework, let's pass a dummy one to the codec driver.
The mxs-saif driver will activate the codec clock.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- arch/arm/boot/dts/imx28-apx4devkit.dts | 2 +- arch/arm/boot/dts/imx28-evk.dts | 2 +- arch/arm/boot/dts/imx28-m28evk.dts | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/imx28-apx4devkit.dts b/arch/arm/boot/dts/imx28-apx4devkit.dts index 43bf3c7..f26bf2f 100644 --- a/arch/arm/boot/dts/imx28-apx4devkit.dts +++ b/arch/arm/boot/dts/imx28-apx4devkit.dts @@ -147,7 +147,7 @@ reg = <0x0a>; VDDA-supply = <®_3p3v>; VDDIO-supply = <®_3p3v>; - + clocks = <&clks 65>; };
pcf8563: rtc@51 { diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts index 3637bf3..28f20b6 100644 --- a/arch/arm/boot/dts/imx28-evk.dts +++ b/arch/arm/boot/dts/imx28-evk.dts @@ -193,7 +193,7 @@ reg = <0x0a>; VDDA-supply = <®_3p3v>; VDDIO-supply = <®_3p3v>; - + clocks = <&clks 65>; };
at24@51 { diff --git a/arch/arm/boot/dts/imx28-m28evk.dts b/arch/arm/boot/dts/imx28-m28evk.dts index 880df2f..a09c5bf 100644 --- a/arch/arm/boot/dts/imx28-m28evk.dts +++ b/arch/arm/boot/dts/imx28-m28evk.dts @@ -184,7 +184,7 @@ reg = <0x0a>; VDDA-supply = <®_3p3v>; VDDIO-supply = <®_3p3v>; - + clocks = <&clks 65>; };
eeprom: eeprom@51 {
On Tue, Jun 25, 2013 at 11:00:00AM -0300, Fabio Estevam wrote:
Since commit 9e13f345887 (ASoC: sgtl5000: Let the codec acquire its clock) it is necessary to pass a codec clock to the sgtl5000 driver.
Since the saif mclk cannot be passed as a real clock within the clock framework, let's pass a dummy one to the codec driver.
Why can not saif driver register the mclk to clock framework?
Shawn
The mxs-saif driver will activate the codec clock.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
In case of I2C error, let's defer the probe.
On mx28, for example, the first read of the codec revision register fails because there is no codec clock provided at this point. The codec clock will be enabled later in the mxs-saif driver, so return -EPROBE_DEFER in case of I2C read error, so that the codec driver can do another attempt at a later stage when the codec clock is available.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- sound/soc/codecs/sgtl5000.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c index d441559..a2dce4a 100644 --- a/sound/soc/codecs/sgtl5000.c +++ b/sound/soc/codecs/sgtl5000.c @@ -1536,9 +1536,12 @@ static int sgtl5000_i2c_probe(struct i2c_client *client,
/* read chip information */ ret = regmap_read(sgtl5000->regmap, SGTL5000_CHIP_ID, ®); - if (ret) + if (ret) { + ret = -EPROBE_DEFER; /* If I2C read failed, try again later */ goto disable_clk;
+ } + if (((reg & SGTL5000_PARTID_MASK) >> SGTL5000_PARTID_SHIFT) != SGTL5000_PARTID_PART_ID) { dev_err(&client->dev,
On Tue, Jun 25, 2013 at 11:00:01AM -0300, Fabio Estevam wrote:
In case of I2C error, let's defer the probe.
On mx28, for example, the first read of the codec revision register fails because there is no codec clock provided at this point. The codec clock will be enabled later in the mxs-saif driver, so return -EPROBE_DEFER in case of I2C read error, so that the codec driver can do another attempt at a later stage when the codec clock is available.
This doesn't seem to match up with the code:
ret = regmap_read(sgtl5000->regmap, SGTL5000_CHIP_ID, ®);
- if (ret)
if (ret) {
ret = -EPROBE_DEFER; /* If I2C read failed, try again later */goto disable_clk;
}
Looking at the label we jump to here it seems like the clock really should be enabled at the point where the register read is attempted...
participants (3)
-
Fabio Estevam -
Mark Brown -
Shawn Guo