[alsa-devel] [PATCH 1/4 v3] pxa2xx-i2s: Proper hw initialization
Make sure we are in a know good state at end of probe : Reset FIFO logic and registers, and make sure REC and RPL functions along with FIFO service are disabled (SACR0_RST enables REC and RPL).
Resetting loses current settings so remove reset from stream startup. Now reset occurs only at probe.
Signed-off-by: Karl Beldan karl.beldan@mobile-devices.fr --- sound/soc/pxa/pxa2xx-i2s.c | 17 ++++++++++++++--- 1 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/sound/soc/pxa/pxa2xx-i2s.c b/sound/soc/pxa/pxa2xx-i2s.c index 2f4b6e4..59cc4f5 100644 --- a/sound/soc/pxa/pxa2xx-i2s.c +++ b/sound/soc/pxa/pxa2xx-i2s.c @@ -106,10 +106,8 @@ static int pxa2xx_i2s_startup(struct snd_pcm_substream *substream, if (IS_ERR(clk_i2s)) return PTR_ERR(clk_i2s);
- if (!cpu_dai->active) { - SACR0 |= SACR0_RST; + if (!cpu_dai->active) SACR0 = 0; - }
return 0; } @@ -346,6 +344,19 @@ static int pxa2xx_i2s_probe(struct platform_device *dev) if (ret != 0) clk_put(clk_i2s);
+ /* + * PXA Developer's Manual: + * If SACR0[ENB] is toggled in the middle of a normal operation, + * the SACR0[RST] bit must also be set and cleared to reset all + * I2S controller registers. + */ + SACR0 = SACR0_RST; + SACR0 = 0; + /* Make sure RPL and REC are disabled */ + SACR1 = SACR1_DRPL | SACR1_DREC; + /* Along with FIFO servicing */ + SAIMR &= ~(SAIMR_RFS | SAIMR_TFS); + return ret; }
Karl Beldan wrote:
Make sure we are in a know good state at end of probe : Reset FIFO logic and registers, and make sure REC and RPL functions along with FIFO service are disabled (SACR0_RST enables REC and RPL).
Resetting loses current settings so remove reset from stream startup. Now reset occurs only at probe.
This differs from what you applied in that it includes 'removal of hw reset from pxa2xx_i2s_startup'. I understood including it in either one (1/4 or 2/4) is ok, since you had not pushed it yet. Otherwise I'll have to post a [PATCH 2/4 v3] including the reset, which would be identical to [PATCH 2/4] (initial version). If I understand correctly from your replies, I should have posted [PATCH 1/4 v2]'s content with [PATCH 1/4 v3]'s Subject.
Thanks,
Karl Beldan wrote:
Karl Beldan wrote:
Make sure we are in a know good state at end of probe : Reset FIFO logic and registers, and make sure REC and RPL functions along with FIFO service are disabled (SACR0_RST enables REC and RPL).
Resetting loses current settings so remove reset from stream startup. Now reset occurs only at probe.
This differs from what you applied in that it includes 'removal of hw reset from pxa2xx_i2s_startup'. I understood including it in either one (1/4 or 2/4) is ok, since you had not pushed it yet. Otherwise I'll have to post a [PATCH 2/4 v3] including the reset, which would be identical to [PATCH 2/4] (initial version).
I meant 'which would be identical to [PATCH 2/4] (initial version) + reset'.
On Thu, May 14, 2009 at 10:25:42AM +0200, Karl Beldan wrote:
@@ -106,10 +106,8 @@ static int pxa2xx_i2s_startup(struct snd_pcm_substream *substream,
Unfortunately your MUA is mangling the patches by word wrapping. I've resolved the problems by hand this once but you might want to take a look at Documentation/email-clients.txt for tips on setting things up.
Anyway, they're all applied now and pass smoke testing here - thanks a lot!
Mark Brown wrote:
On Thu, May 14, 2009 at 10:25:42AM +0200, Karl Beldan wrote:
@@ -106,10 +106,8 @@ static int pxa2xx_i2s_startup(struct snd_pcm_substream *substream,
Unfortunately your MUA is mangling the patches by word wrapping. I've resolved the problems by hand this once but you might want to take a look at Documentation/email-clients.txt for tips on setting things up.
Sorry for that and thanks for your review.
Anyway, they're all applied now and pass smoke testing here - thanks a lot!
Great.
participants (2)
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Karl Beldan -
Mark Brown