[alsa-devel] [PATCH 0/2] ASoC: Mediatek: MT8183: support both S32_LE and S24_LE
This patch adds support both S32_LE and S24_LE. The patch is based on broonie tree "for-next" branch.
Shunli Wang (2): ASoC: Mediatek: add memory interface data align ASoC: Mediatek: MT8183: set data align
sound/soc/mediatek/common/mtk-afe-fe-dai.c | 7 +++++++ sound/soc/mediatek/common/mtk-base-afe.h | 2 ++ sound/soc/mediatek/mt8183/mt8183-afe-pcm.c | 18 ++++++++++++++++++ 3 files changed, 27 insertions(+)
This supports two data align settings. One is S32_LE and other is S24_LE.
Signed-off-by: Shunli Wang shunli.wang@mediatek.com --- sound/soc/mediatek/common/mtk-afe-fe-dai.c | 7 +++++++ sound/soc/mediatek/common/mtk-base-afe.h | 2 ++ 2 files changed, 9 insertions(+)
diff --git a/sound/soc/mediatek/common/mtk-afe-fe-dai.c b/sound/soc/mediatek/common/mtk-afe-fe-dai.c index fded11d14cde..19048c3dc324 100644 --- a/sound/soc/mediatek/common/mtk-afe-fe-dai.c +++ b/sound/soc/mediatek/common/mtk-afe-fe-dai.c @@ -241,6 +241,7 @@ int mtk_afe_fe_prepare(struct snd_pcm_substream *substream, struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); struct mtk_base_afe_memif *memif = &afe->memif[rtd->cpu_dai->id]; int hd_audio = 0; + int hd_align = 1;
/* set hd mode */ switch (substream->runtime->format) { @@ -249,9 +250,11 @@ int mtk_afe_fe_prepare(struct snd_pcm_substream *substream, break; case SNDRV_PCM_FORMAT_S32_LE: hd_audio = 1; + hd_align = 1; break; case SNDRV_PCM_FORMAT_S24_LE: hd_audio = 1; + hd_align = 0; break; default: dev_err(afe->dev, "%s() error: unsupported format %d\n", @@ -262,6 +265,10 @@ int mtk_afe_fe_prepare(struct snd_pcm_substream *substream, mtk_regmap_update_bits(afe->regmap, memif->data->hd_reg, 1, hd_audio, memif->data->hd_shift);
+ mtk_regmap_update_bits(afe->regmap, memif->data->hd_align_reg, + memif->data->hd_align_mshift, + hd_align ? memif->data->hd_align_mshift : 0); + return 0; } EXPORT_SYMBOL_GPL(mtk_afe_fe_prepare); diff --git a/sound/soc/mediatek/common/mtk-base-afe.h b/sound/soc/mediatek/common/mtk-base-afe.h index bd8d5e0c6843..60cb609a9790 100644 --- a/sound/soc/mediatek/common/mtk-base-afe.h +++ b/sound/soc/mediatek/common/mtk-base-afe.h @@ -24,7 +24,9 @@ struct mtk_base_memif_data { int enable_reg; int enable_shift; int hd_reg; + int hd_align_reg; int hd_shift; + int hd_align_mshift; int msb_reg; int msb_shift; int agent_disable_reg;
The patch
ASoC: Mediatek: add memory interface data align
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.3
All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying to this mail.
Thanks, Mark
From 1628fc3f47717fc3c8d9cd5fd6c7bc7d3796927d Mon Sep 17 00:00:00 2001
From: Shunli Wang shunli.wang@mediatek.com Date: Thu, 16 May 2019 17:54:37 +0800 Subject: [PATCH] ASoC: Mediatek: add memory interface data align
This supports two data align settings. One is S32_LE and other is S24_LE.
Signed-off-by: Shunli Wang shunli.wang@mediatek.com Signed-off-by: Mark Brown broonie@kernel.org --- sound/soc/mediatek/common/mtk-afe-fe-dai.c | 7 +++++++ sound/soc/mediatek/common/mtk-base-afe.h | 2 ++ 2 files changed, 9 insertions(+)
diff --git a/sound/soc/mediatek/common/mtk-afe-fe-dai.c b/sound/soc/mediatek/common/mtk-afe-fe-dai.c index fded11d14cde..19048c3dc324 100644 --- a/sound/soc/mediatek/common/mtk-afe-fe-dai.c +++ b/sound/soc/mediatek/common/mtk-afe-fe-dai.c @@ -241,6 +241,7 @@ int mtk_afe_fe_prepare(struct snd_pcm_substream *substream, struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); struct mtk_base_afe_memif *memif = &afe->memif[rtd->cpu_dai->id]; int hd_audio = 0; + int hd_align = 1;
/* set hd mode */ switch (substream->runtime->format) { @@ -249,9 +250,11 @@ int mtk_afe_fe_prepare(struct snd_pcm_substream *substream, break; case SNDRV_PCM_FORMAT_S32_LE: hd_audio = 1; + hd_align = 1; break; case SNDRV_PCM_FORMAT_S24_LE: hd_audio = 1; + hd_align = 0; break; default: dev_err(afe->dev, "%s() error: unsupported format %d\n", @@ -262,6 +265,10 @@ int mtk_afe_fe_prepare(struct snd_pcm_substream *substream, mtk_regmap_update_bits(afe->regmap, memif->data->hd_reg, 1, hd_audio, memif->data->hd_shift);
+ mtk_regmap_update_bits(afe->regmap, memif->data->hd_align_reg, + memif->data->hd_align_mshift, + hd_align ? memif->data->hd_align_mshift : 0); + return 0; } EXPORT_SYMBOL_GPL(mtk_afe_fe_prepare); diff --git a/sound/soc/mediatek/common/mtk-base-afe.h b/sound/soc/mediatek/common/mtk-base-afe.h index bd8d5e0c6843..60cb609a9790 100644 --- a/sound/soc/mediatek/common/mtk-base-afe.h +++ b/sound/soc/mediatek/common/mtk-base-afe.h @@ -24,7 +24,9 @@ struct mtk_base_memif_data { int enable_reg; int enable_shift; int hd_reg; + int hd_align_reg; int hd_shift; + int hd_align_mshift; int msb_reg; int msb_shift; int agent_disable_reg;
This patch sets register and bit information about data align for every memory interface.
Signed-off-by: Shunli Wang shunli.wang@mediatek.com --- sound/soc/mediatek/mt8183/mt8183-afe-pcm.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c b/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c index 1bc0fafe5e29..ab2bce1d9b3d 100644 --- a/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c +++ b/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c @@ -437,7 +437,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = AFE_DAC_CON0, .enable_shift = DL1_ON_SFT, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = DL1_HD_SFT, + .hd_align_mshift = DL1_HD_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -456,7 +458,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = AFE_DAC_CON0, .enable_shift = DL2_ON_SFT, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = DL2_HD_SFT, + .hd_align_mshift = DL2_HD_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -475,7 +479,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = AFE_DAC_CON0, .enable_shift = DL3_ON_SFT, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = DL3_HD_SFT, + .hd_align_mshift = DL3_HD_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -494,7 +500,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = AFE_DAC_CON0, .enable_shift = VUL2_ON_SFT, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = VUL2_HD_SFT, + .hd_align_mshift = VUL2_HD_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -513,7 +521,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = AFE_DAC_CON0, .enable_shift = AWB_ON_SFT, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = AWB_HD_SFT, + .hd_align_mshift = AWB_HD_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -532,7 +542,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = AFE_DAC_CON0, .enable_shift = AWB2_ON_SFT, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = AWB2_HD_SFT, + .hd_align_mshift = AWB2_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -551,7 +563,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = AFE_DAC_CON0, .enable_shift = VUL12_ON_SFT, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = VUL12_HD_SFT, + .hd_align_mshift = VUL12_HD_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -570,7 +584,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = AFE_DAC_CON0, .enable_shift = MOD_DAI_ON_SFT, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = MOD_DAI_HD_SFT, + .hd_align_mshift = MOD_DAI_HD_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -589,7 +605,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = -1, /* control in tdm for sync start */ .enable_shift = -1, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = HDMI_HD_SFT, + .hd_align_mshift = HDMI_HD_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1,
The patch
ASoC: Mediatek: MT8183: set data align
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.3
All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying to this mail.
Thanks, Mark
From cf61f5b01531a2b64b875894fa97aa891d39e871 Mon Sep 17 00:00:00 2001
From: Shunli Wang shunli.wang@mediatek.com Date: Thu, 16 May 2019 17:54:38 +0800 Subject: [PATCH] ASoC: Mediatek: MT8183: set data align
This patch sets register and bit information about data align for every memory interface.
Signed-off-by: Shunli Wang shunli.wang@mediatek.com Signed-off-by: Mark Brown broonie@kernel.org --- sound/soc/mediatek/mt8183/mt8183-afe-pcm.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c b/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c index 1bc0fafe5e29..ab2bce1d9b3d 100644 --- a/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c +++ b/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c @@ -437,7 +437,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = AFE_DAC_CON0, .enable_shift = DL1_ON_SFT, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = DL1_HD_SFT, + .hd_align_mshift = DL1_HD_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -456,7 +458,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = AFE_DAC_CON0, .enable_shift = DL2_ON_SFT, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = DL2_HD_SFT, + .hd_align_mshift = DL2_HD_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -475,7 +479,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = AFE_DAC_CON0, .enable_shift = DL3_ON_SFT, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = DL3_HD_SFT, + .hd_align_mshift = DL3_HD_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -494,7 +500,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = AFE_DAC_CON0, .enable_shift = VUL2_ON_SFT, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = VUL2_HD_SFT, + .hd_align_mshift = VUL2_HD_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -513,7 +521,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = AFE_DAC_CON0, .enable_shift = AWB_ON_SFT, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = AWB_HD_SFT, + .hd_align_mshift = AWB_HD_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -532,7 +542,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = AFE_DAC_CON0, .enable_shift = AWB2_ON_SFT, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = AWB2_HD_SFT, + .hd_align_mshift = AWB2_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -551,7 +563,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = AFE_DAC_CON0, .enable_shift = VUL12_ON_SFT, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = VUL12_HD_SFT, + .hd_align_mshift = VUL12_HD_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -570,7 +584,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = AFE_DAC_CON0, .enable_shift = MOD_DAI_ON_SFT, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = MOD_DAI_HD_SFT, + .hd_align_mshift = MOD_DAI_HD_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1, @@ -589,7 +605,9 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { .enable_reg = -1, /* control in tdm for sync start */ .enable_shift = -1, .hd_reg = AFE_MEMIF_HD_MODE, + .hd_align_reg = AFE_MEMIF_HDALIGN, .hd_shift = HDMI_HD_SFT, + .hd_align_mshift = HDMI_HD_ALIGN_MASK_SFT, .agent_disable_reg = -1, .agent_disable_shift = -1, .msb_reg = -1,
participants (2)
-
Mark Brown -
Shunli Wang