[alsa-devel] [PATCH 0/2] ASoC: codec: wm8960: Relax bit clock computation when using PLL
This is a follow up of commit 3c01b9ee2ab ("ASoC: codec: wm8960: Relax bit clock computation") where we relaxed bitclk when sysclk was derived from MCLK.
Now, we do the same thing for sysclk derived using PLL.
Daniel Baluta (2): ASoC: codec: wm9860: Refactor PLL out freq search ASoC: codec: wm8960: Relax bit clock computation when using PLL
sound/soc/codecs/wm8960.c | 105 +++++++++++++++++++++++++++++++++------------- 1 file changed, 76 insertions(+), 29 deletions(-)
Add a separate function for deriving (sysclk, lrclk, bclk) when the clock is auto or pll.
Signed-off-by: Daniel Baluta daniel.baluta@nxp.com --- sound/soc/codecs/wm8960.c | 93 ++++++++++++++++++++++++++++++++--------------- 1 file changed, 64 insertions(+), 29 deletions(-)
diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c index ce159f1..36c8454 100644 --- a/sound/soc/codecs/wm8960.c +++ b/sound/soc/codecs/wm8960.c @@ -672,10 +672,70 @@ int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk, return *bclk_idx; }
+/** + * wm8960_configure_pll - checks if there is a PLL out frequency available + * The PLL out frequency must be chosen such that: + * - sysclk = lrclk * dac_divs + * - freq_out = sysclk * sysclk_divs + * - 10 * sysclk = bclk * bclk_divs + * + * @codec: codec structure + * @freq_in: input frequency used to derive freq out via PLL + * @sysclk_idx: sysclk_divs index for found sysclk + * @dac_idx: dac_divs index for found lrclk + * @bclk_idx: bclk_divs index for found bclk + * + * Returns: + * -1, in case no PLL frequency out available was found + * >=0, in case we could derive bclk, lrclk, sysclk from PLL out using + * (@sysclk_idx, @dac_idx, @bclk_idx) dividers + */ +static +int wm8960_configure_pll(struct snd_soc_codec *codec, int freq_in, + int *sysclk_idx, int *dac_idx, int *bclk_idx) +{ + struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); + int sysclk, bclk, lrclk, freq_out; + int diff, best_freq_out; + int i, j, k; + + bclk = wm8960->bclk; + lrclk = wm8960->lrclk; + + *bclk_idx = -1; + + for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) { + if (sysclk_divs[i] == -1) + continue; + for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) { + sysclk = lrclk * dac_divs[j]; + freq_out = sysclk * sysclk_divs[i]; + + for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) { + if (!is_pll_freq_available(freq_in, freq_out)) + continue; + + diff = sysclk - bclk * bclk_divs[k] / 10; + if (diff == 0) { + *sysclk_idx = i; + *dac_idx = j; + *bclk_idx = k; + best_freq_out = freq_out; + break; + } + } + } + } + + if (*bclk_idx != -1) + wm8960_set_pll(codec, freq_in, best_freq_out); + + return *bclk_idx; +} static int wm8960_configure_clocking(struct snd_soc_codec *codec) { struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); - int sysclk, bclk, lrclk, freq_out, freq_in; + int freq_out, freq_in; u16 iface1 = snd_soc_read(codec, WM8960_IFACE1); int i, j, k; int ret; @@ -692,8 +752,6 @@ static int wm8960_configure_clocking(struct snd_soc_codec *codec) }
freq_in = wm8960->freq_in; - bclk = wm8960->bclk; - lrclk = wm8960->lrclk; /* * If it's sysclk auto mode, check if the MCLK can provide sysclk or * not. If MCLK can provide sysclk, using MCLK to provide sysclk @@ -720,33 +778,10 @@ static int wm8960_configure_clocking(struct snd_soc_codec *codec) return -EINVAL; } } - /* get a available pll out frequency and set pll */ - for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) { - if (sysclk_divs[i] == -1) - continue; - for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) { - sysclk = lrclk * dac_divs[j]; - freq_out = sysclk * sysclk_divs[i]; - - for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) { - if (sysclk == bclk * bclk_divs[k] / 10 && - is_pll_freq_available(freq_in, freq_out)) { - wm8960_set_pll(codec, - freq_in, freq_out); - break; - } else { - continue; - } - } - if (k != ARRAY_SIZE(bclk_divs)) - break; - } - if (j != ARRAY_SIZE(dac_divs)) - break; - }
- if (i == ARRAY_SIZE(sysclk_divs)) { - dev_err(codec->dev, "failed to configure clock\n"); + ret = wm8960_configure_pll(codec, freq_in, &i, &j, &k); + if (ret < 0) { + dev_err(codec->dev, "failed to configure clock via PLL\n"); return -EINVAL; }
On Tue, Apr 04, 2017 at 07:45:13PM +0300, Daniel Baluta wrote:
Add a separate function for deriving (sysclk, lrclk, bclk) when the clock is auto or pll.
Signed-off-by: Daniel Baluta daniel.baluta@nxp.com
Acked-by: Charles Keepax ckeepax@opensource.wolfsonmicro.com
Thanks, Charles
On Tue, Apr 4, 2017 at 7:45 PM, Daniel Baluta daniel.baluta@nxp.com wrote:
Add a separate function for deriving (sysclk, lrclk, bclk) when the clock is auto or pll.
Signed-off-by: Daniel Baluta daniel.baluta@nxp.com
Just noticed this warnings:
sound/soc/codecs/wm8960.c:743:3: warning: 'best_freq_out' may be used uninitialized in this function [-Wmaybe-uninitialized] wm8960_set_pll(codec, freq_in, best_freq_out); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ sound/soc/codecs/wm8960.c:703:21: note: 'best_freq_out' was declared here int diff, closest, best_freq_out; ^~~~~~~~~~~~~ sound/soc/codecs/wm8960.c:806:46: warning: 'j' may be used uninitialized in this function [-Wmaybe-uninitialized] snd_soc_update_bits(codec, WM8960_CLOCK1, 0x7 << 6, j << 6); ~~^~~~ sound/soc/codecs/wm8960.c:802:44: warning: 'i' may be used uninitialized in this function [-Wmaybe-uninitialized] snd_soc_update_bits(codec, WM8960_CLOCK1, 3 << 1, i << 1);
There is no way I can end up with these variable uninitialized. Will look more close and resend.
Thanks Charles for review.
The patch
ASoC: codec: wm9860: Refactor PLL out freq search
has been applied to the asoc tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying to this mail.
Thanks, Mark
From 84fdc00d519ffdf8ae6e34d7841bcc6f38928953 Mon Sep 17 00:00:00 2001
From: Daniel Baluta daniel.baluta@nxp.com Date: Tue, 4 Apr 2017 19:45:13 +0300 Subject: [PATCH] ASoC: codec: wm9860: Refactor PLL out freq search
Add a separate function for deriving (sysclk, lrclk, bclk) when the clock is auto or pll.
Signed-off-by: Daniel Baluta daniel.baluta@nxp.com Acked-by: Charles Keepax ckeepax@opensource.wolfsonmicro.com Signed-off-by: Mark Brown broonie@kernel.org --- sound/soc/codecs/wm8960.c | 93 ++++++++++++++++++++++++++++++++--------------- 1 file changed, 64 insertions(+), 29 deletions(-)
diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c index ce159f13e7a4..36c84549da23 100644 --- a/sound/soc/codecs/wm8960.c +++ b/sound/soc/codecs/wm8960.c @@ -672,10 +672,70 @@ int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk, return *bclk_idx; }
+/** + * wm8960_configure_pll - checks if there is a PLL out frequency available + * The PLL out frequency must be chosen such that: + * - sysclk = lrclk * dac_divs + * - freq_out = sysclk * sysclk_divs + * - 10 * sysclk = bclk * bclk_divs + * + * @codec: codec structure + * @freq_in: input frequency used to derive freq out via PLL + * @sysclk_idx: sysclk_divs index for found sysclk + * @dac_idx: dac_divs index for found lrclk + * @bclk_idx: bclk_divs index for found bclk + * + * Returns: + * -1, in case no PLL frequency out available was found + * >=0, in case we could derive bclk, lrclk, sysclk from PLL out using + * (@sysclk_idx, @dac_idx, @bclk_idx) dividers + */ +static +int wm8960_configure_pll(struct snd_soc_codec *codec, int freq_in, + int *sysclk_idx, int *dac_idx, int *bclk_idx) +{ + struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); + int sysclk, bclk, lrclk, freq_out; + int diff, best_freq_out; + int i, j, k; + + bclk = wm8960->bclk; + lrclk = wm8960->lrclk; + + *bclk_idx = -1; + + for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) { + if (sysclk_divs[i] == -1) + continue; + for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) { + sysclk = lrclk * dac_divs[j]; + freq_out = sysclk * sysclk_divs[i]; + + for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) { + if (!is_pll_freq_available(freq_in, freq_out)) + continue; + + diff = sysclk - bclk * bclk_divs[k] / 10; + if (diff == 0) { + *sysclk_idx = i; + *dac_idx = j; + *bclk_idx = k; + best_freq_out = freq_out; + break; + } + } + } + } + + if (*bclk_idx != -1) + wm8960_set_pll(codec, freq_in, best_freq_out); + + return *bclk_idx; +} static int wm8960_configure_clocking(struct snd_soc_codec *codec) { struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); - int sysclk, bclk, lrclk, freq_out, freq_in; + int freq_out, freq_in; u16 iface1 = snd_soc_read(codec, WM8960_IFACE1); int i, j, k; int ret; @@ -692,8 +752,6 @@ static int wm8960_configure_clocking(struct snd_soc_codec *codec) }
freq_in = wm8960->freq_in; - bclk = wm8960->bclk; - lrclk = wm8960->lrclk; /* * If it's sysclk auto mode, check if the MCLK can provide sysclk or * not. If MCLK can provide sysclk, using MCLK to provide sysclk @@ -720,33 +778,10 @@ static int wm8960_configure_clocking(struct snd_soc_codec *codec) return -EINVAL; } } - /* get a available pll out frequency and set pll */ - for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) { - if (sysclk_divs[i] == -1) - continue; - for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) { - sysclk = lrclk * dac_divs[j]; - freq_out = sysclk * sysclk_divs[i]; - - for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) { - if (sysclk == bclk * bclk_divs[k] / 10 && - is_pll_freq_available(freq_in, freq_out)) { - wm8960_set_pll(codec, - freq_in, freq_out); - break; - } else { - continue; - } - } - if (k != ARRAY_SIZE(bclk_divs)) - break; - } - if (j != ARRAY_SIZE(dac_divs)) - break; - }
- if (i == ARRAY_SIZE(sysclk_divs)) { - dev_err(codec->dev, "failed to configure clock\n"); + ret = wm8960_configure_pll(codec, freq_in, &i, &j, &k); + if (ret < 0) { + dev_err(codec->dev, "failed to configure clock via PLL\n"); return -EINVAL; }
Bitclk is derived from sysclk using bclk_divs. Sysclk can be derived in two ways: (1) directly from MLCK (2) MCLK via PLL
Commit 3c01b9ee2ab9d0d ("ASoC: codec: wm8960: Relax bit clock computation") relaxed bitclk computation when sysclk is directly derived from MCLK.
Lets do the same thing when sysclk is derived via PLL.
Signed-off-by: Daniel Baluta daniel.baluta@nxp.com --- sound/soc/codecs/wm8960.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c index 36c8454..e8cb764 100644 --- a/sound/soc/codecs/wm8960.c +++ b/sound/soc/codecs/wm8960.c @@ -679,6 +679,10 @@ int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk, * - freq_out = sysclk * sysclk_divs * - 10 * sysclk = bclk * bclk_divs * + * If we cannot find an exact match for (sysclk, lrclk, bclk) + * triplet, we relax the bclk such that bclk is chosen as the + * closest available frequency greater than expected bclk. + * * @codec: codec structure * @freq_in: input frequency used to derive freq out via PLL * @sysclk_idx: sysclk_divs index for found sysclk @@ -696,11 +700,12 @@ int wm8960_configure_pll(struct snd_soc_codec *codec, int freq_in, { struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); int sysclk, bclk, lrclk, freq_out; - int diff, best_freq_out; + int diff, closest, best_freq_out; int i, j, k;
bclk = wm8960->bclk; lrclk = wm8960->lrclk; + closest = freq_in;
*bclk_idx = -1;
@@ -723,6 +728,13 @@ int wm8960_configure_pll(struct snd_soc_codec *codec, int freq_in, best_freq_out = freq_out; break; } + if (diff > 0 && closest > diff) { + *sysclk_idx = i; + *dac_idx = j; + *bclk_idx = k; + closest = diff; + best_freq_out = freq_out; + } } } }
On Tue, Apr 04, 2017 at 07:45:14PM +0300, Daniel Baluta wrote:
Bitclk is derived from sysclk using bclk_divs. Sysclk can be derived in two ways: (1) directly from MLCK (2) MCLK via PLL
Commit 3c01b9ee2ab9d0d ("ASoC: codec: wm8960: Relax bit clock computation") relaxed bitclk computation when sysclk is directly derived from MCLK.
Lets do the same thing when sysclk is derived via PLL.
Signed-off-by: Daniel Baluta daniel.baluta@nxp.com
Acked-by: Charles Keepax ckeepax@opensource.wolfsonmicro.com
Thanks, Charles
Hi Daniel,
[auto build test WARNING on asoc/for-next] [also build test WARNING on next-20170405] [cannot apply to v4.11-rc5] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Daniel-Baluta/ASoC-codec-wm8960-Rel... base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next config: i386-randconfig-s0-201714 (attached as .config) compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901 reproduce: # save the attached .config to linux build tree make ARCH=i386
Note: it may well be a FALSE warning. FWIW you are at least aware of it now. http://gcc.gnu.org/wiki/Better_Uninitialized_Warnings
All warnings (new ones prefixed by >>):
sound/soc/codecs/wm8960.c: In function 'wm8960_configure_clocking':
sound/soc/codecs/wm8960.c:743:3: warning: 'best_freq_out' may be used uninitialized in this function [-Wmaybe-uninitialized]
wm8960_set_pll(codec, freq_in, best_freq_out); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ sound/soc/codecs/wm8960.c:703:21: note: 'best_freq_out' was declared here int diff, closest, best_freq_out; ^~~~~~~~~~~~~ sound/soc/codecs/wm8960.c:806:56: warning: 'j' may be used uninitialized in this function [-Wmaybe-uninitialized] snd_soc_update_bits(codec, WM8960_CLOCK1, 0x7 << 6, j << 6); ~~^~~~ sound/soc/codecs/wm8960.c:802:54: warning: 'i' may be used uninitialized in this function [-Wmaybe-uninitialized] snd_soc_update_bits(codec, WM8960_CLOCK1, 3 << 1, i << 1); ~~^~~~
vim +/best_freq_out +743 sound/soc/codecs/wm8960.c
6b662dee Daniel Baluta 2017-04-04 727 *bclk_idx = k; 6b662dee Daniel Baluta 2017-04-04 728 best_freq_out = freq_out; 6b662dee Daniel Baluta 2017-04-04 729 break; 6b662dee Daniel Baluta 2017-04-04 730 } 16c42f46 Daniel Baluta 2017-04-04 731 if (diff > 0 && closest > diff) { 16c42f46 Daniel Baluta 2017-04-04 732 *sysclk_idx = i; 16c42f46 Daniel Baluta 2017-04-04 733 *dac_idx = j; 16c42f46 Daniel Baluta 2017-04-04 734 *bclk_idx = k; 16c42f46 Daniel Baluta 2017-04-04 735 closest = diff; 16c42f46 Daniel Baluta 2017-04-04 736 best_freq_out = freq_out; 16c42f46 Daniel Baluta 2017-04-04 737 } 6b662dee Daniel Baluta 2017-04-04 738 } 6b662dee Daniel Baluta 2017-04-04 739 } 6b662dee Daniel Baluta 2017-04-04 740 } 6b662dee Daniel Baluta 2017-04-04 741 6b662dee Daniel Baluta 2017-04-04 742 if (*bclk_idx != -1) 6b662dee Daniel Baluta 2017-04-04 @743 wm8960_set_pll(codec, freq_in, best_freq_out); 6b662dee Daniel Baluta 2017-04-04 744 6b662dee Daniel Baluta 2017-04-04 745 return *bclk_idx; 6b662dee Daniel Baluta 2017-04-04 746 } 3176bf2d Zidan Wang 2015-08-11 747 static int wm8960_configure_clocking(struct snd_soc_codec *codec) 0e50b51a Zidan Wang 2015-05-12 748 { 0e50b51a Zidan Wang 2015-05-12 749 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); 6b662dee Daniel Baluta 2017-04-04 750 int freq_out, freq_in; 0e50b51a Zidan Wang 2015-05-12 751 u16 iface1 = snd_soc_read(codec, WM8960_IFACE1);
:::::: The code at line 743 was first introduced by commit :::::: 6b662deec0da0ad4f9dce8112d01828ed72b5a4c ASoC: codec: wm9860: Refactor PLL out freq search
:::::: TO: Daniel Baluta daniel.baluta@nxp.com :::::: CC: 0day robot fengguang.wu@intel.com
--- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
participants (5)
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Charles Keepax -
Daniel Baluta -
Daniel Baluta -
kbuild test robot -
Mark Brown