[alsa-devel] [PATCH v3 0/7] Allwinner H6 SPDIF support
*H6 DMA support IS REQUIRED*
Allwinner H6 SoC has a SPDIF controller called One Wire Audio (OWA) which is different from the previous H3 generation and not compatible.
Difference are an increase of fifo sizes, some memory mapping are different and there is now the possibility to output the master clock on a pin.
Actually all these features are unused and only a bit for flushing the TX fifo is required.
Also this series requires the DMA working on H6, a first version has been submitted by Jernej Škrabec[1] but has not been accepted yet.
[1] https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=89011
Changes since v2: - Split quirks and H6 support patch - Add specific section for quirks comment
Changes since v1: - Remove H3 compatible - Add TX fifo bit flush quirks - Add H6 bindings in SPDIF driver
Clément Péron (7): dt-bindings: sound: sun4i-spdif: Add Allwinner H6 compatible ASoC: sun4i-spdif: Move quirks to the top ASoC: sun4i-spdif: Add TX fifo bit flush quirks ASoC: sun4i-spdif: Add support for H6 SoC arm64: dts: allwinner: Add SPDIF node for Allwinner H6 arm64: dts: allwinner: h6: Enable SPDIF for Beelink GS1 arm64: defconfig: Enable Sun4i SPDIF module
.../bindings/sound/sunxi,sun4i-spdif.txt | 3 +- .../dts/allwinner/sun50i-h6-beelink-gs1.dts | 4 ++ arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 38 ++++++++++++++ arch/arm64/configs/defconfig | 1 + sound/soc/sunxi/sun4i-spdif.c | 49 ++++++++++++++++--- 5 files changed, 88 insertions(+), 7 deletions(-)
Allwinner H6 has a SPDIF controller with an increase of the fifo size and a sligher difference in memory mapping compare to H3/A64.
This make it not compatible with the previous generation.
Introduce a specific bindings for H6 SoC.
Signed-off-by: Clément Péron peron.clem@gmail.com Reviewed-by: Rob Herring robh@kernel.org Acked-by: Maxime Ripard maxime.ripard@bootlin.com --- Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt b/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt index 0c64a209c2e9..c0fbb50a4df9 100644 --- a/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt +++ b/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt @@ -7,10 +7,11 @@ For now only playback is supported.
Required properties:
- - compatible : should be one of the following: + - compatible : Should be one of the following: - "allwinner,sun4i-a10-spdif": for the Allwinner A10 SoC - "allwinner,sun6i-a31-spdif": for the Allwinner A31 SoC - "allwinner,sun8i-h3-spdif": for the Allwinner H3 SoC + - "allwinner,sun50i-h6-spdif": for the allwinner H6 SoC
- reg : Offset and length of the register set for the device.
On Sat, May 25, 2019 at 06:23:17PM +0200, Clément Péron wrote:
Allwinner H6 has a SPDIF controller with an increase of the fifo size and a sligher difference in memory mapping compare to H3/A64.
This make it not compatible with the previous generation.
Introduce a specific bindings for H6 SoC.
Signed-off-by: Clément Péron peron.clem@gmail.com Reviewed-by: Rob Herring robh@kernel.org Acked-by: Maxime Ripard maxime.ripard@bootlin.com
Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt b/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt index 0c64a209c2e9..c0fbb50a4df9 100644 --- a/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt +++ b/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt @@ -7,10 +7,11 @@ For now only playback is supported.
Required properties:
- compatible : should be one of the following:
- compatible : Should be one of the following:
- "allwinner,sun4i-a10-spdif": for the Allwinner A10 SoC
- "allwinner,sun6i-a31-spdif": for the Allwinner A31 SoC
- "allwinner,sun8i-h3-spdif": for the Allwinner H3 SoC
- "allwinner,sun50i-h6-spdif": for the allwinner H6 SoC
This won't apply anymore on top of next, we've moved to a YAML schemas.
Maxime
-- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
Hi Maxime,
On Sun, 26 May 2019 at 20:22, Maxime Ripard maxime.ripard@bootlin.com wrote:
On Sat, May 25, 2019 at 06:23:17PM +0200, Clément Péron wrote:
Allwinner H6 has a SPDIF controller with an increase of the fifo size and a sligher difference in memory mapping compare to H3/A64.
This make it not compatible with the previous generation.
Introduce a specific bindings for H6 SoC.
Signed-off-by: Clément Péron peron.clem@gmail.com Reviewed-by: Rob Herring robh@kernel.org Acked-by: Maxime Ripard maxime.ripard@bootlin.com
Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt b/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt index 0c64a209c2e9..c0fbb50a4df9 100644 --- a/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt +++ b/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt @@ -7,10 +7,11 @@ For now only playback is supported.
Required properties:
- compatible : should be one of the following:
- compatible : Should be one of the following:
- "allwinner,sun4i-a10-spdif": for the Allwinner A10 SoC
- "allwinner,sun6i-a31-spdif": for the Allwinner A31 SoC
- "allwinner,sun8i-h3-spdif": for the Allwinner H3 SoC
- "allwinner,sun50i-h6-spdif": for the allwinner H6 SoC
This won't apply anymore on top of next, we've moved to a YAML schemas.
Indeed I have based this series on sunxi instead of sound. Thanks for pointing out that. Clément
Maxime
-- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
The quirks are actually defines in the middle of the file with short explanation.
Move this at the top and add a section to have coherency with sun4i-i2s.
Signed-off-by: Clément Péron peron.clem@gmail.com --- sound/soc/sunxi/sun4i-spdif.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/sound/soc/sunxi/sun4i-spdif.c b/sound/soc/sunxi/sun4i-spdif.c index b4af4aabead1..b6c66a62e915 100644 --- a/sound/soc/sunxi/sun4i-spdif.c +++ b/sound/soc/sunxi/sun4i-spdif.c @@ -161,6 +161,17 @@ #define SUN4I_SPDIF_SAMFREQ_176_4KHZ 0xc #define SUN4I_SPDIF_SAMFREQ_192KHZ 0xe
+/** + * struct sun4i_spdif_quirks - Differences between SoC variants. + * + * @reg_dac_tx_data: TX FIFO offset for DMA config. + * @has_reset: SoC needs reset deasserted. + */ +struct sun4i_spdif_quirks { + unsigned int reg_dac_txdata; + bool has_reset; +}; + struct sun4i_spdif_dev { struct platform_device *pdev; struct clk *spdif_clk; @@ -405,11 +416,6 @@ static struct snd_soc_dai_driver sun4i_spdif_dai = { .name = "spdif", };
-struct sun4i_spdif_quirks { - unsigned int reg_dac_txdata; /* TX FIFO offset for DMA config */ - bool has_reset; -}; - static const struct sun4i_spdif_quirks sun4i_a10_spdif_quirks = { .reg_dac_txdata = SUN4I_SPDIF_TXFIFO, };
On Sat, May 25, 2019 at 06:23:18PM +0200, Clément Péron wrote:
The quirks are actually defines in the middle of the file with short explanation.
Move this at the top and add a section to have coherency with sun4i-i2s.
Signed-off-by: Clément Péron peron.clem@gmail.com
Acked-by: Maxime Ripard maxime.ripard@bootlin.com
Maxime
-- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
Allwinner H6 has a different bit to flush the TX FIFO.
Add a quirks to prepare introduction of H6 SoC.
Signed-off-by: Clément Péron peron.clem@gmail.com --- sound/soc/sunxi/sun4i-spdif.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/sound/soc/sunxi/sun4i-spdif.c b/sound/soc/sunxi/sun4i-spdif.c index b6c66a62e915..8317bbee0712 100644 --- a/sound/soc/sunxi/sun4i-spdif.c +++ b/sound/soc/sunxi/sun4i-spdif.c @@ -166,10 +166,12 @@ * * @reg_dac_tx_data: TX FIFO offset for DMA config. * @has_reset: SoC needs reset deasserted. + * @reg_fctl_ftx: TX FIFO flush bitmask. */ struct sun4i_spdif_quirks { unsigned int reg_dac_txdata; bool has_reset; + unsigned int reg_fctl_ftx; };
struct sun4i_spdif_dev { @@ -180,16 +182,19 @@ struct sun4i_spdif_dev { struct snd_soc_dai_driver cpu_dai_drv; struct regmap *regmap; struct snd_dmaengine_dai_dma_data dma_params_tx; + const struct sun4i_spdif_quirks *quirks; };
static void sun4i_spdif_configure(struct sun4i_spdif_dev *host) { + const struct sun4i_spdif_quirks *quirks = host->quirks; + /* soft reset SPDIF */ regmap_write(host->regmap, SUN4I_SPDIF_CTL, SUN4I_SPDIF_CTL_RESET);
/* flush TX FIFO */ regmap_update_bits(host->regmap, SUN4I_SPDIF_FCTL, - SUN4I_SPDIF_FCTL_FTX, SUN4I_SPDIF_FCTL_FTX); + quirks->reg_fctl_ftx, quirks->reg_fctl_ftx);
/* clear TX counter */ regmap_write(host->regmap, SUN4I_SPDIF_TXCNT, 0); @@ -418,15 +423,18 @@ static struct snd_soc_dai_driver sun4i_spdif_dai = {
static const struct sun4i_spdif_quirks sun4i_a10_spdif_quirks = { .reg_dac_txdata = SUN4I_SPDIF_TXFIFO, + .reg_fctl_ftx = SUN4I_SPDIF_FCTL_FTX, };
static const struct sun4i_spdif_quirks sun6i_a31_spdif_quirks = { .reg_dac_txdata = SUN4I_SPDIF_TXFIFO, + .reg_fctl_ftx = SUN4I_SPDIF_FCTL_FTX, .has_reset = true, };
static const struct sun4i_spdif_quirks sun8i_h3_spdif_quirks = { .reg_dac_txdata = SUN8I_SPDIF_TXFIFO, + .reg_fctl_ftx = SUN4I_SPDIF_FCTL_FTX, .has_reset = true, };
@@ -507,6 +515,7 @@ static int sun4i_spdif_probe(struct platform_device *pdev) dev_err(&pdev->dev, "Failed to determine the quirks to use\n"); return -ENODEV; } + host->quirks = quirks;
host->regmap = devm_regmap_init_mmio(&pdev->dev, base, &sun4i_spdif_regmap_config);
On Sat, May 25, 2019 at 06:23:19PM +0200, Clément Péron wrote:
Allwinner H6 has a different bit to flush the TX FIFO.
Add a quirks to prepare introduction of H6 SoC.
Signed-off-by: Clément Péron peron.clem@gmail.com
sound/soc/sunxi/sun4i-spdif.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/sound/soc/sunxi/sun4i-spdif.c b/sound/soc/sunxi/sun4i-spdif.c index b6c66a62e915..8317bbee0712 100644 --- a/sound/soc/sunxi/sun4i-spdif.c +++ b/sound/soc/sunxi/sun4i-spdif.c @@ -166,10 +166,12 @@
- @reg_dac_tx_data: TX FIFO offset for DMA config.
- @has_reset: SoC needs reset deasserted.
- @reg_fctl_ftx: TX FIFO flush bitmask.
It's a bit weird to use the same prefix for a register offset (reg_dac_tx_data) and a value (reg_fctl_ftx).
Maxime
-- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
Hi Maxime,
On Sun, 26 May 2019 at 20:24, Maxime Ripard maxime.ripard@bootlin.com wrote:
On Sat, May 25, 2019 at 06:23:19PM +0200, Clément Péron wrote:
Allwinner H6 has a different bit to flush the TX FIFO.
Add a quirks to prepare introduction of H6 SoC.
Signed-off-by: Clément Péron peron.clem@gmail.com
sound/soc/sunxi/sun4i-spdif.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/sound/soc/sunxi/sun4i-spdif.c b/sound/soc/sunxi/sun4i-spdif.c index b6c66a62e915..8317bbee0712 100644 --- a/sound/soc/sunxi/sun4i-spdif.c +++ b/sound/soc/sunxi/sun4i-spdif.c @@ -166,10 +166,12 @@
- @reg_dac_tx_data: TX FIFO offset for DMA config.
- @has_reset: SoC needs reset deasserted.
- @reg_fctl_ftx: TX FIFO flush bitmask.
It's a bit weird to use the same prefix for a register offset (reg_dac_tx_data) and a value (reg_fctl_ftx).
I just look at sun4i-codec and they use a regmap, But I think it's a bit overkill no?
What do you think about val_fctl_ftx ?
Thanks for your review, Clément
Maxime
-- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
On Sun, May 26, 2019 at 09:00:30PM +0200, Clément Péron wrote:
Hi Maxime,
On Sun, 26 May 2019 at 20:24, Maxime Ripard maxime.ripard@bootlin.com wrote:
On Sat, May 25, 2019 at 06:23:19PM +0200, Clément Péron wrote:
Allwinner H6 has a different bit to flush the TX FIFO.
Add a quirks to prepare introduction of H6 SoC.
Signed-off-by: Clément Péron peron.clem@gmail.com
sound/soc/sunxi/sun4i-spdif.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/sound/soc/sunxi/sun4i-spdif.c b/sound/soc/sunxi/sun4i-spdif.c index b6c66a62e915..8317bbee0712 100644 --- a/sound/soc/sunxi/sun4i-spdif.c +++ b/sound/soc/sunxi/sun4i-spdif.c @@ -166,10 +166,12 @@
- @reg_dac_tx_data: TX FIFO offset for DMA config.
- @has_reset: SoC needs reset deasserted.
- @reg_fctl_ftx: TX FIFO flush bitmask.
It's a bit weird to use the same prefix for a register offset (reg_dac_tx_data) and a value (reg_fctl_ftx).
I just look at sun4i-codec and they use a regmap, But I think it's a bit overkill no?
For a single value, yeah
What do you think about val_fctl_ftx ?
Looks good, thanks! Maxime
-- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
Allwinner H6 has a different mapping for the fifo register controller.
Actually only the fifo TX bit is used in the drivers.
Use the freshly introduced quirks to make this drivers compatible with the Allwinner H6.
Signed-off-by: Clément Péron peron.clem@gmail.com --- sound/soc/sunxi/sun4i-spdif.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-spdif.c b/sound/soc/sunxi/sun4i-spdif.c index 8317bbee0712..86bf6a99703f 100644 --- a/sound/soc/sunxi/sun4i-spdif.c +++ b/sound/soc/sunxi/sun4i-spdif.c @@ -75,6 +75,18 @@ #define SUN4I_SPDIF_FCTL_RXOM(v) ((v) << 0) #define SUN4I_SPDIF_FCTL_RXOM_MASK GENMASK(1, 0)
+#define SUN50I_H6_SPDIF_FCTL (0x14) + #define SUN50I_H6_SPDIF_FCTL_HUB_EN BIT(31) + #define SUN50I_H6_SPDIF_FCTL_FTX BIT(30) + #define SUN50I_H6_SPDIF_FCTL_FRX BIT(29) + #define SUN50I_H6_SPDIF_FCTL_TXTL(v) ((v) << 12) + #define SUN50I_H6_SPDIF_FCTL_TXTL_MASK GENMASK(19, 12) + #define SUN50I_H6_SPDIF_FCTL_RXTL(v) ((v) << 4) + #define SUN50I_H6_SPDIF_FCTL_RXTL_MASK GENMASK(10, 4) + #define SUN50I_H6_SPDIF_FCTL_TXIM BIT(2) + #define SUN50I_H6_SPDIF_FCTL_RXOM(v) ((v) << 0) + #define SUN50I_H6_SPDIF_FCTL_RXOM_MASK GENMASK(1, 0) + #define SUN4I_SPDIF_FSTA (0x18) #define SUN4I_SPDIF_FSTA_TXE BIT(14) #define SUN4I_SPDIF_FSTA_TXECNTSHT (8) @@ -438,6 +450,12 @@ static const struct sun4i_spdif_quirks sun8i_h3_spdif_quirks = { .has_reset = true, };
+static const struct sun4i_spdif_quirks sun50i_h6_spdif_quirks = { + .reg_dac_txdata = SUN8I_SPDIF_TXFIFO, + .reg_fctl_ftx = SUN50I_H6_SPDIF_FCTL_FTX, + .has_reset = true, +}; + static const struct of_device_id sun4i_spdif_of_match[] = { { .compatible = "allwinner,sun4i-a10-spdif", @@ -451,6 +469,10 @@ static const struct of_device_id sun4i_spdif_of_match[] = { .compatible = "allwinner,sun8i-h3-spdif", .data = &sun8i_h3_spdif_quirks, }, + { + .compatible = "allwinner,sun50i-h6-spdif", + .data = &sun50i_h6_spdif_quirks, + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, sun4i_spdif_of_match);
The Allwinner H6 has a SPDIF controller called OWA (One Wire Audio).
Only one pinmuxing is available so set it as default.
Signed-off-by: Clément Péron peron.clem@gmail.com --- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 38 ++++++++++++++++++++ 1 file changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index f4ea596c82ce..307d3c896ff2 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -83,6 +83,24 @@ method = "smc"; };
+ sound_spdif { + compatible = "simple-audio-card"; + simple-audio-card,name = "On-board SPDIF"; + + simple-audio-card,cpu { + sound-dai = <&spdif>; + }; + + simple-audio-card,codec { + sound-dai = <&spdif_out>; + }; + }; + + spdif_out: spdif-out { + #sound-dai-cells = <0>; + compatible = "linux,spdif-dit"; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 13 @@ -273,6 +291,11 @@ bias-pull-up; };
+ spdif_tx_pin: spdif-tx-pin { + pins = "PH7"; + function = "spdif"; + }; + uart0_ph_pins: uart0-ph-pins { pins = "PH0", "PH1"; function = "uart0"; @@ -402,6 +425,21 @@ }; };
+ spdif: spdif@5093000 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun50i-h6-spdif"; + reg = <0x05093000 0x400>; + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>; + clock-names = "apb", "spdif"; + resets = <&ccu RST_BUS_SPDIF>; + dmas = <&dma 2>; + dma-names = "tx"; + pinctrl-names = "default"; + pinctrl-0 = <&spdif_tx_pin>; + status = "disabled"; + }; + usb2otg: usb@5100000 { compatible = "allwinner,sun50i-h6-musb", "allwinner,sun8i-a33-musb";
On Sat, May 25, 2019 at 06:23:21PM +0200, Clément Péron wrote:
The Allwinner H6 has a SPDIF controller called OWA (One Wire Audio).
Only one pinmuxing is available so set it as default.
Signed-off-by: Clément Péron peron.clem@gmail.com
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 38 ++++++++++++++++++++ 1 file changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index f4ea596c82ce..307d3c896ff2 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -83,6 +83,24 @@ method = "smc"; };
- sound_spdif {
This generates a warning in DTC, underscores are not valid characters for a node name.
Maxime
-- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
Beelink GS1 board has a SPDIF out connector, so enable it in the device-tree.
Signed-off-by: Clément Péron peron.clem@gmail.com --- arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts index 0dc33c90dd60..76a95ad33dc5 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts @@ -243,6 +243,10 @@ vcc-pm-supply = <®_aldo1>; };
+&spdif { + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_ph_pins>;
Allwinner A64 and H6 use the Sun4i SPDIF driver.
Enable this to allow a proper support.
Signed-off-by: Clément Péron peron.clem@gmail.com --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index b535f0f412cc..de5b65d45311 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -526,6 +526,7 @@ CONFIG_SND_SOC_ROCKCHIP_RT5645=m CONFIG_SND_SOC_RK3399_GRU_SOUND=m CONFIG_SND_SOC_SAMSUNG=y CONFIG_SND_SOC_RCAR=m +CONFIG_SND_SUN4I_SPDIF=m CONFIG_SND_SOC_AK4613=m CONFIG_SND_SOC_ES7134=m CONFIG_SND_SOC_ES7241=m
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Maxime Ripard