[alsa-devel] [PATCH] Change of cold reset and ac97 register cache
This patch synchronizes wm9713 AC97 register cache and hardware registers upon reset.
The actual implementation of the wm9713 codec provides a cache of AC97 registers. After cold reset, the cache and hardware are not in sync. When using wm9713 logic, oring a GPIO triggers many other GPIOS.
The solution of this patch reads from hardware to cache upon cold reset. Another one would be to write the cache to hardware upon init. If decided so, I would gladly change my patch.
-- Robert Jarzmik
On Wed, Jan 16, 2008 at 11:24:56PM +0100, Robert Jarzmik wrote:
The actual implementation of the wm9713 codec provides a cache of AC97 registers. After cold reset, the cache and hardware are not in sync. When using wm9713 logic, oring a GPIO triggers many other GPIOS.
The solution of this patch reads from hardware to cache upon cold reset. Another one would be to write the cache to hardware upon init. If decided so, I would gladly change my patch.
Neither option is entirely safe - something more involved like the code in wm9713_soc_resume() would be required to bring the chip back safely. Writing the current cache values is unsafe due to ordering requirements and in any case the information required to configure the PLL can't be recovered from the cache alone. Reading the values currently set in the chip for the cache is safer will leave the chip without basic initialisation and the driver out of sync with the state of the chip.
Could you outline why you need to reset the codec? I'd like to understand the use case here.
participants (2)
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Mark Brown -
Robert Jarzmik