[alsa-devel] [PATCH v4-resend 0/7] ASoC: add CSR SiRFSoC sound drivers
From: Rongjun Ying rongjun.ying@csr.com
This patchset adds CSR SiRFSoC sound drivers including: 1. The SiRF internal audio codec driver 2. The SiRF audio port driver 3. The SiRF internal audio card driver 4. The SiRF I2S controller driver 5. The SiRF hdmi card driver 6. The SiRF USP controller(DSP mode) driver 7. The SiRF bt-sco card driver
-v4: 1. Use the generic dmaengine pcm codes instead of sirf pcm driver. 2. Add TLV information into internal audio codec driver. 3. Use the MMIO regmap instead of custom read and write callbacks. 4. Remove spin_lock. 5. Change some variable names. 6. The SiRF internal audio driver split into codec, port. 7. Add binding documents.
Rongjun Ying (7): ASoC: sirf: Add SiRF internal audio codec driver ASoC: sirf: Add SiRF audio port driver is used by SiRF internal audio codec ASoC: sirf: Add SiRF audio card ASoC: sirf: Add SiRF I2S driver ASoC: sirf: Add hdmi card ASoC: sirf: Add usp driver which is used by dsp mode ASoC: sirf: Add bt-sco card
.../devicetree/bindings/sound/sirf-audio-codec.txt | 17 + .../devicetree/bindings/sound/sirf-audio-port.txt | 20 + .../devicetree/bindings/sound/sirf-audio.txt | 41 ++ .../devicetree/bindings/sound/sirf-bt-sco.txt | 18 + .../devicetree/bindings/sound/sirf-hdmi.txt | 15 + .../devicetree/bindings/sound/sirf-i2s.txt | 27 + .../devicetree/bindings/sound/sirf-usp.txt | 27 + sound/soc/Kconfig | 1 + sound/soc/Makefile | 1 + sound/soc/codecs/Kconfig | 4 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/sirf-audio-codec.c | 585 ++++++++++++++++++++ sound/soc/codecs/sirf-audio-codec.h | 75 +++ sound/soc/sirf/Kconfig | 34 ++ sound/soc/sirf/Makefile | 13 + sound/soc/sirf/sirf-audio-port.c | 194 +++++++ sound/soc/sirf/sirf-audio-port.h | 62 ++ sound/soc/sirf/sirf-audio.c | 156 ++++++ sound/soc/sirf/sirf-bt-sco.c | 99 ++++ sound/soc/sirf/sirf-hdmi.c | 98 ++++ sound/soc/sirf/sirf-i2s.c | 438 +++++++++++++++ sound/soc/sirf/sirf-i2s.h | 88 +++ sound/soc/sirf/sirf-usp.c | 448 +++++++++++++++ sound/soc/sirf/sirf-usp.h | 282 ++++++++++ 24 files changed, 2745 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/sirf-audio-codec.txt create mode 100644 Documentation/devicetree/bindings/sound/sirf-audio-port.txt create mode 100644 Documentation/devicetree/bindings/sound/sirf-audio.txt create mode 100644 Documentation/devicetree/bindings/sound/sirf-bt-sco.txt create mode 100644 Documentation/devicetree/bindings/sound/sirf-hdmi.txt create mode 100644 Documentation/devicetree/bindings/sound/sirf-i2s.txt create mode 100644 Documentation/devicetree/bindings/sound/sirf-usp.txt create mode 100644 sound/soc/codecs/sirf-audio-codec.c create mode 100644 sound/soc/codecs/sirf-audio-codec.h create mode 100644 sound/soc/sirf/Kconfig create mode 100644 sound/soc/sirf/Makefile create mode 100644 sound/soc/sirf/sirf-audio-port.c create mode 100644 sound/soc/sirf/sirf-audio-port.h create mode 100644 sound/soc/sirf/sirf-audio.c create mode 100644 sound/soc/sirf/sirf-bt-sco.c create mode 100644 sound/soc/sirf/sirf-hdmi.c create mode 100644 sound/soc/sirf/sirf-i2s.c create mode 100644 sound/soc/sirf/sirf-i2s.h create mode 100644 sound/soc/sirf/sirf-usp.c create mode 100644 sound/soc/sirf/sirf-usp.h
From: Rongjun Ying rongjun.ying@csr.com
The SiRF internal audio codec is integrated in SiRF atlas6 and prima2 SoC. Features include: 1. Stereo DAC and ADC with 16-bit resolution amd 48KHz sample rate 2. Support headphone and/or speaker output 3. Integrate headphone and speaker output amp 4. Support LINE and MIC input 5. Support single ended and differential input mode.
Signed-off-by: Rongjun Ying rongjun.ying@csr.com --- -v4: 1. Add SiRF internal audio codec driver which split from sirf-soc-inner driver. 2. Add codec binding document. 3. Use MMIO regmap. 4. Add TLV information.
.../devicetree/bindings/sound/sirf-audio-codec.txt | 17 + sound/soc/codecs/Kconfig | 4 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/sirf-audio-codec.c | 585 ++++++++++++++++++++ sound/soc/codecs/sirf-audio-codec.h | 75 +++ 5 files changed, 683 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/sirf-audio-codec.txt create mode 100644 sound/soc/codecs/sirf-audio-codec.c create mode 100644 sound/soc/codecs/sirf-audio-codec.h
diff --git a/Documentation/devicetree/bindings/sound/sirf-audio-codec.txt b/Documentation/devicetree/bindings/sound/sirf-audio-codec.txt new file mode 100644 index 0000000..062f5ec --- /dev/null +++ b/Documentation/devicetree/bindings/sound/sirf-audio-codec.txt @@ -0,0 +1,17 @@ +SiRF internal audio CODEC + +Required properties: + + - compatible : "sirf,atlas6-audio-codec" or "sirf,prima2-audio-codec" + + - reg : the register address of the device. + + - clocks: the clock of SiRF internal audio codec + +Example: + +audiocodec: audiocodec@b0040000 { + compatible = "sirf,atlas6-audio-codec"; + reg = <0xb0040000 0x10000>; + clocks = <&clks 27>; +}; diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index f2383eb..b6b0953 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -141,6 +141,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_WM9705 if SND_SOC_AC97_BUS select SND_SOC_WM9712 if SND_SOC_AC97_BUS select SND_SOC_WM9713 if SND_SOC_AC97_BUS + select SND_SOC_SIRF_AUDIO_CODEC if SND_SOC_SIRF help Normally ASoC codec drivers are only built if a machine driver which uses them is also built since they are only usable with a machine @@ -634,4 +635,7 @@ config SND_SOC_TPA6130A2 tristate "Texas Instruments TPA6130A2 headphone amplifier" depends on I2C
+config SND_SOC_SIRF_AUDIO_CODEC + tristate "SiRF SoC internal audio codec" + select REGMAP_MMIO endmenu diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 6af7a55..6bea5ba 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -134,6 +134,7 @@ snd-soc-wm9705-objs := wm9705.o snd-soc-wm9712-objs := wm9712.o snd-soc-wm9713-objs := wm9713.o snd-soc-wm-hubs-objs := wm_hubs.o +snd-soc-sirf-audio-codec-objs := sirf-audio-codec.o
# Amp snd-soc-max9877-objs := max9877.o @@ -274,6 +275,7 @@ obj-$(CONFIG_SND_SOC_WM9712) += snd-soc-wm9712.o obj-$(CONFIG_SND_SOC_WM9713) += snd-soc-wm9713.o obj-$(CONFIG_SND_SOC_WM_ADSP) += snd-soc-wm-adsp.o obj-$(CONFIG_SND_SOC_WM_HUBS) += snd-soc-wm-hubs.o +obj-$(CONFIG_SND_SOC_SIRF_AUDIO_CODEC) += snd-soc-sirf-audio-codec.o
# Amp obj-$(CONFIG_SND_SOC_MAX9877) += snd-soc-max9877.o diff --git a/sound/soc/codecs/sirf-audio-codec.c b/sound/soc/codecs/sirf-audio-codec.c new file mode 100644 index 0000000..6acf84a --- /dev/null +++ b/sound/soc/codecs/sirf-audio-codec.c @@ -0,0 +1,585 @@ +/* + * SiRF audio codec driver + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/pm_runtime.h> +#include <linux/rtc/sirfsoc_rtciobrg.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/clk.h> +#include <linux/delay.h> +#include <linux/io.h> +#include <linux/regmap.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/initval.h> +#include <sound/tlv.h> +#include <sound/soc.h> +#include <sound/dmaengine_pcm.h> + +#include "sirf-audio-codec.h" + +struct sirf_audio_codec_reg_bits { + u32 dig_mic_en_bits; + u32 dig_mic_freq_bits; + u32 adc14b_12_bits; + u32 firdac_hsl_en_bits; + u32 firdac_hsr_en_bits; + u32 firdac_lout_en_bits; + u32 por_bits; + u32 codec_clk_en_bits; +}; + +struct sirf_audio_codec { + struct clk *clk; + struct regmap *regmap; + u32 sys_pwrc_reg_base; + struct sirf_audio_codec_reg_bits *reg_bits; + u32 reg_ctrl0, reg_ctrl1; +}; + +static struct sirf_audio_codec_reg_bits sirf_audio_codec_reg_bits_prima2 = { + .dig_mic_en_bits = 20, + .dig_mic_freq_bits = 21, + .adc14b_12_bits = 22, + .firdac_hsl_en_bits = 23, + .firdac_hsr_en_bits = 24, + .firdac_lout_en_bits = 25, + .por_bits = 26, + .codec_clk_en_bits = 27, +}; + +static struct sirf_audio_codec_reg_bits sirf_audio_codec_reg_bits_atlas6 = { + .dig_mic_en_bits = 22, + .dig_mic_freq_bits = 23, + .adc14b_12_bits = 24, + .firdac_hsl_en_bits = 25, + .firdac_hsr_en_bits = 26, + .firdac_lout_en_bits = 27, + .por_bits = 28, + .codec_clk_en_bits = 29, +}; + +static const char * const input_mode_mux[] = {"Single-ended", + "Differential"}; + +static const struct soc_enum input_mode_mux_enum = + SOC_ENUM_SINGLE(AUDIO_IC_CODEC_CTRL1, 4, 2, input_mode_mux); + +static const struct snd_kcontrol_new sirf_audio_codec_input_mode_control = + SOC_DAPM_ENUM("Route", input_mode_mux_enum); + +static const DECLARE_TLV_DB_SCALE(playback_vol_tlv, -12400, 100, 0); +static const DECLARE_TLV_DB_SCALE(capture_vol_tlv_prima2, 500, 100, 0); +static const DECLARE_TLV_DB_RANGE(capture_vol_tlv_atlas6, + 0, 7, TLV_DB_SCALE_ITEM(-100, 100, 0), + 0x22, 0x3F, TLV_DB_SCALE_ITEM(700, 100, 0), +); + +static struct snd_kcontrol_new volume_controls_atlas6[] = { + SOC_DOUBLE_TLV("Playback Volume", AUDIO_IC_CODEC_CTRL0, 21, 14, + 0x7F, 0, playback_vol_tlv), + SOC_DOUBLE_TLV("Capture Volume", AUDIO_IC_CODEC_CTRL1, 16, 10, + 0x3F, 0, capture_vol_tlv_atlas6), +}; + +static struct snd_kcontrol_new volume_controls_prima2[] = { + SOC_DOUBLE_TLV("Speaker Volume", AUDIO_IC_CODEC_CTRL0, 21, 14, + 0x7F, 0, playback_vol_tlv), + SOC_DOUBLE_TLV("Capture Volume", AUDIO_IC_CODEC_CTRL1, 15, 10, + 0x1F, 0, capture_vol_tlv_prima2), +}; + +static struct snd_kcontrol_new left_input_path_controls[] = { + SOC_DAPM_SINGLE("Line Left Switch", AUDIO_IC_CODEC_CTRL1, 6, 1, 0), + SOC_DAPM_SINGLE("Mic Left Switch", AUDIO_IC_CODEC_CTRL1, 3, 1, 0), +}; + +static struct snd_kcontrol_new right_input_path_controls[] = { + SOC_DAPM_SINGLE("Line Right Switch", AUDIO_IC_CODEC_CTRL1, 5, 1, 0), + SOC_DAPM_SINGLE("Mic Right Switch", AUDIO_IC_CODEC_CTRL1, 2, 1, 0), +}; + +static struct snd_kcontrol_new left_dac_to_hp_left_amp_switch_control = + SOC_DAPM_SINGLE("Switch", AUDIO_IC_CODEC_CTRL0, 9, 1, 0); + +static struct snd_kcontrol_new left_dac_to_hp_right_amp_switch_control = + SOC_DAPM_SINGLE("Switch", AUDIO_IC_CODEC_CTRL0, 8, 1, 0); + +static struct snd_kcontrol_new right_dac_to_hp_left_amp_switch_control = + SOC_DAPM_SINGLE("Switch", AUDIO_IC_CODEC_CTRL0, 7, 1, 0); + +static struct snd_kcontrol_new right_dac_to_hp_right_amp_switch_control = + SOC_DAPM_SINGLE("Switch", AUDIO_IC_CODEC_CTRL0, 6, 1, 0); + +static struct snd_kcontrol_new left_dac_to_speaker_lineout_switch_control = + SOC_DAPM_SINGLE("Switch", AUDIO_IC_CODEC_CTRL0, 11, 1, 0); + +static struct snd_kcontrol_new right_dac_to_speaker_lineout_switch_control = + SOC_DAPM_SINGLE("Switch", AUDIO_IC_CODEC_CTRL0, 10, 1, 0); + +static int adc_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + struct sirf_audio_codec *sirf_audio_codec = dev_get_drvdata(codec->dev); + u32 val; + + val = sirfsoc_rtc_iobrg_readl(sirf_audio_codec->sys_pwrc_reg_base + + PWRC_PDN_CTRL_OFFSET); + switch (event) { + case SND_SOC_DAPM_POST_PMU: + /* Enable capture power of codec*/ + val |= (1 << AUDIO_POWER_EN_BIT); + break; + case SND_SOC_DAPM_POST_PMD: + val &= ~(1 << AUDIO_POWER_EN_BIT); + break; + default: + return 0; + } + + sirfsoc_rtc_iobrg_writel(val, + sirf_audio_codec->sys_pwrc_reg_base + PWRC_PDN_CTRL_OFFSET); + + /*After enable adc, Delay 200ms to avoid pop noise*/ + if (event == SND_SOC_DAPM_POST_PMU) + msleep(200); + return 0; +} + +static int hp_amp_left_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + struct sirf_audio_codec *sirf_audio_codec = dev_get_drvdata(codec->dev); + u32 val; + u32 mask = (1 << sirf_audio_codec->reg_bits->firdac_hsl_en_bits); + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + val = (1 << sirf_audio_codec->reg_bits->firdac_hsl_en_bits); + break; + case SND_SOC_DAPM_POST_PMD: + val = ~(1 << sirf_audio_codec->reg_bits->firdac_hsl_en_bits); + break; + default: + return 0; + } + snd_soc_update_bits(codec, AUDIO_IC_CODEC_CTRL1, mask, val); + return 0; +} + +static int hp_amp_right_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + struct sirf_audio_codec *sirf_audio_codec = dev_get_drvdata(codec->dev); + u32 val; + u32 mask = (1 << sirf_audio_codec->reg_bits->firdac_hsr_en_bits); + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + val = (1 << sirf_audio_codec->reg_bits->firdac_hsr_en_bits); + break; + case SND_SOC_DAPM_POST_PMD: + val = ~(1 << sirf_audio_codec->reg_bits->firdac_hsr_en_bits); + break; + default: + return 0; + } + snd_soc_update_bits(codec, AUDIO_IC_CODEC_CTRL1, mask, val); + return 0; +} + +static int speaker_output_enable_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + struct sirf_audio_codec *sirf_audio_codec = dev_get_drvdata(codec->dev); + u32 val; + u32 mask = (1 << sirf_audio_codec->reg_bits->firdac_lout_en_bits); + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + val = (1 << sirf_audio_codec->reg_bits->firdac_lout_en_bits); + break; + case SND_SOC_DAPM_POST_PMD: + val = ~(1 << sirf_audio_codec->reg_bits->firdac_lout_en_bits); + default: + return 0; + } + snd_soc_update_bits(codec, AUDIO_IC_CODEC_CTRL1, mask, val); + return 0; +} + +static const struct snd_soc_dapm_widget sirf_audio_codec_dapm_widgets[] = { + SND_SOC_DAPM_DAC("DAC left", NULL, AUDIO_IC_CODEC_CTRL0, 1, 0), + SND_SOC_DAPM_DAC("DAC right", NULL, AUDIO_IC_CODEC_CTRL0, 0, 0), + SND_SOC_DAPM_SWITCH("Left dac to hp left amp", SND_SOC_NOPM, 0, 0, + &left_dac_to_hp_left_amp_switch_control), + SND_SOC_DAPM_SWITCH("Left dac to hp right amp", SND_SOC_NOPM, 0, 0, + &left_dac_to_hp_right_amp_switch_control), + SND_SOC_DAPM_SWITCH("Right dac to hp left amp", SND_SOC_NOPM, 0, 0, + &right_dac_to_hp_left_amp_switch_control), + SND_SOC_DAPM_SWITCH("Right dac to hp right amp", SND_SOC_NOPM, 0, 0, + &right_dac_to_hp_right_amp_switch_control), + SND_SOC_DAPM_OUT_DRV_E("HP amp left driver", AUDIO_IC_CODEC_CTRL0, 3, 0, + NULL, 0, hp_amp_left_event, + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), + SND_SOC_DAPM_OUT_DRV_E("HP amp right driver", AUDIO_IC_CODEC_CTRL0, 2, 0, + NULL, 0, hp_amp_right_event, + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), + + SND_SOC_DAPM_SWITCH("Left dac to speaker lineout", SND_SOC_NOPM, 0, 0, + &left_dac_to_speaker_lineout_switch_control), + SND_SOC_DAPM_SWITCH("Right dac to speaker lineout", SND_SOC_NOPM, 0, 0, + &right_dac_to_speaker_lineout_switch_control), + SND_SOC_DAPM_OUT_DRV_E("Speaker output driver", AUDIO_IC_CODEC_CTRL0, 4, 0, + NULL, 0, speaker_output_enable_event, + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), + + SND_SOC_DAPM_OUTPUT("HPOUTL"), + SND_SOC_DAPM_OUTPUT("HPOUTR"), + SND_SOC_DAPM_OUTPUT("SPKOUT"), + + SND_SOC_DAPM_ADC_E("ADC left", NULL, AUDIO_IC_CODEC_CTRL1, 8, 0, + adc_event, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), + SND_SOC_DAPM_ADC_E("ADC right", NULL, AUDIO_IC_CODEC_CTRL1, 7, 0, + adc_event, SND_SOC_DAPM_POST_PMU), + SND_SOC_DAPM_MIXER("Left PGA mixer", AUDIO_IC_CODEC_CTRL1, 1, 0, + &left_input_path_controls[0], + ARRAY_SIZE(left_input_path_controls)), + SND_SOC_DAPM_MIXER("Right PGA mixer", AUDIO_IC_CODEC_CTRL1, 0, 0, + &right_input_path_controls[0], + ARRAY_SIZE(right_input_path_controls)), + + SND_SOC_DAPM_MUX("Mic input mode mux", SND_SOC_NOPM, 0, 0, + &sirf_audio_codec_input_mode_control), + SND_SOC_DAPM_MICBIAS("Mic Bias", AUDIO_IC_CODEC_PWR, 3, 0), + SND_SOC_DAPM_INPUT("MICIN1"), + SND_SOC_DAPM_INPUT("MICIN2"), + SND_SOC_DAPM_INPUT("LINEIN1"), + SND_SOC_DAPM_INPUT("LINEIN2"), + + SND_SOC_DAPM_SUPPLY("HSL Phase Opposite", AUDIO_IC_CODEC_CTRL0, + 30, 0, NULL, 0), +}; + +static const struct snd_soc_dapm_route sirf_audio_codec_map[] = { + {"SPKOUT", NULL, "Speaker output driver"}, + {"Speaker output driver", NULL, "Left dac to speaker lineout"}, + {"Speaker output driver", NULL, "Right dac to speaker lineout"}, + {"Left dac to speaker lineout", "Switch", "DAC left"}, + {"Right dac to speaker lineout", "Switch", "DAC right"}, + {"HPOUTL", NULL, "HP amp left driver"}, + {"HPOUTR", NULL, "HP amp right driver"}, + {"HP amp left driver", NULL, "Right dac to hp left amp"}, + {"HP amp right driver", NULL , "Right dac to hp right amp"}, + {"HP amp left driver", NULL, "Left dac to hp left amp"}, + {"HP amp right driver", NULL , "Right dac to hp right amp"}, + {"Right dac to hp left amp", "Switch", "DAC left"}, + {"Right dac to hp right amp", "Switch", "DAC right"}, + {"Left dac to hp left amp", "Switch", "DAC left"}, + {"Left dac to hp right amp", "Switch", "DAC right"}, + {"DAC left", NULL, "Playback"}, + {"DAC right", NULL, "Playback"}, + {"DAC left", NULL, "HSL Phase Opposite"}, + {"DAC right", NULL, "HSL Phase Opposite"}, + + {"Capture", NULL, "ADC left"}, + {"Capture", NULL, "ADC right"}, + {"ADC left", NULL, "Left PGA mixer"}, + {"ADC right", NULL, "Right PGA mixer"}, + {"Left PGA mixer", "Line Left Switch", "LINEIN2"}, + {"Right PGA mixer", "Line Right Switch", "LINEIN1"}, + {"Left PGA mixer", "Mic Left Switch", "MICIN2"}, + {"Right PGA mixer", "Mic Right Switch", "Mic input mode mux"}, + {"Mic input mode mux", "Single-ended", "MICIN1"}, + {"Mic input mode mux", "Differential", "MICIN1"}, +}; + +static int sirf_audio_codec_trigger(struct snd_pcm_substream *substream, + int cmd, + struct snd_soc_dai *dai) +{ + int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; + struct snd_soc_codec *codec = dai->codec; + u32 val = 0; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + break; + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + if (playback) + val = IC_HSLEN | IC_HSREN; + break; + default: + return -EINVAL; + } + snd_soc_update_bits(codec, AUDIO_IC_CODEC_CTRL0, + IC_HSLEN | IC_HSREN, val); + return 0; +} + +struct snd_soc_dai_ops sirf_audio_codec_dai_ops = { + .trigger = sirf_audio_codec_trigger, +}; + +struct snd_soc_dai_driver sirf_audio_codec_dai = { + .name = "sirf-audio-codec", + .playback = { + .stream_name = "Playback", + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + }, + .ops = &sirf_audio_codec_dai_ops, +}; +EXPORT_SYMBOL_GPL(sirf_audio_codec_dai); + +static int sirf_audio_codec_probe(struct snd_soc_codec *codec) +{ + int ret; + struct sirf_audio_codec *sirf_audio_codec = snd_soc_codec_get_drvdata(codec); + pm_runtime_enable(codec->dev); + codec->control_data = sirf_audio_codec->regmap; + + ret = snd_soc_codec_set_cache_io(codec, 0, 0, SND_SOC_REGMAP); + if (ret != 0) { + dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); + return ret; + } + + if (of_device_is_compatible(codec->dev->of_node, "sirf,prima2-audio-codec")) + return snd_soc_add_codec_controls(codec, + volume_controls_prima2, + ARRAY_SIZE(volume_controls_prima2)); + if (of_device_is_compatible(codec->dev->of_node, "sirf,atlas6-audio-codec")) + return snd_soc_add_codec_controls(codec, + volume_controls_atlas6, + ARRAY_SIZE(volume_controls_atlas6)); + + return -EINVAL; +} + +static int sirf_audio_codec_remove(struct snd_soc_codec *codec) +{ + pm_runtime_disable(codec->dev); + return 0; +} + +static struct snd_soc_codec_driver soc_codec_device_sirf_audio_codec = { + .probe = sirf_audio_codec_probe, + .remove = sirf_audio_codec_remove, + .dapm_widgets = sirf_audio_codec_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(sirf_audio_codec_dapm_widgets), + .dapm_routes = sirf_audio_codec_map, + .num_dapm_routes = ARRAY_SIZE(sirf_audio_codec_map), + .idle_bias_off = true, +}; + +static const struct of_device_id sirf_audio_codec_of_match[] = { + { .compatible = "sirf,prima2-audio-codec", .data = &sirf_audio_codec_reg_bits_prima2 }, + { .compatible = "sirf,atlas6-audio-codec", .data = &sirf_audio_codec_reg_bits_atlas6 }, + {} +}; +MODULE_DEVICE_TABLE(of, sirf_audio_codec_of_match); + +static const struct regmap_config sirf_audio_codec_regmap_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = AUDIO_IC_CODEC_CTRL3, + .cache_type = REGCACHE_NONE, +}; + +static int sirf_audio_codec_driver_probe(struct platform_device *pdev) +{ + int ret; + struct sirf_audio_codec *sirf_audio_codec; + void __iomem *base; + struct resource *mem_res; + struct device_node *dn = NULL; + const struct of_device_id *match; + + match = of_match_node(sirf_audio_codec_of_match, pdev->dev.of_node); + + sirf_audio_codec = devm_kzalloc(&pdev->dev, + sizeof(struct sirf_audio_codec), GFP_KERNEL); + if (!sirf_audio_codec) + return -ENOMEM; + + platform_set_drvdata(pdev, sirf_audio_codec); + + dn = of_find_compatible_node(dn, NULL, "sirf,prima2-pwrc"); + if (!dn) { + dev_err(&pdev->dev, "Failed to get sirf,prima2-pwrc node!\n"); + return -ENODEV; + } + + ret = of_property_read_u32(dn, "reg", &sirf_audio_codec->sys_pwrc_reg_base); + if (ret < 0) { + dev_err(&pdev->dev, "Failed tp get pwrc register base address\n"); + return -EINVAL; + } + + mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + base = devm_ioremap_resource(&pdev->dev, mem_res); + if (base == NULL) + return -ENOMEM; + + sirf_audio_codec->regmap = devm_regmap_init_mmio(&pdev->dev, base, + &sirf_audio_codec_regmap_config); + if (IS_ERR(sirf_audio_codec->regmap)) + return PTR_ERR(sirf_audio_codec->regmap); + + sirf_audio_codec->clk = devm_clk_get(&pdev->dev, NULL); + if (IS_ERR(sirf_audio_codec->clk)) { + dev_err(&pdev->dev, "Get clock failed.\n"); + return PTR_ERR(sirf_audio_codec->clk); + } + + ret = clk_prepare_enable(sirf_audio_codec->clk); + if (ret) { + dev_err(&pdev->dev, "Enable clock failed.\n"); + return ret; + } + + ret = snd_soc_register_codec(&(pdev->dev), + &soc_codec_device_sirf_audio_codec, + &sirf_audio_codec_dai, 1); + if (ret) { + dev_err(&pdev->dev, "Register Audio Codec dai failed.\n"); + goto err_clk_put; + } + + sirf_audio_codec->reg_bits = (struct sirf_audio_codec_reg_bits *)match->data; + /* + * Always open charge pump, if not, when the charge pump closed the + * adc will not stable + */ + regmap_update_bits(sirf_audio_codec->regmap, AUDIO_IC_CODEC_CTRL0, + IC_CPFREQ, IC_CPFREQ); + + if (of_device_is_compatible(pdev->dev.of_node, "sirf,atlas6-audio-codec")) + regmap_update_bits(sirf_audio_codec->regmap, + AUDIO_IC_CODEC_CTRL0, IC_CPEN, IC_CPEN); + return 0; + +err_clk_put: + clk_disable_unprepare(sirf_audio_codec->clk); + return ret; +} + +static int sirf_audio_codec_driver_remove(struct platform_device *pdev) +{ + struct sirf_audio_codec *sirf_audio_codec = platform_get_drvdata(pdev); + + clk_disable_unprepare(sirf_audio_codec->clk); + snd_soc_unregister_codec(&(pdev->dev)); + + return 0; +} + +#ifdef CONFIG_PM_RUNTIME +static int sirf_audio_codec_runtime_suspend(struct device *dev) +{ + struct sirf_audio_codec *sirf_audio_codec = dev_get_drvdata(dev); + regmap_update_bits(sirf_audio_codec->regmap, AUDIO_IC_CODEC_CTRL1, + (1 << sirf_audio_codec->reg_bits->codec_clk_en_bits), + 0); + return 0; +} + +static int sirf_audio_codec_runtime_resume(struct device *dev) +{ + struct sirf_audio_codec *sirf_audio_codec = dev_get_drvdata(dev); + regmap_update_bits(sirf_audio_codec->regmap, AUDIO_IC_CODEC_CTRL1, + (1 << sirf_audio_codec->reg_bits->codec_clk_en_bits) | + (1 << sirf_audio_codec->reg_bits->por_bits), + (1 << sirf_audio_codec->reg_bits->codec_clk_en_bits)); + msleep(20); + regmap_update_bits(sirf_audio_codec->regmap, AUDIO_IC_CODEC_CTRL1, + (1 << sirf_audio_codec->reg_bits->por_bits), + (1 << sirf_audio_codec->reg_bits->por_bits)); + return 0; +} +#endif + +#ifdef CONFIG_PM_SLEEP +static int sirf_audio_codec_suspend(struct device *dev) +{ + struct sirf_audio_codec *sirf_audio_codec = dev_get_drvdata(dev); + + regmap_read(sirf_audio_codec->regmap, AUDIO_IC_CODEC_CTRL0, + &sirf_audio_codec->reg_ctrl0); + regmap_read(sirf_audio_codec->regmap, AUDIO_IC_CODEC_CTRL1, + &sirf_audio_codec->reg_ctrl1); + sirf_audio_codec_runtime_suspend(dev); + clk_disable_unprepare(sirf_audio_codec->clk); + + return 0; +} + +static int sirf_audio_codec_resume(struct device *dev) +{ + struct sirf_audio_codec *sirf_audio_codec = dev_get_drvdata(dev); + int ret; + + ret = clk_prepare_enable(sirf_audio_codec->clk); + if (ret) + return ret; + + regmap_write(sirf_audio_codec->regmap, AUDIO_IC_CODEC_CTRL0, + sirf_audio_codec->reg_ctrl0); + regmap_write(sirf_audio_codec->regmap, AUDIO_IC_CODEC_CTRL1, + sirf_audio_codec->reg_ctrl1); + if (!pm_runtime_status_suspended(dev)) + sirf_audio_codec_runtime_resume(dev); + + return 0; +} +#endif + +static const struct dev_pm_ops sirf_audio_codec_pm_ops = { + SET_RUNTIME_PM_OPS(sirf_audio_codec_runtime_suspend, sirf_audio_codec_runtime_resume, NULL) + SET_SYSTEM_SLEEP_PM_OPS(sirf_audio_codec_suspend, sirf_audio_codec_resume) +}; + +static struct platform_driver sirf_audio_codec_driver = { + .driver = { + .name = "sirf-audio-codec", + .owner = THIS_MODULE, + .of_match_table = sirf_audio_codec_of_match, + .pm = &sirf_audio_codec_pm_ops, + }, + .probe = sirf_audio_codec_driver_probe, + .remove = sirf_audio_codec_driver_remove, +}; + +module_platform_driver(sirf_audio_codec_driver); + +MODULE_DESCRIPTION("SiRF audio codec driver"); +MODULE_AUTHOR("RongJun Ying Rongjun.Ying@csr.com"); +MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/codecs/sirf-audio-codec.h b/sound/soc/codecs/sirf-audio-codec.h new file mode 100644 index 0000000..d4c187b --- /dev/null +++ b/sound/soc/codecs/sirf-audio-codec.h @@ -0,0 +1,75 @@ +/* + * SiRF inner codec controllers define + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#ifndef _SIRF_AUDIO_CODEC_H +#define _SIRF_AUDIO_CODEC_H + + +#define AUDIO_IC_CODEC_PWR (0x00E0) +#define AUDIO_IC_CODEC_CTRL0 (0x00E4) +#define AUDIO_IC_CODEC_CTRL1 (0x00E8) +#define AUDIO_IC_CODEC_CTRL2 (0x00EC) +#define AUDIO_IC_CODEC_CTRL3 (0x00F0) + +#define MICBIASEN (1 << 3) + +#define IC_RDACEN (1 << 0) +#define IC_LDACEN (1 << 1) +#define IC_HSREN (1 << 2) +#define IC_HSLEN (1 << 3) +#define IC_SPEN (1 << 4) +#define IC_CPEN (1 << 5) + +#define IC_HPRSELR (1 << 6) +#define IC_HPLSELR (1 << 7) +#define IC_HPRSELL (1 << 8) +#define IC_HPLSELL (1 << 9) +#define IC_SPSELR (1 << 10) +#define IC_SPSELL (1 << 11) + +#define IC_MONOR (1 << 12) +#define IC_MONOL (1 << 13) + +#define IC_RXOSRSEL (1 << 28) +#define IC_CPFREQ (1 << 29) +#define IC_HSINVEN (1 << 30) + +#define IC_MICINREN (1 << 0) +#define IC_MICINLEN (1 << 1) +#define IC_MICIN1SEL (1 << 2) +#define IC_MICIN2SEL (1 << 3) +#define IC_MICDIFSEL (1 << 4) +#define IC_LINEIN1SEL (1 << 5) +#define IC_LINEIN2SEL (1 << 6) +#define IC_RADCEN (1 << 7) +#define IC_LADCEN (1 << 8) +#define IC_ALM (1 << 9) + +#define IC_DIGMICEN (1 << 22) +#define IC_DIGMICFREQ (1 << 23) +#define IC_ADC14B_12 (1 << 24) +#define IC_FIRDAC_HSL_EN (1 << 25) +#define IC_FIRDAC_HSR_EN (1 << 26) +#define IC_FIRDAC_LOUT_EN (1 << 27) +#define IC_POR (1 << 28) +#define IC_CODEC_CLK_EN (1 << 29) +#define IC_HP_3DB_BOOST (1 << 30) + +#define IC_ADC_LEFT_GAIN_SHIFT 16 +#define IC_ADC_RIGHT_GAIN_SHIFT 10 +#define IC_ADC_GAIN_MASK 0x3F +#define IC_MIC_MAX_GAIN 0x39 + +#define IC_RXPGAR_MASK 0x3F +#define IC_RXPGAR_SHIFT 14 +#define IC_RXPGAL_MASK 0x3F +#define IC_RXPGAL_SHIFT 21 +#define IC_RXPGAR 0x7B +#define IC_RXPGAL 0x7B + +#endif /*__SIRF_AUDIO_CODEC_H*/
On Wed, Feb 26, 2014 at 03:22:16PM +0800, RongJun Ying wrote:
Overall looks fairly good, a few issues below but they're quite small.
+static struct sirf_audio_codec_reg_bits sirf_audio_codec_reg_bits_prima2 = {
- .dig_mic_en_bits = 20,
- .dig_mic_freq_bits = 21,
- .adc14b_12_bits = 22,
- .firdac_hsl_en_bits = 23,
- .firdac_hsr_en_bits = 24,
- .firdac_lout_en_bits = 25,
- .por_bits = 26,
- .codec_clk_en_bits = 27,
+};
This looks like the sort of thing that the regmap_field layer was supposed to hide?
+static int adc_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)+{
- struct snd_soc_codec *codec = w->codec;
- struct sirf_audio_codec *sirf_audio_codec = dev_get_drvdata(codec->dev);
- u32 val;
- val = sirfsoc_rtc_iobrg_readl(sirf_audio_codec->sys_pwrc_reg_base +
PWRC_PDN_CTRL_OFFSET);- switch (event) {
- case SND_SOC_DAPM_POST_PMU:
/* Enable capture power of codec*/val |= (1 << AUDIO_POWER_EN_BIT);break;
Looking at this code (and many of the other controls) I can't help but feel that there's some room for more abstraction here. The controls are all setting two bits rather than just one but for example...
- case SND_SOC_DAPM_PRE_PMU:
val = (1 << sirf_audio_codec->reg_bits->firdac_hsl_en_bits);break;
...this looks like a supply widget could be used to manage the bits controlled by the pre and post PMU events? The same is true for most of the events.
- dn = of_find_compatible_node(dn, NULL, "sirf,prima2-pwrc");
- if (!dn) {
dev_err(&pdev->dev, "Failed to get sirf,prima2-pwrc node!\n");return -ENODEV;- }
- ret = of_property_read_u32(dn, "reg", &sirf_audio_codec->sys_pwrc_reg_base);
- if (ret < 0) {
dev_err(&pdev->dev, "Failed tp get pwrc register base address\n");return -EINVAL;- }
Should prima2-pwrc be a syscon? Not a blocker for merging this.
+#ifdef CONFIG_PM_RUNTIME +static int sirf_audio_codec_runtime_suspend(struct device *dev) +{
- struct sirf_audio_codec *sirf_audio_codec = dev_get_drvdata(dev);
- regmap_update_bits(sirf_audio_codec->regmap, AUDIO_IC_CODEC_CTRL1,
(1 << sirf_audio_codec->reg_bits->codec_clk_en_bits),0);- return 0;
+}
Can you disable the clock in the clock API as well? This might allow further supply clocks to be disabled and is genarally good practice.
+static int sirf_audio_codec_suspend(struct device *dev) +{
- struct sirf_audio_codec *sirf_audio_codec = dev_get_drvdata(dev);
- regmap_read(sirf_audio_codec->regmap, AUDIO_IC_CODEC_CTRL0,
&sirf_audio_codec->reg_ctrl0);- regmap_read(sirf_audio_codec->regmap, AUDIO_IC_CODEC_CTRL1,
&sirf_audio_codec->reg_ctrl1);- sirf_audio_codec_runtime_suspend(dev);
Have you seen the series Ulf has been posting regarding the integration of runtime PM and system suspend? There's all sorts of nasty cases with this stuff unfortunately. Not sure it should be a blocker for merging though since we haven't really figured out how this stuff is supposed to work.
-----Original Message----- From: Mark Brown [mailto:broonie@kernel.org] Sent: Thursday, February 27, 2014 1:34 PM To: RongJun Ying Cc: Liam Girdwood; Jaroslav Kysela; Takashi Iwai; alsa-devel@alsa- project.org; DL-SHA-WorkGroupLinux; Rongjun Ying Subject: Re: [PATCH v4-resend 1/7] ASoC: sirf: Add SiRF internal audio codec driver
On Wed, Feb 26, 2014 at 03:22:16PM +0800, RongJun Ying wrote:
Overall looks fairly good, a few issues below but they're quite small.
+static struct sirf_audio_codec_reg_bits
sirf_audio_codec_reg_bits_prima2 = {
- .dig_mic_en_bits = 20,
- .dig_mic_freq_bits = 21,
- .adc14b_12_bits = 22,
- .firdac_hsl_en_bits = 23,
- .firdac_hsr_en_bits = 24,
- .firdac_lout_en_bits = 25,
- .por_bits = 26,
- .codec_clk_en_bits = 27,
+};
This looks like the sort of thing that the regmap_field layer was supposed to hide?
Do you mean I need use the regmap_field_read/write to hide these?
+static int adc_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event) {- struct snd_soc_codec *codec = w->codec;
- struct sirf_audio_codec *sirf_audio_codec =
dev_get_drvdata(codec->dev);
- u32 val;
- val = sirfsoc_rtc_iobrg_readl(sirf_audio_codec->sys_pwrc_reg_base
PWRC_PDN_CTRL_OFFSET);- switch (event) {
- case SND_SOC_DAPM_POST_PMU:
/* Enable capture power of codec*/val |= (1 << AUDIO_POWER_EN_BIT);break;Looking at this code (and many of the other controls) I can't help but feel that there's some room for more abstraction here. The controls are all setting two bits rather than just one but for example...
- case SND_SOC_DAPM_PRE_PMU:
val = (1 << sirf_audio_codec->reg_bits->firdac_hsl_en_bits);break;...this looks like a supply widget could be used to manage the bits controlled by the pre and post PMU events? The same is true for most of the events.
Ok, I will use supply widget.
- dn = of_find_compatible_node(dn, NULL, "sirf,prima2-pwrc");
- if (!dn) {
dev_err(&pdev->dev, "Failed to get sirf,prima2-pwrcnode!\n");
return -ENODEV;- }
- ret = of_property_read_u32(dn, "reg", &sirf_audio_codec-
sys_pwrc_reg_base);
- if (ret < 0) {
dev_err(&pdev->dev, "Failed tp get pwrc register baseaddress\n");
return -EINVAL;- }
Should prima2-pwrc be a syscon? Not a blocker for merging this.
+#ifdef CONFIG_PM_RUNTIME +static int sirf_audio_codec_runtime_suspend(struct device *dev) {
- struct sirf_audio_codec *sirf_audio_codec = dev_get_drvdata(dev);
- regmap_update_bits(sirf_audio_codec->regmap, AUDIO_IC_CODEC_CTRL1,
(1 << sirf_audio_codec->reg_bits->codec_clk_en_bits),0);- return 0;
+}
Can you disable the clock in the clock API as well? This might allow further supply clocks to be disabled and is genarally good practice.
This is a workaround. The capture ADC and touch ADC use a same power supply, The codec ADC's change pump set or clear will impact touch ADC unstable. So It's need enable codec clock and set change pump when the Audio driver init.
Thanks RongJun Ying
+static int sirf_audio_codec_suspend(struct device *dev) {
- struct sirf_audio_codec *sirf_audio_codec = dev_get_drvdata(dev);
- regmap_read(sirf_audio_codec->regmap, AUDIO_IC_CODEC_CTRL0,
&sirf_audio_codec->reg_ctrl0);- regmap_read(sirf_audio_codec->regmap, AUDIO_IC_CODEC_CTRL1,
&sirf_audio_codec->reg_ctrl1);- sirf_audio_codec_runtime_suspend(dev);
Have you seen the series Ulf has been posting regarding the integration of runtime PM and system suspend? There's all sorts of nasty cases with this stuff unfortunately. Not sure it should be a blocker for merging though since we haven't really figured out how this stuff is supposed to work.
Member of the CSR plc group of companies. CSR plc registered in England and Wales, registered number 4187346, registered office Churchill House, Cambridge Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom More information can be found at www.csr.com. Keep up to date with CSR on our technical blog, www.csr.com/blog, CSR people blog, www.csr.com/people, YouTube, www.youtube.com/user/CSRplc, Facebook, www.facebook.com/pages/CSR/191038434253534, or follow us on Twitter at www.twitter.com/CSR_plc. New for 2014, you can now access the wide range of products powered by aptX at www.aptx.com.
On Fri, Feb 28, 2014 at 01:52:32AM +0000, Rongjun Ying wrote:
+static struct sirf_audio_codec_reg_bits
sirf_audio_codec_reg_bits_prima2 = {
- .dig_mic_en_bits = 20,
- .dig_mic_freq_bits = 21,
This looks like the sort of thing that the regmap_field layer was supposed to hide?
Do you mean I need use the regmap_field_read/write to hide these?
You should certainly consider it and if it's not a good approach understanding why may help us improve that API.
+static int sirf_audio_codec_runtime_suspend(struct device *dev) {
- struct sirf_audio_codec *sirf_audio_codec = dev_get_drvdata(dev);
- regmap_update_bits(sirf_audio_codec->regmap, AUDIO_IC_CODEC_CTRL1,
(1 << sirf_audio_codec->reg_bits->codec_clk_en_bits),0);- return 0;
+}
Can you disable the clock in the clock API as well? This might allow further supply clocks to be disabled and is genarally good practice.
This is a workaround. The capture ADC and touch ADC use a same power supply, The codec ADC's change pump set or clear will impact touch ADC unstable. So It's need enable codec clock and set change pump when the Audio driver init.
That doesn't really answer the question for me - I wasn't asking why the clock was being disabled, I was asking why the disable wasn't also being done at the clock API level.
-----Original Message----- From: Mark Brown [mailto:broonie@kernel.org] Sent: Saturday, March 01, 2014 11:17 AM To: Rongjun Ying Cc: RongJun Ying; Liam Girdwood; Jaroslav Kysela; Takashi Iwai; alsa- devel@alsa-project.org; DL-SHA-WorkGroupLinux Subject: Re: [PATCH v4-resend 1/7] ASoC: sirf: Add SiRF internal audio codec driver
On Fri, Feb 28, 2014 at 01:52:32AM +0000, Rongjun Ying wrote:
+static struct sirf_audio_codec_reg_bits
sirf_audio_codec_reg_bits_prima2 = {
- .dig_mic_en_bits = 20,
- .dig_mic_freq_bits = 21,
This looks like the sort of thing that the regmap_field layer was supposed to hide?
Do you mean I need use the regmap_field_read/write to hide these?
You should certainly consider it and if it's not a good approach understanding why may help us improve that API.
+static int sirf_audio_codec_runtime_suspend(struct device *dev)
{
- struct sirf_audio_codec *sirf_audio_codec =
dev_get_drvdata(dev);
- regmap_update_bits(sirf_audio_codec->regmap,
AUDIO_IC_CODEC_CTRL1,
(1 << sirf_audio_codec->reg_bits->codec_clk_en_bits),0);- return 0;
+}
Can you disable the clock in the clock API as well? This might allow further supply clocks to be disabled and is genarally good
practice.
This is a workaround. The capture ADC and touch ADC use a same power supply, The codec ADC's change pump set or clear will impact touch
ADC unstable.
So It's need enable codec clock and set change pump when the Audio
driver init.
That doesn't really answer the question for me - I wasn't asking why the clock was being disabled, I was asking why the disable wasn't also being done at the clock API level.
The codec clock is only used by this driver. And this clock is not managed by clock controller. The Audio controller codec is always enable. So I think it is not need abstract to general clock API.
Thanks. RongJun Ying
Member of the CSR plc group of companies. CSR plc registered in England and Wales, registered number 4187346, registered office Churchill House, Cambridge Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom More information can be found at www.csr.com. Keep up to date with CSR on our technical blog, www.csr.com/blog, CSR people blog, www.csr.com/people, YouTube, www.youtube.com/user/CSRplc, Facebook, www.facebook.com/pages/CSR/191038434253534, or follow us on Twitter at www.twitter.com/CSR_plc. New for 2014, you can now access the wide range of products powered by aptX at www.aptx.com.
On Mon, Mar 03, 2014 at 02:15:17AM +0000, Rongjun Ying wrote:
The codec clock is only used by this driver. And this clock is not managed by clock controller. The Audio controller codec is always enable. So I think it is not need abstract to general clock API.
No, you're still missing the point. You are requesting external clocks, why are you not managing those here?
2014-03-03 13:07 GMT+08:00 Mark Brown broonie@kernel.org:
On Mon, Mar 03, 2014 at 02:15:17AM +0000, Rongjun Ying wrote:
The codec clock is only used by this driver. And this clock is not managed by clock controller. The Audio controller codec is always enable. So I think it is not need abstract to general clock API.
No, you're still missing the point. You are requesting external clocks, why are you not managing those here?
Hi Mark, here the clock is an internal clock in the internal codec. the external clock of audio controller is managed in system suspend/resume as you see. but they are not managed in runtime suspend/resume here because the external clock is always enabled to make sure the charge pump to be working to make the board have stable current and voltage. otherwise, touchscreen ADC will not be accurate.
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-barry
On Mon, Mar 03, 2014 at 03:48:02PM +0800, Barry Song wrote:
here the clock is an internal clock in the internal codec. the external clock of audio controller is managed in system suspend/resume as you see. but they are not managed in runtime suspend/resume here because the external clock is always enabled to make sure the charge pump to be working to make the board have stable current and voltage. otherwise, touchscreen ADC will not be accurate.
Why aren't these drivers keeping the clock enabled themselves?
2014-03-04 12:58 GMT+08:00 Mark Brown broonie@kernel.org:
On Mon, Mar 03, 2014 at 03:48:02PM +0800, Barry Song wrote:
here the clock is an internal clock in the internal codec. the external clock of audio controller is managed in system suspend/resume as you see. but they are not managed in runtime suspend/resume here because the external clock is always enabled to make sure the charge pump to be working to make the board have stable current and voltage. otherwise, touchscreen ADC will not be accurate.
Why aren't these drivers keeping the clock enabled themselves?
The charge pump register is a part of the audio controller. But this register is impacted the touchscreen ADC stable. So when the audio codec driver probe, It always enable the audio controller's clock, and must be set the charge pump register.
ret = clk_prepare_enable(sirf_audio_codec->clk); if (ret) { dev_err(&pdev->dev, "Enable clock failed.\n"); return ret; } ..... /* * Always open charge pump, if not, when the charge pump closed the * adc will not stable */ regmap_update_bits(sirf_audio_codec->regmap, AUDIO_IC_CODEC_CTRL0, IC_CPFREQ, IC_CPFREQ);
if (of_device_is_compatible(pdev->dev.of_node, "sirf,atlas6-audio-codec")) regmap_update_bits(sirf_audio_codec->regmap, AUDIO_IC_CODEC_CTRL0, IC_CPEN, IC_CPEN);
Thanks RongJun Ying
On Tue, Mar 04, 2014 at 01:11:50PM +0800, RongJun Ying wrote:
2014-03-04 12:58 GMT+08:00 Mark Brown broonie@kernel.org:
On Mon, Mar 03, 2014 at 03:48:02PM +0800, Barry Song wrote:
here the clock is an internal clock in the internal codec. the external clock of audio controller is managed in system suspend/resume as you see. but they are not managed in runtime suspend/resume here because the external clock is always enabled to make sure the charge pump to be working to make the board have stable current and voltage. otherwise, touchscreen ADC will not be accurate.
Why aren't these drivers keeping the clock enabled themselves?
The charge pump register is a part of the audio controller. But this register is impacted the touchscreen ADC stable. So when the audio codec driver probe, It always enable the audio controller's clock, and must be set the charge pump register.
I'm sorry but I just can't follow what you're talking about at all. In one mail above you were talking about an external clock but here you're talking about the charge pump.
2014-03-05 11:34 GMT+08:00 Mark Brown broonie@kernel.org:
On Tue, Mar 04, 2014 at 01:11:50PM +0800, RongJun Ying wrote:
2014-03-04 12:58 GMT+08:00 Mark Brown broonie@kernel.org:
On Mon, Mar 03, 2014 at 03:48:02PM +0800, Barry Song wrote:
here the clock is an internal clock in the internal codec. the external clock of audio controller is managed in system suspend/resume as you see. but they are not managed in runtime suspend/resume here because the external clock is always enabled to make sure the charge pump to be working to make the board have stable current and voltage. otherwise, touchscreen ADC will not be accurate.
Why aren't these drivers keeping the clock enabled themselves?
The charge pump register is a part of the audio controller. But this register is impacted the touchscreen ADC stable. So when the audio codec driver probe, It always enable the audio controller's clock, and must be set the charge pump register.
I'm sorry but I just can't follow what you're talking about at all. In one mail above you were talking about an external clock but here you're talking about the charge pump.
The SiRF internal audio system has two clocks. The one is the audio module clock. The I2S, internal audio and AC97 module use same clock. This clock is managed by clock controller. And use the clock API to enable/disable it. ret = clk_prepare_enable(sirf_audio_codec->clk); .... clk_disable_unprepare(sirf_audio_codec->clk); This clock need keeping enabled. The reason is the charge pump need alway set. Otherwise, the touch ADC is unstable.
The other clock is the internal audio codec clock. This clock is not managed by clock controller. Enable and disable this clock need update the audio codec's register. When runtime resume, this clock is enabled and reset it:
+static int sirf_audio_codec_runtime_resume(struct device *dev) +{ + struct sirf_audio_codec *sirf_audio_codec = dev_get_drvdata(dev); + regmap_update_bits(sirf_audio_codec->regmap, AUDIO_IC_CODEC_CTRL1, + (1 << sirf_audio_codec->reg_bits->codec_clk_en_bits) | + (1 << sirf_audio_codec->reg_bits->por_bits), + (1 << sirf_audio_codec->reg_bits->codec_clk_en_bits)); + msleep(20); + regmap_update_bits(sirf_audio_codec->regmap, AUDIO_IC_CODEC_CTRL1, + (1 << sirf_audio_codec->reg_bits->por_bits), + (1 << sirf_audio_codec->reg_bits->por_bits)); + return 0; +}
And runtime suspend, this clock is disabled:
+static int sirf_audio_codec_runtime_suspend(struct device *dev) +{ + struct sirf_audio_codec *sirf_audio_codec = dev_get_drvdata(dev); + regmap_update_bits(sirf_audio_codec->regmap, AUDIO_IC_CODEC_CTRL1, + (1 << sirf_audio_codec->reg_bits->codec_clk_en_bits), + 0); + return 0; +}
In v5, I use the codecclk supply to instead the runtime resume/suspend:
+static void enable_and_reset_codec(struct regmap *regmap, + u32 codec_enable_bits, u32 codec_reset_bits) +{ + regmap_update_bits(regmap, AUDIO_IC_CODEC_CTRL1, + codec_enable_bits | codec_reset_bits, + codec_enable_bits | ~codec_reset_bits); + msleep(20); + regmap_update_bits(regmap, AUDIO_IC_CODEC_CTRL1, + codec_reset_bits, codec_reset_bits); +} + +static int atlas6_codec_enable_and_reset_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ +#define ATLAS6_CODEC_ENABLE_BITS (1 << 29) +#define ATLAS6_CODEC_RESET_BITS (1 << 28) + struct sirf_audio_codec *sirf_audio_codec = dev_get_drvdata(w->codec->dev); + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + enable_and_reset_codec(sirf_audio_codec->regmap, + ATLAS6_CODEC_ENABLE_BITS, ATLAS6_CODEC_RESET_BITS); + break; + case SND_SOC_DAPM_POST_PMD: + regmap_update_bits(sirf_audio_codec->regmap, + AUDIO_IC_CODEC_CTRL1, ATLAS6_CODEC_ENABLE_BITS, + ~ATLAS6_CODEC_ENABLE_BITS); + break; + default: + break; + } + + return 0; +} + +static int prima2_codec_enable_and_reset_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ +#define PRIMA2_CODEC_ENABLE_BITS (1 << 27) +#define PRIMA2_CODEC_RESET_BITS (1 << 26) + struct sirf_audio_codec *sirf_audio_codec = dev_get_drvdata(w->codec->dev); + switch (event) { + case SND_SOC_DAPM_POST_PMU: + enable_and_reset_codec(sirf_audio_codec->regmap, + PRIMA2_CODEC_ENABLE_BITS, PRIMA2_CODEC_RESET_BITS); + break; + case SND_SOC_DAPM_POST_PMD: + regmap_update_bits(sirf_audio_codec->regmap, + AUDIO_IC_CODEC_CTRL1, PRIMA2_CODEC_ENABLE_BITS, + ~PRIMA2_CODEC_ENABLE_BITS); + break; + default: + break; + } + + return 0; +}
+static const struct snd_soc_dapm_widget atlas6_codec_clock_dapm_widget = + SND_SOC_DAPM_SUPPLY("codecclk", SND_SOC_NOPM, 0, 0, + atlas6_codec_enable_and_reset_event, + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD); + +static const struct snd_soc_dapm_widget prima2_codec_clock_dapm_widget = + SND_SOC_DAPM_SUPPLY("codecclk", SND_SOC_NOPM, 0, 0, + prima2_codec_enable_and_reset_event, + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD);
Thanks
From: Rongjun Ying rongjun.ying@csr.com
This driver is used by SIRF internal audio codec. Use dedicated SiRF audio port TXFIFO and RXFIFO Supports two DMA channels for SiRF audio port TXFIFO and RXFIFO The audio port like as audio bus such as i2s.
Signed-off-by: Rongjun Ying rongjun.ying@csr.com --- -v4: 1. Add SiRF audio port driver split from sirf-soc-inner driver. 2. Use the generic dmaengine pcm register. 3. Add binding document. 4. Use MMIO regmap.
.../devicetree/bindings/sound/sirf-audio-port.txt | 20 ++ sound/soc/Kconfig | 1 + sound/soc/Makefile | 1 + sound/soc/sirf/Kconfig | 9 + sound/soc/sirf/Makefile | 3 + sound/soc/sirf/sirf-audio-port.c | 194 ++++++++++++++++++++ sound/soc/sirf/sirf-audio-port.h | 62 +++++++ 7 files changed, 290 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/sirf-audio-port.txt create mode 100644 sound/soc/sirf/Kconfig create mode 100644 sound/soc/sirf/Makefile create mode 100644 sound/soc/sirf/sirf-audio-port.c create mode 100644 sound/soc/sirf/sirf-audio-port.h
diff --git a/Documentation/devicetree/bindings/sound/sirf-audio-port.txt b/Documentation/devicetree/bindings/sound/sirf-audio-port.txt new file mode 100644 index 0000000..1f66de3 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/sirf-audio-port.txt @@ -0,0 +1,20 @@ +* SiRF SoC audio port + +Required properties: +- compatible: "sirf,audio-port" +- reg: Base address and size entries: +- dmas: List of DMA controller phandle and DMA request line ordered pairs. +- dma-names: Identifier string for each DMA request line in the dmas property. + These strings correspond 1:1 with the ordered pairs in dmas. + + One of the DMA channels will be responsible for transmission (should be + named "tx") and one for reception (should be named "rx"). + +Example: + +audioport: audioport@b0040000 { + compatible = "sirf,audio-port"; + reg = <0xb0040000 0x10000>; + dmas = <&dmac1 3>, <&dmac1 8>; + dma-names = "rx", "tx"; +}; diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig index d62ce48..23946c2 100644 --- a/sound/soc/Kconfig +++ b/sound/soc/Kconfig @@ -54,6 +54,7 @@ source "sound/soc/spear/Kconfig" source "sound/soc/tegra/Kconfig" source "sound/soc/txx9/Kconfig" source "sound/soc/ux500/Kconfig" +source "sound/soc/sirf/Kconfig"
# Supported codecs source "sound/soc/codecs/Kconfig" diff --git a/sound/soc/Makefile b/sound/soc/Makefile index 62a1822..f09210c 100644 --- a/sound/soc/Makefile +++ b/sound/soc/Makefile @@ -31,3 +31,4 @@ obj-$(CONFIG_SND_SOC) += spear/ obj-$(CONFIG_SND_SOC) += tegra/ obj-$(CONFIG_SND_SOC) += txx9/ obj-$(CONFIG_SND_SOC) += ux500/ +obj-$(CONFIG_SND_SOC) += sirf/ diff --git a/sound/soc/sirf/Kconfig b/sound/soc/sirf/Kconfig new file mode 100644 index 0000000..5b5407f --- /dev/null +++ b/sound/soc/sirf/Kconfig @@ -0,0 +1,9 @@ +config SND_SOC_SIRF + tristate "SoC Audio for the SiRF SoC chips" + depends on ARCH_SIRF || COMPILE_TEST + select SND_SOC_GENERIC_DMAENGINE_PCM + +config SND_SOC_SIRF_AUDIO_PORT + select REGMAP_MMIO + tristate + diff --git a/sound/soc/sirf/Makefile b/sound/soc/sirf/Makefile new file mode 100644 index 0000000..fb012c8 --- /dev/null +++ b/sound/soc/sirf/Makefile @@ -0,0 +1,3 @@ +snd-soc-sirf-audio-port-objs := sirf-audio-port.o + +obj-$(CONFIG_SND_SOC_SIRF_AUDIO_PORT) += snd-soc-sirf-audio-port.o diff --git a/sound/soc/sirf/sirf-audio-port.c b/sound/soc/sirf/sirf-audio-port.c new file mode 100644 index 0000000..4169b59 --- /dev/null +++ b/sound/soc/sirf/sirf-audio-port.c @@ -0,0 +1,194 @@ +/* + * SiRF Audio port driver + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ +#include <linux/module.h> +#include <linux/io.h> +#include <linux/regmap.h> +#include <sound/soc.h> +#include <sound/dmaengine_pcm.h> + +#include "sirf-audio-port.h" + +struct sirf_audio_port { + struct regmap *regmap; + struct snd_dmaengine_dai_dma_data playback_dma_data; + struct snd_dmaengine_dai_dma_data capture_dma_data; +}; + +static inline void sirf_audio_port_tx_enable(struct sirf_audio_port *port) +{ + regmap_update_bits(port->regmap, AUDIO_PORT_IC_TXFIFO_OP, + AUDIO_FIFO_RESET, AUDIO_FIFO_RESET); + regmap_write(port->regmap, AUDIO_PORT_IC_TXFIFO_INT_MSK, 0); + regmap_write(port->regmap, AUDIO_PORT_IC_TXFIFO_OP, 0); + regmap_update_bits(port->regmap, AUDIO_PORT_IC_TXFIFO_OP, + AUDIO_FIFO_START, AUDIO_FIFO_START); + regmap_update_bits(port->regmap, AUDIO_PORT_IC_CODEC_TX_CTRL, + IC_TX_ENABLE, IC_TX_ENABLE); +} + +static inline void sirf_audio_port_tx_disable(struct sirf_audio_port *port) +{ + regmap_write(port->regmap, AUDIO_PORT_IC_TXFIFO_OP, 0); + regmap_update_bits(port->regmap, AUDIO_PORT_IC_CODEC_TX_CTRL, + IC_TX_ENABLE, ~IC_TX_ENABLE); +} + +static inline void sirf_audio_port_rx_enable(struct sirf_audio_port *port, + int channels) +{ + regmap_update_bits(port->regmap, AUDIO_PORT_IC_RXFIFO_OP, + AUDIO_FIFO_RESET, AUDIO_FIFO_RESET); + regmap_write(port->regmap, AUDIO_PORT_IC_RXFIFO_INT_MSK, 0); + regmap_write(port->regmap, AUDIO_PORT_IC_RXFIFO_OP, 0); + regmap_update_bits(port->regmap, AUDIO_PORT_IC_RXFIFO_OP, + AUDIO_FIFO_START, AUDIO_FIFO_START); + if (channels == 1) + regmap_update_bits(port->regmap, AUDIO_PORT_IC_CODEC_RX_CTRL, + IC_RX_ENABLE_MONO, IC_RX_ENABLE_MONO); + else + regmap_update_bits(port->regmap, AUDIO_PORT_IC_CODEC_RX_CTRL, + IC_RX_ENABLE_STEREO, IC_RX_ENABLE_STEREO); +} + +static inline void sirf_audio_port_rx_disable(struct sirf_audio_port *port) +{ + regmap_update_bits(port->regmap, AUDIO_PORT_IC_CODEC_RX_CTRL, + IC_RX_ENABLE_STEREO, ~IC_RX_ENABLE_STEREO); +} + +static int sirf_audio_port_dai_probe(struct snd_soc_dai *dai) +{ + struct sirf_audio_port *port = snd_soc_dai_get_drvdata(dai); + snd_soc_dai_init_dma_data(dai, &port->playback_dma_data, + &port->capture_dma_data); + return 0; +} + +static int sirf_audio_port_trigger(struct snd_pcm_substream *substream, int cmd, + struct snd_soc_dai *dai) +{ + struct sirf_audio_port *port = snd_soc_dai_get_drvdata(dai); + int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + if (playback) + sirf_audio_port_tx_disable(port); + else + sirf_audio_port_rx_disable(port); + break; + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + if (playback) + sirf_audio_port_tx_enable(port); + else + sirf_audio_port_rx_enable(port, + substream->runtime->channels); + break; + default: + return -EINVAL; + } + + return 0; +} + +static const struct snd_soc_dai_ops sirf_audio_port_dai_ops = { + .trigger = sirf_audio_port_trigger, +}; + +static struct snd_soc_dai_driver sirf_audio_port_dai = { + .probe = sirf_audio_port_dai_probe, + .name = "sirf-audio-port", + .id = 0, + .playback = { + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + }, + .capture = { + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + }, + .ops = &sirf_audio_port_dai_ops, +}; + +static const struct snd_soc_component_driver sirf_audio_port_component = { + .name = "sirf-audio-port", +}; + +static const struct regmap_config sirf_audio_port_regmap_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = AUDIO_PORT_IC_RXFIFO_INT_MSK, + .cache_type = REGCACHE_NONE, +}; + +static int sirf_audio_port_probe(struct platform_device *pdev) +{ + int ret; + struct sirf_audio_port *port; + void __iomem *base; + struct resource *mem_res; + + port = devm_kzalloc(&pdev->dev, + sizeof(struct sirf_audio_port), GFP_KERNEL); + if (!port) + return -ENOMEM; + + mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!mem_res) { + dev_err(&pdev->dev, "no mem resource?\n"); + return -ENODEV; + } + + base = devm_ioremap(&pdev->dev, mem_res->start, + resource_size(mem_res)); + if (base == NULL) + return -ENOMEM; + + port->regmap = devm_regmap_init_mmio(&pdev->dev, base, + &sirf_audio_port_regmap_config); + if (IS_ERR(port->regmap)) + return PTR_ERR(port->regmap); + + ret = devm_snd_soc_register_component(&pdev->dev, + &sirf_audio_port_component, &sirf_audio_port_dai, 1); + if (ret) + return ret; + + platform_set_drvdata(pdev, port); + return devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); +} + +static const struct of_device_id sirf_audio_port_of_match[] = { + { .compatible = "sirf,audio-port", }, + {} +}; +MODULE_DEVICE_TABLE(of, sirf_audio_port_of_match); + +static struct platform_driver sirf_audio_port_driver = { + .driver = { + .name = "sirf-audio-port", + .owner = THIS_MODULE, + .of_match_table = sirf_audio_port_of_match, + }, + .probe = sirf_audio_port_probe, +}; + +module_platform_driver(sirf_audio_port_driver); + +MODULE_DESCRIPTION("SiRF Audio Port driver"); +MODULE_AUTHOR("RongJun Ying Rongjun.Ying@csr.com"); +MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/sirf/sirf-audio-port.h b/sound/soc/sirf/sirf-audio-port.h new file mode 100644 index 0000000..f32dc54 --- /dev/null +++ b/sound/soc/sirf/sirf-audio-port.h @@ -0,0 +1,62 @@ +/* + * SiRF Audio port controllers define + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#ifndef _SIRF_AUDIO_PORT_H +#define _SIRF_AUDIO_PORT_H + +#define AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK 0x3F +#define AUDIO_PORT_TX_FIFO_SC_OFFSET 0 +#define AUDIO_PORT_TX_FIFO_LC_OFFSET 10 +#define AUDIO_PORT_TX_FIFO_HC_OFFSET 20 + +#define TX_FIFO_SC(x) (((x) & AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK) \ + << AUDIO_PORT_TX_FIFO_SC_OFFSET) +#define TX_FIFO_LC(x) (((x) & AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK) \ + << AUDIO_PORT_TX_FIFO_LC_OFFSET) +#define TX_FIFO_HC(x) (((x) & AUDIO_PORT_TX_FIFO_LEVEL_CHECK_MASK) \ + << AUDIO_PORT_TX_FIFO_HC_OFFSET) + +#define AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK 0x0F +#define AUDIO_PORT_RX_FIFO_SC_OFFSET 0 +#define AUDIO_PORT_RX_FIFO_LC_OFFSET 10 +#define AUDIO_PORT_RX_FIFO_HC_OFFSET 20 + +#define RX_FIFO_SC(x) (((x) & AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK) \ + << AUDIO_PORT_RX_FIFO_SC_OFFSET) +#define RX_FIFO_LC(x) (((x) & AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK) \ + << AUDIO_PORT_RX_FIFO_LC_OFFSET) +#define RX_FIFO_HC(x) (((x) & AUDIO_PORT_RX_FIFO_LEVEL_CHECK_MASK) \ + << AUDIO_PORT_RX_FIFO_HC_OFFSET) +#define AUDIO_PORT_IC_CODEC_TX_CTRL (0x00F4) +#define AUDIO_PORT_IC_CODEC_RX_CTRL (0x00F8) + +#define AUDIO_PORT_IC_TXFIFO_OP (0x00FC) +#define AUDIO_PORT_IC_TXFIFO_LEV_CHK (0x0100) +#define AUDIO_PORT_IC_TXFIFO_STS (0x0104) +#define AUDIO_PORT_IC_TXFIFO_INT (0x0108) +#define AUDIO_PORT_IC_TXFIFO_INT_MSK (0x010C) + +#define AUDIO_PORT_IC_RXFIFO_OP (0x0110) +#define AUDIO_PORT_IC_RXFIFO_LEV_CHK (0x0114) +#define AUDIO_PORT_IC_RXFIFO_STS (0x0118) +#define AUDIO_PORT_IC_RXFIFO_INT (0x011C) +#define AUDIO_PORT_IC_RXFIFO_INT_MSK (0x0120) + +#define AUDIO_FIFO_START (1 << 0) +#define AUDIO_FIFO_RESET (1 << 1) + +#define AUDIO_FIFO_FULL (1 << 0) +#define AUDIO_FIFO_EMPTY (1 << 1) +#define AUDIO_FIFO_OFLOW (1 << 2) +#define AUDIO_FIFO_UFLOW (1 << 3) + +#define IC_TX_ENABLE (0x03) +#define IC_RX_ENABLE_MONO (0x01) +#define IC_RX_ENABLE_STEREO (0x03) + +#endif /*__SIRF_AUDIO_PORT_H*/
On Wed, Feb 26, 2014 at 03:22:17PM +0800, RongJun Ying wrote:
A couple of very small issues below but otherwise looks good.
index d62ce48..23946c2 100644 --- a/sound/soc/Kconfig +++ b/sound/soc/Kconfig @@ -54,6 +54,7 @@ source "sound/soc/spear/Kconfig" source "sound/soc/tegra/Kconfig" source "sound/soc/txx9/Kconfig" source "sound/soc/ux500/Kconfig" +source "sound/soc/sirf/Kconfig"
Keep Kconfig and Makefile sorted.
+static inline void sirf_audio_port_tx_enable(struct sirf_audio_port *port)
Drop the inlines, let the compiler do it if it decides it's worthwhile.
From: Rongjun Ying rongjun.ying@csr.com
This connects platform DAI, SiRF internal audio codec DAI and SiRF auido port DAI together and works as a mach driver.
Signed-off-by: Rongjun Ying rongjun.ying@csr.com --- .../devicetree/bindings/sound/sirf-audio.txt | 41 +++++ sound/soc/sirf/Kconfig | 5 + sound/soc/sirf/Makefile | 2 + sound/soc/sirf/sirf-audio.c | 156 ++++++++++++++++++++ 4 files changed, 204 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/sirf-audio.txt create mode 100644 sound/soc/sirf/sirf-audio.c
diff --git a/Documentation/devicetree/bindings/sound/sirf-audio.txt b/Documentation/devicetree/bindings/sound/sirf-audio.txt new file mode 100644 index 0000000..c88882c --- /dev/null +++ b/Documentation/devicetree/bindings/sound/sirf-audio.txt @@ -0,0 +1,41 @@ +* SiRF atlas6 and prima2 internal audio codec and port based audio setups + +Required properties: +- compatible: "sirf,sirf-audio-card" +- sirf,audio-platform: phandle for the platform node +- sirf,audio-codec: phandle for the SiRF internal codec node + +Optional properties: +- hp-pa-gpios: Need to be present if the board need control external + headphone amplifier. +- spk-pa-gpios: Need to be present if the board need control external + speaker amplifier. +- hp-switch-gpios: Need to be present if the board capable to detect jack + insertion, removal. + +Available audio endpoints for the audio-routing table: + +Board connectors: + * Headset Stereophone + * Ext Spk + * Line In + * Mic + +SiRF internal audio codec pins: + * HPOUTL + * HPOUTR + * SPKOUT + * Ext Mic + * Mic Bias + +Example: + +sound { + compatible = "sirf,sirf-audio-card"; + sirf,audio-codec = <&audiocodec>; + sirf,audio-platform = <&audioport>; + hp-pa-gpios = <&gpio 44 0>; + spk-pa-gpios = <&gpio 46 0>; + hp-switch-gpios = <&gpio 45 0>; +}; + diff --git a/sound/soc/sirf/Kconfig b/sound/soc/sirf/Kconfig index 5b5407f..a8e083b 100644 --- a/sound/soc/sirf/Kconfig +++ b/sound/soc/sirf/Kconfig @@ -7,3 +7,8 @@ config SND_SOC_SIRF_AUDIO_PORT select REGMAP_MMIO tristate
+config SND_SOC_SIRF_AUDIO + tristate "SoC Audio support for SiRF internal audio codec" + depends on SND_SOC_SIRF + select SND_SOC_SIRF_AUDIO_CODEC + select SND_SOC_SIRF_AUDIO_PORT diff --git a/sound/soc/sirf/Makefile b/sound/soc/sirf/Makefile index fb012c8..4eea904 100644 --- a/sound/soc/sirf/Makefile +++ b/sound/soc/sirf/Makefile @@ -1,3 +1,5 @@ snd-soc-sirf-audio-port-objs := sirf-audio-port.o +snd-soc-sirf-audio-objs := sirf-audio.o
obj-$(CONFIG_SND_SOC_SIRF_AUDIO_PORT) += snd-soc-sirf-audio-port.o +obj-$(CONFIG_SND_SOC_SIRF_AUDIO) += snd-soc-sirf-audio.o diff --git a/sound/soc/sirf/sirf-audio.c b/sound/soc/sirf/sirf-audio.c new file mode 100644 index 0000000..ecef510 --- /dev/null +++ b/sound/soc/sirf/sirf-audio.c @@ -0,0 +1,156 @@ +/* + * SiRF audio card driver + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#include <linux/platform_device.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/gpio.h> +#include <linux/of_gpio.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/soc.h> + +struct sirf_audio_card { + unsigned int gpio_hp_pa; + unsigned int gpio_spk_pa; +}; + +static int sirf_audio_hp_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *ctrl, int event) +{ + struct snd_soc_dapm_context *dapm = w->dapm; + struct snd_soc_card *card = dapm->card; + struct sirf_audio_card *sirf_audio_card = snd_soc_card_get_drvdata(card); + int on = !SND_SOC_DAPM_EVENT_OFF(event); + if (gpio_is_valid(sirf_audio_card->gpio_hp_pa)) + gpio_set_value(sirf_audio_card->gpio_hp_pa, on); + return 0; +} + +static int sirf_audio_spk_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *ctrl, int event) +{ + struct snd_soc_dapm_context *dapm = w->dapm; + struct snd_soc_card *card = dapm->card; + struct sirf_audio_card *sirf_audio_card = snd_soc_card_get_drvdata(card); + int on = !SND_SOC_DAPM_EVENT_OFF(event); + + if (gpio_is_valid(sirf_audio_card->gpio_spk_pa)) + gpio_set_value(sirf_audio_card->gpio_spk_pa, on); + + return 0; +} +static const struct snd_soc_dapm_widget sirf_audio_dapm_widgets[] = { + SND_SOC_DAPM_HP("Hp", sirf_audio_hp_event), + SND_SOC_DAPM_SPK("Ext Spk", sirf_audio_spk_event), + SND_SOC_DAPM_MIC("Ext Mic", NULL), +}; + +static const struct snd_soc_dapm_route intercon[] = { + {"Hp", NULL, "HPOUTL"}, + {"Hp", NULL, "HPOUTR"}, + {"Ext Spk", NULL, "SPKOUT"}, + {"MICIN1", NULL, "Mic Bias"}, + {"Mic Bias", NULL, "Ext Mic"}, +}; + +/* Digital audio interface glue - connects codec <--> CPU */ +static struct snd_soc_dai_link sirf_audio_dai_link[] = { + { + .name = "SiRF audio card", + .stream_name = "SiRF audio HiFi", + .codec_dai_name = "sirf-audio-codec", + }, +}; + +/* Audio machine driver */ +static struct snd_soc_card snd_soc_sirf_audio_card = { + .name = "SiRF audio card", + .owner = THIS_MODULE, + .dai_link = sirf_audio_dai_link, + .num_links = ARRAY_SIZE(sirf_audio_dai_link), + .dapm_widgets = sirf_audio_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(sirf_audio_dapm_widgets), + .dapm_routes = intercon, + .num_dapm_routes = ARRAY_SIZE(intercon), +}; + +static int sirf_audio_probe(struct platform_device *pdev) +{ + struct snd_soc_card *card = &snd_soc_sirf_audio_card; + struct sirf_audio_card *sirf_audio_card; + int ret; + + sirf_audio_card = devm_kzalloc(&pdev->dev, sizeof(struct sirf_audio_card), + GFP_KERNEL); + if (sirf_audio_card == NULL) + return -ENOMEM; + + sirf_audio_dai_link[0].cpu_of_node = + of_parse_phandle(pdev->dev.of_node, "sirf,audio-platform", 0); + sirf_audio_dai_link[0].platform_of_node = + of_parse_phandle(pdev->dev.of_node, "sirf,audio-platform", 0); + sirf_audio_dai_link[0].codec_of_node = + of_parse_phandle(pdev->dev.of_node, "sirf,audio-codec", 0); + sirf_audio_card->gpio_spk_pa = of_get_named_gpio(pdev->dev.of_node, + "spk-pa-gpios", 0); + sirf_audio_card->gpio_hp_pa = of_get_named_gpio(pdev->dev.of_node, + "hp-pa-gpios", 0); + if (gpio_is_valid(sirf_audio_card->gpio_spk_pa)) { + ret = devm_gpio_request_one(&pdev->dev, + sirf_audio_card->gpio_spk_pa, + GPIOF_OUT_INIT_LOW, "SPA_PA_SD"); + if (ret) { + dev_err(&pdev->dev, + "Failed to request GPIO_%d for reset: %d\n", + sirf_audio_card->gpio_spk_pa, ret); + return ret; + } + } + if (gpio_is_valid(sirf_audio_card->gpio_hp_pa)) { + ret = devm_gpio_request_one(&pdev->dev, + sirf_audio_card->gpio_hp_pa, + GPIOF_OUT_INIT_LOW, "HP_PA_SD"); + if (ret) { + dev_err(&pdev->dev, + "Failed to request GPIO_%d for reset: %d\n", + sirf_audio_card->gpio_hp_pa, ret); + return ret; + } + } + + card->dev = &pdev->dev; + snd_soc_card_set_drvdata(card, sirf_audio_card); + + ret = devm_snd_soc_register_card(&pdev->dev, card); + if (ret) + dev_err(&pdev->dev, "snd_soc_register_card() failed:%d\n", ret); + + return ret; +} + +static const struct of_device_id sirf_audio_of_match[] = { + {.compatible = "sirf,sirf-audio-card", }, + { }, +}; +MODULE_DEVICE_TABLE(of, sirf_audio_of_match); + +static struct platform_driver sirf_audio_driver = { + .driver = { + .name = "sirf-audio-card", + .owner = THIS_MODULE, + .pm = &snd_soc_pm_ops, + .of_match_table = sirf_audio_of_match, + }, + .probe = sirf_audio_probe, +}; +module_platform_driver(sirf_audio_driver); + +MODULE_AUTHOR("RongJun Ying RongJun.Ying@csr.com"); +MODULE_DESCRIPTION("ALSA SoC SIRF audio card driver"); +MODULE_LICENSE("GPL v2");
From: Rongjun Ying rongjun.ying@csr.com
iThis patch adds ASoC support for SiRF SoCs I2S modules. Features include: 1. I2S bus specification compliant (Released by Philips Semiconductors in June, 1996) 2. Support both master and slave mode. 3. Provides MCLK to I2S CODEC in I2S master mode 4. Supports 16-bit resolution playback 5. Supports 16-bit resolution record 6 .Supports 2 channel record 7. Supports 2 channel and 6 channel mode playback 8. Frame length, left channel length and right channel length are all programmable 9. Supports two DMA channels for TXFIFO and RXFIFO 10. Supports floating mode (x_ac97_dout can be configured as input)
Signed-off-by: Rongjun Ying rongjun.ying@csr.com --- -v4: 1. Add binding document. 2. Use MMIO regmap.
.../devicetree/bindings/sound/sirf-i2s.txt | 27 ++ sound/soc/sirf/Kconfig | 4 + sound/soc/sirf/Makefile | 2 + sound/soc/sirf/sirf-i2s.c | 438 ++++++++++++++++++++ sound/soc/sirf/sirf-i2s.h | 88 ++++ 5 files changed, 559 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/sirf-i2s.txt create mode 100644 sound/soc/sirf/sirf-i2s.c create mode 100644 sound/soc/sirf/sirf-i2s.h
diff --git a/Documentation/devicetree/bindings/sound/sirf-i2s.txt b/Documentation/devicetree/bindings/sound/sirf-i2s.txt new file mode 100644 index 0000000..cbff8a8 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/sirf-i2s.txt @@ -0,0 +1,27 @@ +* SiRF SoC I2S module + +Required properties: +- compatible: "sirf,prima2-i2s" +- reg: Base address and size entries: +- dmas: List of DMA controller phandle and DMA request line ordered pairs. +- dma-names: Identifier string for each DMA request line in the dmas property. + These strings correspond 1:1 with the ordered pairs in dmas. + + One of the DMA channels will be responsible for transmission (should be + named "tx") and one for reception (should be named "rx"). + +- clocks: I2S controller clock source +- pinctrl-names: Must contain a "default" entry. +- pinctrl-NNN: One property must exist for each entry in pinctrl-names. + +Example: + +i2s: i2s@b0040000 { + compatible = "sirf,prima2-i2s"; + reg = <0xb0040000 0x10000>; + dmas = <&dmac1 6>, <&dmac1 12>; + dma-names = "rx", "tx"; + clocks = <&clks 27>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s_pins_a>; +}; diff --git a/sound/soc/sirf/Kconfig b/sound/soc/sirf/Kconfig index a8e083b..2fca80a 100644 --- a/sound/soc/sirf/Kconfig +++ b/sound/soc/sirf/Kconfig @@ -12,3 +12,7 @@ config SND_SOC_SIRF_AUDIO depends on SND_SOC_SIRF select SND_SOC_SIRF_AUDIO_CODEC select SND_SOC_SIRF_AUDIO_PORT + +config SND_SOC_SIRF_I2S + select REGMAP_MMIO + tristate diff --git a/sound/soc/sirf/Makefile b/sound/soc/sirf/Makefile index 4eea904..2de3cf8 100644 --- a/sound/soc/sirf/Makefile +++ b/sound/soc/sirf/Makefile @@ -1,5 +1,7 @@ snd-soc-sirf-audio-port-objs := sirf-audio-port.o snd-soc-sirf-audio-objs := sirf-audio.o +snd-soc-sirf-i2s-objs := sirf-i2s.o
obj-$(CONFIG_SND_SOC_SIRF_AUDIO_PORT) += snd-soc-sirf-audio-port.o obj-$(CONFIG_SND_SOC_SIRF_AUDIO) += snd-soc-sirf-audio.o +obj-$(CONFIG_SND_SOC_SIRF_I2S) += snd-soc-sirf-i2s.o diff --git a/sound/soc/sirf/sirf-i2s.c b/sound/soc/sirf/sirf-i2s.c new file mode 100644 index 0000000..6da4d61 --- /dev/null +++ b/sound/soc/sirf/sirf-i2s.c @@ -0,0 +1,438 @@ +/* + * SiRF I2S driver + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ +#include <linux/module.h> +#include <linux/io.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/pm_runtime.h> +#include <linux/clk.h> +#include <linux/regmap.h> +#include <sound/soc.h> +#include <sound/pcm_params.h> +#include <sound/dmaengine_pcm.h> + +#include "sirf-i2s.h" + +struct sirf_i2s { + struct regmap *regmap; + struct clk *clk; + u32 i2s_ctrl; + u32 i2s_ctrl_tx_rx_en; + bool master; + int ext_clk; + int src_clk_rate; + struct snd_dmaengine_dai_dma_data playback_dma_data; + struct snd_dmaengine_dai_dma_data capture_dma_data; +}; + +static int sirf_i2s_dai_probe(struct snd_soc_dai *dai) +{ + struct sirf_i2s *i2s = snd_soc_dai_get_drvdata(dai); + snd_soc_dai_init_dma_data(dai, &i2s->playback_dma_data, + &i2s->capture_dma_data); + return 0; +} + +static inline void sirf_i2s_tx_enable(struct sirf_i2s *i2s) +{ + /* First start the FIFO, then enable the tx/rx */ + regmap_update_bits(i2s->regmap, AUDIO_CTRL_I2S_TXFIFO_OP, + AUDIO_FIFO_RESET, AUDIO_FIFO_RESET); + regmap_update_bits(i2s->regmap, AUDIO_CTRL_I2S_TXFIFO_OP, + AUDIO_FIFO_START, AUDIO_FIFO_RESET); + regmap_update_bits(i2s->regmap, AUDIO_CTRL_I2S_TX_RX_EN, + I2S_TX_ENABLE | I2S_DOUT_OE, + I2S_TX_ENABLE | I2S_DOUT_OE); +} + +static inline void sirf_i2s_tx_disable(struct sirf_i2s *i2s) +{ + regmap_update_bits(i2s->regmap, AUDIO_CTRL_I2S_TX_RX_EN, + I2S_TX_ENABLE, ~I2S_TX_ENABLE); + /* First disable the tx/rx, then stop the FIFO */ + regmap_write(i2s->regmap, AUDIO_CTRL_I2S_TXFIFO_OP, 0); +} + +static inline void sirf_i2s_rx_enable(struct sirf_i2s *i2s) +{ + /* First start the FIFO, then enable the tx/rx */ + regmap_update_bits(i2s->regmap, AUDIO_CTRL_I2S_RXFIFO_OP, + AUDIO_FIFO_RESET, AUDIO_FIFO_RESET); + regmap_update_bits(i2s->regmap, AUDIO_CTRL_I2S_RXFIFO_OP, + AUDIO_FIFO_START, AUDIO_FIFO_START); + regmap_update_bits(i2s->regmap, AUDIO_CTRL_I2S_TX_RX_EN, + I2S_RX_ENABLE, I2S_RX_ENABLE); +} + +static inline void sirf_i2s_rx_disable(struct sirf_i2s *i2s) +{ + regmap_update_bits(i2s->regmap, AUDIO_CTRL_I2S_TX_RX_EN, + I2S_RX_ENABLE, ~I2S_RX_ENABLE); + /* First disable the tx/rx, then stop the FIFO */ + regmap_write(i2s->regmap, AUDIO_CTRL_I2S_RXFIFO_OP, 0); +} + +static int sirf_i2s_trigger(struct snd_pcm_substream *substream, + int cmd, struct snd_soc_dai *dai) +{ + struct sirf_i2s *i2s = snd_soc_dai_get_drvdata(dai); + int playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK); + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + if (playback) + sirf_i2s_tx_enable(i2s); + else + sirf_i2s_rx_enable(i2s); + break; + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + if (playback) + sirf_i2s_tx_disable(i2s); + else + sirf_i2s_rx_disable(i2s); + break; + default: + return -EINVAL; + } + return 0; +} + +static int sirf_i2s_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) +{ + struct sirf_i2s *i2s = snd_soc_dai_get_drvdata(dai); + u32 i2s_ctrl; + u32 i2s_tx_rx_ctrl; + u32 left_len, frame_len; + int channels = params_channels(params); + u32 bitclk; + u32 bclk_div; + u32 div; + + /* + * SiRFSoC I2S controller only support 2 and 6 channells output. + * I2S_SIX_CHANNELS bit clear: select 2 channels mode. + * I2S_SIX_CHANNELS bit set: select 6 channels mode. + */ + regmap_read(i2s->regmap, AUDIO_CTRL_I2S_CTRL, &i2s_ctrl); + regmap_read(i2s->regmap, AUDIO_CTRL_I2S_TX_RX_EN, &i2s_tx_rx_ctrl); + switch (channels) { + case 2: + i2s_ctrl &= ~I2S_SIX_CHANNELS; + break; + case 6: + i2s_ctrl |= I2S_SIX_CHANNELS; + break; + default: + dev_err(dai->dev, "%d channels unsupported\n", channels); + return -EINVAL; + } + + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S8: + left_len = 8; + break; + case SNDRV_PCM_FORMAT_S16_LE: + left_len = 16; + break; + case SNDRV_PCM_FORMAT_S24_LE: + left_len = 24; + break; + case SNDRV_PCM_FORMAT_S32_LE: + left_len = 32; + break; + default: + dev_err(dai->dev, "Format unsupported\n"); + return -EINVAL; + } + + frame_len = left_len * 2; + i2s_ctrl &= ~(I2S_L_CHAN_LEN_MASK | I2S_FRAME_LEN_MASK); + /* Fill the actual len - 1 */ + i2s_ctrl |= ((frame_len - 1) << I2S_FRAME_LEN_SHIFT) + | ((left_len - 1) << I2S_L_CHAN_LEN_SHIFT) + | (0 << I2S_MCLK_DIV_SHIFT) | (3 << I2S_BITCLK_DIV_SHIFT); + + if (i2s->master) { + i2s_ctrl &= ~I2S_SLAVE_MODE; + i2s_tx_rx_ctrl |= I2S_MCLK_EN; + bitclk = params_rate(params) * frame_len; + div = i2s->src_clk_rate / bitclk; + /* MCLK divide-by-2 from source clk */ + div /= 2; + bclk_div = div / 2 - 1; + i2s_ctrl |= (bclk_div << I2S_BITCLK_DIV_SHIFT); + /* + * MCLK coefficient must set to 0, means + * divide-by-two from reference clock. + */ + i2s_ctrl &= ~I2S_MCLK_DIV_MASK; + } else { + i2s_ctrl |= I2S_SLAVE_MODE; + i2s_tx_rx_ctrl &= ~I2S_MCLK_EN; + } + + if (i2s->ext_clk) + i2s_tx_rx_ctrl |= I2S_REF_CLK_SEL_EXT; + else + i2s_tx_rx_ctrl &= ~I2S_REF_CLK_SEL_EXT; + + regmap_write(i2s->regmap, AUDIO_CTRL_I2S_CTRL, i2s_ctrl); + regmap_write(i2s->regmap, AUDIO_CTRL_I2S_TX_RX_EN, i2s_tx_rx_ctrl); + regmap_update_bits(i2s->regmap, AUDIO_CTRL_MODE_SEL, + I2S_MODE, I2S_MODE); + + return 0; +} + +static int sirf_i2s_set_dai_fmt(struct snd_soc_dai *dai, + unsigned int fmt) +{ + struct sirf_i2s *i2s = snd_soc_dai_get_drvdata(dai); + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + i2s->master = false; + break; + case SND_SOC_DAIFMT_CBS_CFS: + i2s->master = true; + break; + default: + return -EINVAL; + } + + /* interface format */ + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + break; + default: + dev_err(dai->dev, "Only I2S format supported\n"); + return -EINVAL; + } + + /* clock inversion */ + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + default: + dev_err(dai->dev, "Only normal bit clock, normal frame clock supported\n"); + return -EINVAL; + } + + return 0; +} + +static int sirf_i2s_set_clkdiv(struct snd_soc_dai *dai, int div_id, + int src_rate) +{ + struct sirf_i2s *i2s = snd_soc_dai_get_drvdata(dai); + + switch (div_id) { + case SIRF_I2S_EXT_CLK: + i2s->ext_clk = 1; + break; + case SIRF_I2S_PWM_CLK: + i2s->ext_clk = 0; + break; + default: + return -EINVAL; + } + + i2s->src_clk_rate = src_rate; + return 0; +} + +struct snd_soc_dai_ops sirfsoc_i2s_dai_ops = { + .trigger = sirf_i2s_trigger, + .hw_params = sirf_i2s_hw_params, + .set_fmt = sirf_i2s_set_dai_fmt, + .set_clkdiv = sirf_i2s_set_clkdiv, +}; + +static struct snd_soc_dai_driver sirf_i2s_dai = { + .probe = sirf_i2s_dai_probe, + .name = "sirf-i2s", + .id = 0, + .playback = { + .stream_name = "SiRF I2S Playback", + .channels_min = 2, + .channels_max = 6, + .rates = SNDRV_PCM_RATE_8000_96000, + .formats = SNDRV_PCM_FMTBIT_S8 | + SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S24_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .capture = { + .stream_name = "SiRF I2S Capture", + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_96000, + .formats = SNDRV_PCM_FMTBIT_S8 | + SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S24_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .ops = &sirfsoc_i2s_dai_ops, +}; + +#ifdef CONFIG_PM_RUNTIME +static int sirf_i2s_runtime_suspend(struct device *dev) +{ + struct sirf_i2s *i2s = dev_get_drvdata(dev); + clk_disable_unprepare(i2s->clk); + + return 0; +} + +static int sirf_i2s_runtime_resume(struct device *dev) +{ + struct sirf_i2s *i2s = dev_get_drvdata(dev); + int ret; + ret = clk_prepare_enable(i2s->clk); + if (ret) + return ret; + return ret; +} +#endif + +#ifdef CONFIG_PM_SLEEP +static int sirf_i2s_suspend(struct device *dev) +{ + struct sirf_i2s *i2s = dev_get_drvdata(dev); + + if (!pm_runtime_status_suspended(dev)) { + regmap_read(i2s->regmap, AUDIO_CTRL_I2S_CTRL, &i2s->i2s_ctrl); + regmap_read(i2s->regmap, AUDIO_CTRL_I2S_TX_RX_EN, + &i2s->i2s_ctrl_tx_rx_en); + sirf_i2s_runtime_suspend(dev); + } + return 0; +} + +static int sirf_i2s_resume(struct device *dev) +{ + struct sirf_i2s *i2s = dev_get_drvdata(dev); + int ret; + if (!pm_runtime_status_suspended(dev)) { + ret = sirf_i2s_runtime_resume(dev); + if (ret) + return ret; + regmap_update_bits(i2s->regmap, AUDIO_CTRL_MODE_SEL, + I2S_MODE, I2S_MODE); + regmap_write(i2s->regmap, AUDIO_CTRL_I2S_CTRL, i2s->i2s_ctrl); + /* Restore MCLK enable and reference clock select bits. */ + i2s->i2s_ctrl_tx_rx_en &= (I2S_MCLK_EN | I2S_REF_CLK_SEL_EXT); + regmap_write(i2s->regmap, AUDIO_CTRL_I2S_TX_RX_EN, + i2s->i2s_ctrl_tx_rx_en); + + regmap_write(i2s->regmap, AUDIO_CTRL_I2S_TXFIFO_INT_MSK, 0); + regmap_write(i2s->regmap, AUDIO_CTRL_I2S_RXFIFO_INT_MSK, 0); + } + + return 0; +} +#endif + +static const struct snd_soc_component_driver sirf_i2s_component = { + .name = "sirf-i2s", +}; + +static const struct regmap_config sirf_i2s_regmap_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = AUDIO_CTRL_I2S_RXFIFO_INT_MSK, + .cache_type = REGCACHE_NONE, +}; + +static int sirf_i2s_probe(struct platform_device *pdev) +{ + int ret; + struct sirf_i2s *i2s; + void __iomem *base; + struct resource *mem_res; + + i2s = devm_kzalloc(&pdev->dev, sizeof(struct sirf_i2s), + GFP_KERNEL); + if (!i2s) + return -ENOMEM; + + mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!mem_res) { + dev_err(&pdev->dev, "no mem resource?\n"); + return -ENODEV; + } + + base = devm_ioremap(&pdev->dev, mem_res->start, + resource_size(mem_res)); + if (base == NULL) + return -ENOMEM; + + i2s->regmap = devm_regmap_init_mmio(&pdev->dev, base, + &sirf_i2s_regmap_config); + if (IS_ERR(i2s->regmap)) + return PTR_ERR(i2s->regmap); + + i2s->clk = devm_clk_get(&pdev->dev, NULL); + if (IS_ERR(i2s->clk)) { + dev_err(&pdev->dev, "Get clock failed.\n"); + ret = PTR_ERR(i2s->clk); + return ret; + } + + pm_runtime_enable(&pdev->dev); + + ret = devm_snd_soc_register_component(&pdev->dev, &sirf_i2s_component, + &sirf_i2s_dai, 1); + if (ret) { + dev_err(&pdev->dev, "Register Audio SoC dai failed.\n"); + return ret; + } + + platform_set_drvdata(pdev, i2s); + return devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); +} + +static int sirf_i2s_remove(struct platform_device *pdev) +{ + pm_runtime_disable(&pdev->dev); + return 0; +} + +static const struct of_device_id sirf_i2s_of_match[] = { + { .compatible = "sirf,prima2-i2s", }, + {} +}; +MODULE_DEVICE_TABLE(of, sirf_i2s_of_match); + +static const struct dev_pm_ops sirf_i2s_pm_ops = { + SET_RUNTIME_PM_OPS(sirf_i2s_runtime_suspend, sirf_i2s_runtime_resume, NULL) + SET_SYSTEM_SLEEP_PM_OPS(sirf_i2s_suspend, sirf_i2s_resume) +}; + +static struct platform_driver sirf_i2s_driver = { + .driver = { + .name = "sirf-i2s", + .owner = THIS_MODULE, + .of_match_table = sirf_i2s_of_match, + .pm = &sirf_i2s_pm_ops, + }, + .probe = sirf_i2s_probe, + .remove = sirf_i2s_remove, +}; + +module_platform_driver(sirf_i2s_driver); + +MODULE_DESCRIPTION("SiRF SoC I2S driver"); +MODULE_AUTHOR("RongJun Ying Rongjun.Ying@csr.com"); +MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/sirf/sirf-i2s.h b/sound/soc/sirf/sirf-i2s.h new file mode 100644 index 0000000..3879fe5 --- /dev/null +++ b/sound/soc/sirf/sirf-i2s.h @@ -0,0 +1,88 @@ +/* + * SiRF I2S controllers define + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#ifndef _SIRF_I2S_H +#define _SIRF_I2S_H + +#define AUDIO_CTRL_TX_FIFO_LEVEL_CHECK_MASK 0x3F +#define AUDIO_CTRL_TX_FIFO_SC_OFFSET 0 +#define AUDIO_CTRL_TX_FIFO_LC_OFFSET 10 +#define AUDIO_CTRL_TX_FIFO_HC_OFFSET 20 + +#define TX_FIFO_SC(x) (((x) & AUDIO_CTRL_TX_FIFO_LEVEL_CHECK_MASK) \ + << AUDIO_CTRL_TX_FIFO_SC_OFFSET) +#define TX_FIFO_LC(x) (((x) & AUDIO_CTRL_TX_FIFO_LEVEL_CHECK_MASK) \ + << AUDIO_CTRL_TX_FIFO_LC_OFFSET) +#define TX_FIFO_HC(x) (((x) & AUDIO_CTRL_TX_FIFO_LEVEL_CHECK_MASK) \ + << AUDIO_CTRL_TX_FIFO_HC_OFFSET) + +#define AUDIO_CTRL_RX_FIFO_LEVEL_CHECK_MASK 0x0F +#define AUDIO_CTRL_RX_FIFO_SC_OFFSET 0 +#define AUDIO_CTRL_RX_FIFO_LC_OFFSET 10 +#define AUDIO_CTRL_RX_FIFO_HC_OFFSET 20 + +#define RX_FIFO_SC(x) (((x) & AUDIO_CTRL_RX_FIFO_LEVEL_CHECK_MASK) \ + << AUDIO_CTRL_RX_FIFO_SC_OFFSET) +#define RX_FIFO_LC(x) (((x) & AUDIO_CTRL_RX_FIFO_LEVEL_CHECK_MASK) \ + << AUDIO_CTRL_RX_FIFO_LC_OFFSET) +#define RX_FIFO_HC(x) (((x) & AUDIO_CTRL_RX_FIFO_LEVEL_CHECK_MASK) \ + << AUDIO_CTRL_RX_FIFO_HC_OFFSET) + +#define AUDIO_CTRL_MODE_SEL (0x0000) +#define AUDIO_CTRL_I2S_CTRL (0x0020) +#define AUDIO_CTRL_I2S_TX_RX_EN (0x0024) + +#define AUDIO_CTRL_I2S_TXFIFO_OP (0x0040) +#define AUDIO_CTRL_I2S_TXFIFO_LEV_CHK (0x0044) +#define AUDIO_CTRL_I2S_TXFIFO_STS (0x0048) +#define AUDIO_CTRL_I2S_TXFIFO_INT (0x004C) +#define AUDIO_CTRL_I2S_TXFIFO_INT_MSK (0x0050) + +#define AUDIO_CTRL_I2S_RXFIFO_OP (0x00B8) +#define AUDIO_CTRL_I2S_RXFIFO_LEV_CHK (0x00BC) +#define AUDIO_CTRL_I2S_RXFIFO_STS (0x00C0) +#define AUDIO_CTRL_I2S_RXFIFO_INT (0x00C4) +#define AUDIO_CTRL_I2S_RXFIFO_INT_MSK (0x00C8) + +#define I2S_MODE (1<<0) + +#define I2S_LOOP_BACK (1<<3) +#define I2S_MCLK_DIV_SHIFT 15 +#define I2S_MCLK_DIV_MASK (0x1FF<<I2S_MCLK_DIV_SHIFT) +#define I2S_BITCLK_DIV_SHIFT 24 +#define I2S_BITCLK_DIV_MASK (0xFF<<I2S_BITCLK_DIV_SHIFT) + +#define I2S_MCLK_EN (1<<2) +#define I2S_REF_CLK_SEL_EXT (1<<3) +#define I2S_DOUT_OE (1<<4) +#define i2s_R2X_LP_TO_TX0 (1<<30) +#define i2s_R2X_LP_TO_TX1 (2<<30) +#define i2s_R2X_LP_TO_TX2 (3<<30) + +#define AUDIO_FIFO_START (1 << 0) +#define AUDIO_FIFO_RESET (1 << 1) + +#define AUDIO_FIFO_FULL (1 << 0) +#define AUDIO_FIFO_EMPTY (1 << 1) +#define AUDIO_FIFO_OFLOW (1 << 2) +#define AUDIO_FIFO_UFLOW (1 << 3) + +#define I2S_RX_ENABLE (1 << 0) +#define I2S_TX_ENABLE (1 << 1) + +/* Codec I2S Control Register defines */ +#define I2S_SLAVE_MODE (1 << 0) +#define I2S_SIX_CHANNELS (1 << 1) +#define I2S_L_CHAN_LEN_SHIFT (4) +#define I2S_L_CHAN_LEN_MASK (0x1f << I2S_L_CHAN_LEN_SHIFT) +#define I2S_FRAME_LEN_SHIFT (9) +#define I2S_FRAME_LEN_MASK (0x3f << I2S_FRAME_LEN_SHIFT) + +#define SIRF_I2S_EXT_CLK 0x0 +#define SIRF_I2S_PWM_CLK 0x1 +#endif /*__SIRF_I2S_H*/
From: Rongjun Ying rongjun.ying@csr.com
This connects platform DAI, hdmi audio codec DAI and SiRF I2S DAI together and works as a mach driver.
Signed-off-by: Rongjun Ying rongjun.ying@csr.com --- .../devicetree/bindings/sound/sirf-hdmi.txt | 15 +++ sound/soc/sirf/Kconfig | 6 + sound/soc/sirf/Makefile | 2 + sound/soc/sirf/sirf-hdmi.c | 98 ++++++++++++++++++++ 4 files changed, 121 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/sirf-hdmi.txt create mode 100644 sound/soc/sirf/sirf-hdmi.c
diff --git a/Documentation/devicetree/bindings/sound/sirf-hdmi.txt b/Documentation/devicetree/bindings/sound/sirf-hdmi.txt new file mode 100644 index 0000000..3b6eb2a --- /dev/null +++ b/Documentation/devicetree/bindings/sound/sirf-hdmi.txt @@ -0,0 +1,15 @@ +* SiRF atlas6/prima2 hdmi audio codec based audio setups + +Required properties: +- compatible: "sirf,sirf-hdmi" +- sirf,i2s-controller: The phandle of the SiRF I2S controller. +- sirf,hdmi-audio-codec: The phandle of the hdmi audio codec. + +Example: + +sirf-hdmi { + compatible = "sirf,hdmi-card"; + sirf,i2s-controller = <&i2s>; + sirf,hdmi-audio-codec = <&hdmi_audio>; +}; + diff --git a/sound/soc/sirf/Kconfig b/sound/soc/sirf/Kconfig index 2fca80a..dc7c71e 100644 --- a/sound/soc/sirf/Kconfig +++ b/sound/soc/sirf/Kconfig @@ -16,3 +16,9 @@ config SND_SOC_SIRF_AUDIO config SND_SOC_SIRF_I2S select REGMAP_MMIO tristate + +config SND_SOC_SIRF_HDMI + tristate "SoC Audio support for SiRF HDMI" + depends on SND_SOC_SIRF + select SND_SOC_SIRF_I2S + select SND_SOC_HDMI_CODEC diff --git a/sound/soc/sirf/Makefile b/sound/soc/sirf/Makefile index 2de3cf8..ef28a38 100644 --- a/sound/soc/sirf/Makefile +++ b/sound/soc/sirf/Makefile @@ -1,7 +1,9 @@ snd-soc-sirf-audio-port-objs := sirf-audio-port.o snd-soc-sirf-audio-objs := sirf-audio.o snd-soc-sirf-i2s-objs := sirf-i2s.o +snd-soc-sirf-hdmi-objs := sirf-hdmi.o
obj-$(CONFIG_SND_SOC_SIRF_AUDIO_PORT) += snd-soc-sirf-audio-port.o obj-$(CONFIG_SND_SOC_SIRF_AUDIO) += snd-soc-sirf-audio.o obj-$(CONFIG_SND_SOC_SIRF_I2S) += snd-soc-sirf-i2s.o +obj-$(CONFIG_SND_SOC_SIRF_HDMI) += snd-soc-sirf-hdmi.o diff --git a/sound/soc/sirf/sirf-hdmi.c b/sound/soc/sirf/sirf-hdmi.c new file mode 100644 index 0000000..a581ec4 --- /dev/null +++ b/sound/soc/sirf/sirf-hdmi.c @@ -0,0 +1,98 @@ +/* + * SIRF HDMI ALSA SoC Audio board driver + * + * Copyright (c) 2013 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#include <linux/module.h> +#include <linux/of.h> + +#include <sound/soc.h> + +static int sirf_hdmi_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->cpu_dai; + struct snd_soc_codec *codec = rtd->codec; + struct snd_soc_card *card = codec->card; + unsigned int fmt; + int ret; + + fmt = card->dai_link[0].dai_fmt; + + ret = snd_soc_dai_set_fmt(cpu_dai, fmt); + if (ret < 0) { + dev_err(card->dev, "can't set cpu DAI configuration\n"); + return ret; + } + + return 0; +} + +static struct snd_soc_ops sirf_hdmi_ops = { + .hw_params = sirf_hdmi_hw_params, +}; +/* Digital audio interface glue - connects codec <--> CPU */ +static struct snd_soc_dai_link sirf_hdmi_dai_links[] = { + { + .name = "SiRF HDMI", + .stream_name = "SiRF HDMI", + .codec_dai_name = "hdmi-hifi", + .ops = &sirf_hdmi_ops, + }, +}; + +static struct snd_soc_card snd_soc_sirf_hdmi_card = { + .name = "SiRF HDMI", + .owner = THIS_MODULE, + .dai_link = sirf_hdmi_dai_links, + .num_links = ARRAY_SIZE(sirf_hdmi_dai_links), +}; + +static int sirf_hdmi_card_probe(struct platform_device *pdev) +{ + struct snd_soc_card *card = &snd_soc_sirf_hdmi_card; + int ret; + sirf_hdmi_dai_links[0].cpu_of_node = + of_parse_phandle(pdev->dev.of_node, "sirf,i2s-controller", 0); + sirf_hdmi_dai_links[0].platform_of_node = + of_parse_phandle(pdev->dev.of_node, "sirf,i2s-controller", 0); + sirf_hdmi_dai_links[0].codec_of_node = + of_parse_phandle(pdev->dev.of_node, "sirf,hdmi-audio-codec", 0); + + sirf_hdmi_dai_links[0].dai_fmt = SND_SOC_DAIFMT_CBM_CFM | + SND_SOC_DAIFMT_I2S; + + card->dev = &pdev->dev; + + ret = devm_snd_soc_register_card(&pdev->dev, card); + if (ret) + dev_err(&pdev->dev, "snd_soc_register_card() failed:%d\n", ret); + + return ret; +} + +static const struct of_device_id sirf_hdmi_card_of_match[] = { + { .compatible = "sirf,hdmi-card", }, + {} +}; +MODULE_DEVICE_TABLE(of, sirf_hdmi_card_of_match); + +static struct platform_driver sirf_hdmi_card_driver = { + .driver = { + .name = "sirf-hdmi-card", + .owner = THIS_MODULE, + .pm = &snd_soc_pm_ops, + .of_match_table = sirf_hdmi_card_of_match, + }, + .probe = sirf_hdmi_card_probe, +}; + +module_platform_driver(sirf_hdmi_card_driver); + +MODULE_DESCRIPTION("SIRF HDMI ALSA SoC Audio board driver"); +MODULE_AUTHOR("RongJun Ying Rongjun.Ying@csr.com"); +MODULE_LICENSE("GPL v2");
From: Rongjun Ying rongjun.ying@csr.com
This patch adds ASoC support for SiRF SoCs USP(DSP mode) modules. Features include: 1. Only 1 channel support. 2. Support both master and slave mode.
Signed-off-by: Rongjun Ying rongjun.ying@csr.com --- -v4: 1. Add binding document. 2. Use MMIO regmap. 3. Use the generic dmaengine pcm register. 4. Remove sirf_usp_*_fifo_op functions and add into sirf_usp_*_enable/disable.
.../devicetree/bindings/sound/sirf-usp.txt | 27 ++ sound/soc/sirf/Kconfig | 4 + sound/soc/sirf/Makefile | 2 + sound/soc/sirf/sirf-usp.c | 448 ++++++++++++++++++++ sound/soc/sirf/sirf-usp.h | 282 ++++++++++++ 5 files changed, 763 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/sirf-usp.txt create mode 100644 sound/soc/sirf/sirf-usp.c create mode 100644 sound/soc/sirf/sirf-usp.h
diff --git a/Documentation/devicetree/bindings/sound/sirf-usp.txt b/Documentation/devicetree/bindings/sound/sirf-usp.txt new file mode 100644 index 0000000..59601b7 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/sirf-usp.txt @@ -0,0 +1,27 @@ +* SiRF SoC USP module + +Required properties: +- compatible: "sirf,prima2-usp-pcm" +- reg: Base address and size entries: +- dmas: List of DMA controller phandle and DMA request line ordered pairs. +- dma-names: Identifier string for each DMA request line in the dmas property. + These strings correspond 1:1 with the ordered pairs in dmas. + + One of the DMA channels will be responsible for transmission (should be + named "tx") and one for reception (should be named "rx"). + +- clocks: USP controller clock source +- pinctrl-names: Must contain a "default" entry. +- pinctrl-NNN: One property must exist for each entry in pinctrl-names. + +Example: + +usp1: usp@b0090000 { + compatible = "sirf,prima2-usp-pcm"; + reg = <0xb0090000 0x10000>; + clocks = <&clks 29>; + dmas = <&dmac0 14>, <&dmac0 15>; + dma-names = "rx", "tx"; + pinctrl-names = "default"; + pinctrl-0 = <&usp0_only_utfs_pins_a>; +}; diff --git a/sound/soc/sirf/Kconfig b/sound/soc/sirf/Kconfig index dc7c71e..bdd5869 100644 --- a/sound/soc/sirf/Kconfig +++ b/sound/soc/sirf/Kconfig @@ -13,6 +13,10 @@ config SND_SOC_SIRF_AUDIO select SND_SOC_SIRF_AUDIO_CODEC select SND_SOC_SIRF_AUDIO_PORT
+config SND_SOC_SIRF_USP + select REGMAP_MMIO + tristate + config SND_SOC_SIRF_I2S select REGMAP_MMIO tristate diff --git a/sound/soc/sirf/Makefile b/sound/soc/sirf/Makefile index ef28a38..1581b5a 100644 --- a/sound/soc/sirf/Makefile +++ b/sound/soc/sirf/Makefile @@ -1,9 +1,11 @@ snd-soc-sirf-audio-port-objs := sirf-audio-port.o snd-soc-sirf-audio-objs := sirf-audio.o +snd-soc-sirf-usp-objs := sirf-usp.o snd-soc-sirf-i2s-objs := sirf-i2s.o snd-soc-sirf-hdmi-objs := sirf-hdmi.o
obj-$(CONFIG_SND_SOC_SIRF_AUDIO_PORT) += snd-soc-sirf-audio-port.o obj-$(CONFIG_SND_SOC_SIRF_AUDIO) += snd-soc-sirf-audio.o +obj-$(CONFIG_SND_SOC_SIRF_USP) += snd-soc-sirf-usp.o obj-$(CONFIG_SND_SOC_SIRF_I2S) += snd-soc-sirf-i2s.o obj-$(CONFIG_SND_SOC_SIRF_HDMI) += snd-soc-sirf-hdmi.o diff --git a/sound/soc/sirf/sirf-usp.c b/sound/soc/sirf/sirf-usp.c new file mode 100644 index 0000000..a72ec09 --- /dev/null +++ b/sound/soc/sirf/sirf-usp.c @@ -0,0 +1,448 @@ +/* + * SiRF USP audio transfer interface like I2S + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ +#include <linux/module.h> +#include <linux/io.h> +#include <linux/of.h> +#include <linux/clk.h> +#include <linux/pm_runtime.h> +#include <sound/soc.h> +#include <sound/dmaengine_pcm.h> + +#include "sirf-usp.h" + +#define FIFO_RESET 0 +#define FIFO_START 1 +#define FIFO_STOP 2 + +#define AUDIO_WORD_SIZE 16 + +struct sirf_usp { + struct regmap *regmap; + struct clk *clk; + u32 mode1_reg; + u32 mode2_reg; + int master; + struct snd_dmaengine_dai_dma_data playback_dma_data; + struct snd_dmaengine_dai_dma_data capture_dma_data; +}; + +static inline void sirf_usp_tx_enable(struct sirf_usp *usp) +{ + regmap_update_bits(usp->regmap, USP_TX_FIFO_OP, + USP_TX_FIFO_RESET, USP_TX_FIFO_RESET); + regmap_write(usp->regmap, USP_TX_FIFO_OP, 0); + + regmap_update_bits(usp->regmap, USP_TX_FIFO_OP, + USP_TX_FIFO_START, USP_TX_FIFO_START); + + regmap_update_bits(usp->regmap, USP_TX_RX_ENABLE, + USP_TX_ENA, USP_TX_ENA); +} + +static inline void sirf_usp_tx_disable(struct sirf_usp *usp) +{ + regmap_update_bits(usp->regmap, USP_TX_RX_ENABLE, + USP_TX_ENA, ~USP_TX_ENA); + /* FIFO stop */ + regmap_write(usp->regmap, USP_TX_FIFO_OP, 0); +} + +static inline void sirf_usp_rx_enable(struct sirf_usp *usp) +{ + regmap_update_bits(usp->regmap, USP_RX_FIFO_OP, + USP_RX_FIFO_RESET, USP_RX_FIFO_RESET); + regmap_write(usp->regmap, USP_RX_FIFO_OP, 0); + + regmap_update_bits(usp->regmap, USP_RX_FIFO_OP, + USP_RX_FIFO_START, USP_RX_FIFO_START); + + regmap_update_bits(usp->regmap, USP_TX_RX_ENABLE, + USP_RX_ENA, USP_RX_ENA); +} + +static inline void sirf_usp_rx_disable(struct sirf_usp *usp) +{ + regmap_update_bits(usp->regmap, USP_TX_RX_ENABLE, + USP_RX_ENA, ~USP_RX_ENA); + /* FIFO stop */ + regmap_write(usp->regmap, USP_RX_FIFO_OP, 0); +} + +static int sirf_usp_pcm_dai_probe(struct snd_soc_dai *dai) +{ + struct sirf_usp *usp = snd_soc_dai_get_drvdata(dai); + snd_soc_dai_init_dma_data(dai, &usp->playback_dma_data, + &usp->capture_dma_data); + return 0; +} + +static int sirf_usp_pcm_set_dai_fmt(struct snd_soc_dai *dai, + unsigned int fmt) +{ + struct sirf_usp *usp = snd_soc_dai_get_drvdata(dai); + + /* set master/slave audio interface */ + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBS_CFS: + usp->master = 1; + break; + case SND_SOC_DAIFMT_CBM_CFM: + usp->master = 0; + break; + default: + return -EINVAL; + } + + return 0; +} + +static int sirf_usp_pcm_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) +{ + struct sirf_usp *usp = snd_soc_dai_get_drvdata(dai); + u32 mode1; + u32 mode2; + u32 rate = params_rate(params); + u32 clk_rate, clk_div, clk_div_hi, clk_div_lo; + + regmap_read(usp->regmap, USP_MODE1, &mode1); + regmap_read(usp->regmap, USP_MODE2, &mode2); + if (usp->master) { + mode1 &= ~USP_CLOCK_MODE_SLAVE; + mode2 &= ~USP_TFS_CLK_SLAVE_MODE; + mode2 &= ~USP_RFS_CLK_SLAVE_MODE; + } else { + mode1 |= USP_CLOCK_MODE_SLAVE; + mode2 |= USP_TFS_CLK_SLAVE_MODE; + mode2 |= USP_RFS_CLK_SLAVE_MODE; + } + regmap_write(usp->regmap, USP_MODE1, mode1); + regmap_write(usp->regmap, USP_MODE2, mode2); + + clk_rate = clk_get_rate(usp->clk); + if (clk_rate < rate * 2) { + dev_err(dai->dev, "Can't get rate(%d) by need.\n", rate); + return -EINVAL; + } + + clk_div = (clk_rate / (2 * rate)) - 1; + clk_div_hi = (clk_div & 0xC00) >> 10; + clk_div_lo = (clk_div & 0x3FF); + + regmap_update_bits(usp->regmap, USP_MODE2, USP_CLK_DIVISOR_MASK, + clk_div_lo << USP_CLK_DIVISOR_OFFSET); + + regmap_update_bits(usp->regmap, USP_TX_FRAME_CTRL, + USP_TXC_CLK_DIVISOR_MASK, + clk_div_hi << USP_TXC_CLK_DIVISOR_OFFSET); + + return 0; +} + +static int sirf_usp_pcm_trigger(struct snd_pcm_substream *substream, int cmd, + struct snd_soc_dai *dai) +{ + int playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; + struct sirf_usp *usp = snd_soc_dai_get_drvdata(dai); + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + if (playback) + sirf_usp_tx_enable(usp); + else + sirf_usp_rx_enable(usp); + break; + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + if (playback) + sirf_usp_tx_disable(usp); + else + sirf_usp_rx_disable(usp); + break; + } + + return 0; +} + +static const struct snd_soc_dai_ops sirf_usp_pcm_dai_ops = { + .trigger = sirf_usp_pcm_trigger, + .set_fmt = sirf_usp_pcm_set_dai_fmt, + .hw_params = sirf_usp_pcm_hw_params, +}; + +static struct snd_soc_dai_driver sirf_usp_pcm_dai = { + .probe = sirf_usp_pcm_dai_probe, + .name = "sirf-usp-pcm", + .id = 0, + .playback = { + .stream_name = "SiRF USP PCM Playback", + .channels_min = 1, + .channels_max = 1, + .rates = SNDRV_PCM_RATE_48000 + | SNDRV_PCM_RATE_44100 + | SNDRV_PCM_RATE_32000 + | SNDRV_PCM_RATE_22050 + | SNDRV_PCM_RATE_16000 + | SNDRV_PCM_RATE_11025 + | SNDRV_PCM_RATE_8000, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + }, + .capture = { + .stream_name = "SiRF USP PCM Capture", + .channels_min = 1, + .channels_max = 1, + .rates = SNDRV_PCM_RATE_48000 + | SNDRV_PCM_RATE_44100 + | SNDRV_PCM_RATE_32000 + | SNDRV_PCM_RATE_22050 + | SNDRV_PCM_RATE_16000 + | SNDRV_PCM_RATE_11025 + | SNDRV_PCM_RATE_8000, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + }, + .ops = &sirf_usp_pcm_dai_ops, +}; + +static void sirf_usp_controller_init(struct sirf_usp *usp) +{ + u32 val; + + /* Configure RISC mode */ + regmap_update_bits(usp->regmap, USP_RISC_DSP_MODE, + USP_RISC_DSP_SEL, ~USP_RISC_DSP_SEL); + + /* Clear all interrupts status */ + regmap_read(usp->regmap, USP_INT_STATUS, &val); + regmap_write(usp->regmap, USP_INT_STATUS, val); + + /* Configure DMA IO Length register */ + regmap_write(usp->regmap, USP_TX_DMA_IO_LEN, 0); + regmap_write(usp->regmap, USP_RX_DMA_IO_LEN, 0); + + /* Configure RX Frame Control */ + val = (AUDIO_WORD_SIZE * 2 - 1) << USP_RXC_DATA_LEN_OFFSET; + val |= (AUDIO_WORD_SIZE * 2 - 1) << USP_RXC_FRAME_LEN_OFFSET; + val |= (AUDIO_WORD_SIZE * 2 - 1) << USP_RXC_SHIFTER_LEN_OFFSET; + val |= USP_SINGLE_SYNC_MODE; + regmap_write(usp->regmap, USP_RX_FRAME_CTRL, val); + + /* Configure TX Frame Control */ + val = (AUDIO_WORD_SIZE * 2 - 1) << USP_TXC_DATA_LEN_OFFSET; + val |= 0 << USP_TXC_SYNC_LEN_OFFSET; + val |= (AUDIO_WORD_SIZE * 2 - 1) << USP_TXC_FRAME_LEN_OFFSET; + val |= (AUDIO_WORD_SIZE * 2 - 1) << USP_TXC_SHIFTER_LEN_OFFSET; + val |= USP_TXC_SLAVE_CLK_SAMPLE; + regmap_write(usp->regmap, USP_TX_FRAME_CTRL, val); + + /* Configure Mode2 register */ + val = (1 << USP_RXD_DELAY_LEN_OFFSET) | (0 << USP_TXD_DELAY_LEN_OFFSET); + val &= ~USP_ENA_CTRL_MODE; + val &= ~USP_FRAME_CTRL_MODE; + val &= ~USP_TFS_SOURCE_MODE; + regmap_write(usp->regmap, USP_MODE2, val); + + /* Configure Mode1 register */ + val = USP_SYNC_MODE; + val |= USP_ENDIAN_CTRL_LSBF; + val |= USP_EN; + val |= USP_RXD_ACT_EDGE_FALLING; + val &= ~USP_TXD_ACT_EDGE_FALLING; + val |= USP_RFS_ACT_LEVEL_LOGIC1; + val |= USP_TFS_ACT_LEVEL_LOGIC1; + val |= USP_SCLK_IDLE_MODE_TOGGLE; + val |= USP_SCLK_IDLE_LEVEL_LOGIC1; + val &= ~USP_SCLK_PIN_MODE_IO; + val &= ~USP_RFS_PIN_MODE_IO; + val &= ~USP_TFS_PIN_MODE_IO; + val &= ~USP_RXD_PIN_MODE_IO; + val &= ~USP_TXD_PIN_MODE_IO; + val |= USP_TX_UFLOW_REPEAT_ZERO; + regmap_write(usp->regmap, USP_MODE1, val); + + /* Configure RX DMA IO Control register */ + regmap_write(usp->regmap, USP_RX_DMA_IO_CTRL, 0); + + /* Congiure RX FIFO Control register */ + regmap_write(usp->regmap, USP_RX_FIFO_CTRL, + (USP_RX_FIFO_THRESHOLD << USP_RX_FIFO_THD_OFFSET) | + (USP_TX_RX_FIFO_WIDTH_DWORD << USP_RX_FIFO_WIDTH_OFFSET)); + + /* Congiure RX FIFO Level Check register */ + regmap_write(usp->regmap, USP_RX_FIFO_LEVEL_CHK, + RX_FIFO_SC(0x04) | RX_FIFO_LC(0x0E) | RX_FIFO_HC(0x1B)); + + /* Configure TX DMA IO Control register*/ + regmap_write(usp->regmap, USP_TX_DMA_IO_CTRL, 0); + + /* Configure TX FIFO Control register */ + regmap_write(usp->regmap, USP_TX_FIFO_CTRL, + (USP_TX_FIFO_THRESHOLD << USP_TX_FIFO_THD_OFFSET) | + (USP_TX_RX_FIFO_WIDTH_DWORD << USP_TX_FIFO_WIDTH_OFFSET)); + + /* Congiure TX FIFO Level Check register */ + regmap_write(usp->regmap, USP_TX_FIFO_LEVEL_CHK, + TX_FIFO_SC(0x1B) | TX_FIFO_LC(0x0E) | TX_FIFO_HC(0x04)); + + /* Configure RX FIFO */ + regmap_update_bits(usp->regmap, USP_RX_FIFO_OP, + USP_RX_FIFO_RESET, USP_RX_FIFO_RESET); + regmap_write(usp->regmap, USP_RX_FIFO_OP, 0); + + /* Configure TX FIFO */ + regmap_update_bits(usp->regmap, USP_TX_FIFO_OP, + USP_TX_FIFO_RESET, USP_TX_FIFO_RESET); + regmap_write(usp->regmap, USP_TX_FIFO_OP, 0); +} + +static void sirf_usp_controller_uninit(struct sirf_usp *usp) +{ + /* Disable RX/TX */ + regmap_write(usp->regmap, USP_INT_ENABLE, 0); + regmap_write(usp->regmap, USP_TX_RX_ENABLE, 0); +} + +#ifdef CONFIG_PM_RUNTIME +static int sirf_usp_pcm_runtime_suspend(struct device *dev) +{ + struct sirf_usp *usp = dev_get_drvdata(dev); + sirf_usp_controller_uninit(usp); + clk_disable_unprepare(usp->clk); + return 0; +} + +static int sirf_usp_pcm_runtime_resume(struct device *dev) +{ + struct sirf_usp *usp = dev_get_drvdata(dev); + int ret; + ret = clk_prepare_enable(usp->clk); + if (ret) + return ret; + sirf_usp_controller_init(usp); + return 0; +} +#endif + +#ifdef CONFIG_PM_SLEEP +static int sirf_usp_pcm_suspend(struct device *dev) +{ + struct sirf_usp *usp = dev_get_drvdata(dev); + + if (!pm_runtime_status_suspended(dev)) { + regmap_read(usp->regmap, USP_MODE1, &usp->mode1_reg); + regmap_read(usp->regmap, USP_MODE2, &usp->mode2_reg); + sirf_usp_pcm_runtime_suspend(dev); + } + return 0; +} + +static int sirf_usp_pcm_resume(struct device *dev) +{ + struct sirf_usp *usp = dev_get_drvdata(dev); + int ret; + + if (!pm_runtime_status_suspended(dev)) { + ret = sirf_usp_pcm_runtime_resume(dev); + if (ret) + return ret; + regmap_write(usp->regmap, USP_MODE1, usp->mode1_reg); + regmap_write(usp->regmap, USP_MODE2, usp->mode2_reg); + } + return 0; +} +#endif + +static const struct snd_soc_component_driver sirf_usp_component = { + .name = "sirf-usp", +}; + +static const struct regmap_config sirf_usp_regmap_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = USP_RX_FIFO_DATA, + .cache_type = REGCACHE_NONE, +}; + +static int sirf_usp_pcm_probe(struct platform_device *pdev) +{ + int ret; + struct sirf_usp *usp; + void __iomem *base; + struct resource *mem_res; + + usp = devm_kzalloc(&pdev->dev, sizeof(struct sirf_usp), + GFP_KERNEL); + if (!usp) + return -ENOMEM; + + platform_set_drvdata(pdev, usp); + + + mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + base = devm_ioremap(&pdev->dev, mem_res->start, + resource_size(mem_res)); + if (base == NULL) + return -ENOMEM; + usp->regmap = devm_regmap_init_mmio(&pdev->dev, base, + &sirf_usp_regmap_config); + if (IS_ERR(usp->regmap)) + return PTR_ERR(usp->regmap); + + usp->clk = devm_clk_get(&pdev->dev, NULL); + if (IS_ERR(usp->clk)) { + dev_err(&pdev->dev, "Get clock failed.\n"); + return PTR_ERR(usp->clk); + } + + pm_runtime_enable(&pdev->dev); + + ret = devm_snd_soc_register_component(&pdev->dev, &sirf_usp_component, + &sirf_usp_pcm_dai, 1); + if (ret) { + dev_err(&pdev->dev, "Register Audio SoC dai failed.\n"); + return ret; + } + return devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); +} + +static int sirf_usp_pcm_remove(struct platform_device *pdev) +{ + pm_runtime_disable(&pdev->dev); + return 0; +} + +static const struct of_device_id sirf_usp_pcm_of_match[] = { + { .compatible = "sirf,prima2-usp-pcm", }, + {} +}; +MODULE_DEVICE_TABLE(of, sirf_usp_pcm_of_match); + +static const struct dev_pm_ops sirf_usp_pcm_pm_ops = { + SET_RUNTIME_PM_OPS(sirf_usp_pcm_runtime_suspend, sirf_usp_pcm_runtime_resume, NULL) + SET_SYSTEM_SLEEP_PM_OPS(sirf_usp_pcm_suspend, sirf_usp_pcm_resume) +}; + +static struct platform_driver sirf_usp_pcm_driver = { + .driver = { + .name = "sirf-usp-pcm", + .owner = THIS_MODULE, + .of_match_table = sirf_usp_pcm_of_match, + .pm = &sirf_usp_pcm_pm_ops, + }, + .probe = sirf_usp_pcm_probe, + .remove = sirf_usp_pcm_remove, +}; + +module_platform_driver(sirf_usp_pcm_driver); + +MODULE_DESCRIPTION("SiRF SoC USP PCM bus driver"); +MODULE_AUTHOR("RongJun Ying Rongjun.Ying@csr.com"); +MODULE_LICENSE("GPL v2"); diff --git a/sound/soc/sirf/sirf-usp.h b/sound/soc/sirf/sirf-usp.h new file mode 100644 index 0000000..03f1731 --- /dev/null +++ b/sound/soc/sirf/sirf-usp.h @@ -0,0 +1,282 @@ +/* + * arch/arm/mach-prima2/include/mach/sirfsoc_usp.h + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +#ifndef _SIRF_USP_H +#define _SIRF_USP_H + +/* USP Registers */ +#define USP_MODE1 0x00 +#define USP_MODE2 0x04 +#define USP_TX_FRAME_CTRL 0x08 +#define USP_RX_FRAME_CTRL 0x0C +#define USP_TX_RX_ENABLE 0x10 +#define USP_INT_ENABLE 0x14 +#define USP_INT_STATUS 0x18 +#define USP_PIN_IO_DATA 0x1C +#define USP_RISC_DSP_MODE 0x20 +#define USP_AYSNC_PARAM_REG 0x24 +#define USP_IRDA_X_MODE_DIV 0x28 +#define USP_SM_CFG 0x2C +#define USP_TX_DMA_IO_CTRL 0x100 +#define USP_TX_DMA_IO_LEN 0x104 +#define USP_TX_FIFO_CTRL 0x108 +#define USP_TX_FIFO_LEVEL_CHK 0x10C +#define USP_TX_FIFO_OP 0x110 +#define USP_TX_FIFO_STATUS 0x114 +#define USP_TX_FIFO_DATA 0x118 +#define USP_RX_DMA_IO_CTRL 0x120 +#define USP_RX_DMA_IO_LEN 0x124 +#define USP_RX_FIFO_CTRL 0x128 +#define USP_RX_FIFO_LEVEL_CHK 0x12C +#define USP_RX_FIFO_OP 0x130 +#define USP_RX_FIFO_STATUS 0x134 +#define USP_RX_FIFO_DATA 0x138 + +/* USP MODE register-1 */ +#define USP_SYNC_MODE 0x00000001 +#define USP_CLOCK_MODE_SLAVE 0x00000002 +#define USP_LOOP_BACK_EN 0x00000004 +#define USP_HPSIR_EN 0x00000008 +#define USP_ENDIAN_CTRL_LSBF 0x00000010 +#define USP_EN 0x00000020 +#define USP_RXD_ACT_EDGE_FALLING 0x00000040 +#define USP_TXD_ACT_EDGE_FALLING 0x00000080 +#define USP_RFS_ACT_LEVEL_LOGIC1 0x00000100 +#define USP_TFS_ACT_LEVEL_LOGIC1 0x00000200 +#define USP_SCLK_IDLE_MODE_TOGGLE 0x00000400 +#define USP_SCLK_IDLE_LEVEL_LOGIC1 0x00000800 +#define USP_SCLK_PIN_MODE_IO 0x00001000 +#define USP_RFS_PIN_MODE_IO 0x00002000 +#define USP_TFS_PIN_MODE_IO 0x00004000 +#define USP_RXD_PIN_MODE_IO 0x00008000 +#define USP_TXD_PIN_MODE_IO 0x00010000 +#define USP_SCLK_IO_MODE_INPUT 0x00020000 +#define USP_RFS_IO_MODE_INPUT 0x00040000 +#define USP_TFS_IO_MODE_INPUT 0x00080000 +#define USP_RXD_IO_MODE_INPUT 0x00100000 +#define USP_TXD_IO_MODE_INPUT 0x00200000 +#define USP_IRDA_WIDTH_DIV_MASK 0x3FC00000 +#define USP_IRDA_WIDTH_DIV_OFFSET 0 +#define USP_IRDA_IDLE_LEVEL_HIGH 0x40000000 +#define USP_TX_UFLOW_REPEAT_ZERO 0x80000000 +#define USP_TX_ENDIAN_MODE 0x00000020 +#define USP_RX_ENDIAN_MODE 0x00000020 + +/* USP Mode Register-2 */ +#define USP_RXD_DELAY_LEN_MASK 0x000000FF +#define USP_RXD_DELAY_LEN_OFFSET 0 + +#define USP_TXD_DELAY_LEN_MASK 0x0000FF00 +#define USP_TXD_DELAY_LEN_OFFSET 8 + +#define USP_ENA_CTRL_MODE 0x00010000 +#define USP_FRAME_CTRL_MODE 0x00020000 +#define USP_TFS_SOURCE_MODE 0x00040000 +#define USP_TFS_MS_MODE 0x00080000 +#define USP_CLK_DIVISOR_MASK 0x7FE00000 +#define USP_CLK_DIVISOR_OFFSET 21 + +#define USP_TFS_CLK_SLAVE_MODE (1<<20) +#define USP_RFS_CLK_SLAVE_MODE (1<<19) + +#define USP_IRDA_DATA_WIDTH 0x80000000 + +/* USP Transmit Frame Control Register */ + +#define USP_TXC_DATA_LEN_MASK 0x000000FF +#define USP_TXC_DATA_LEN_OFFSET 0 + +#define USP_TXC_SYNC_LEN_MASK 0x0000FF00 +#define USP_TXC_SYNC_LEN_OFFSET 8 + +#define USP_TXC_FRAME_LEN_MASK 0x00FF0000 +#define USP_TXC_FRAME_LEN_OFFSET 16 + +#define USP_TXC_SHIFTER_LEN_MASK 0x1F000000 +#define USP_TXC_SHIFTER_LEN_OFFSET 24 + +#define USP_TXC_SLAVE_CLK_SAMPLE 0x20000000 + +#define USP_TXC_CLK_DIVISOR_MASK 0xC0000000 +#define USP_TXC_CLK_DIVISOR_OFFSET 30 + +/* USP Receive Frame Control Register */ + +#define USP_RXC_DATA_LEN_MASK 0x000000FF +#define USP_RXC_DATA_LEN_OFFSET 0 + +#define USP_RXC_FRAME_LEN_MASK 0x0000FF00 +#define USP_RXC_FRAME_LEN_OFFSET 8 + +#define USP_RXC_SHIFTER_LEN_MASK 0x001F0000 +#define USP_RXC_SHIFTER_LEN_OFFSET 16 + +#define USP_I2S_SYNC_CHG 0x00200000 + +#define USP_RXC_CLK_DIVISOR_MASK 0x0F000000 +#define USP_RXC_CLK_DIVISOR_OFFSET 24 +#define USP_SINGLE_SYNC_MODE 0x00400000 + +/* Tx - RX Enable Register */ + +#define USP_RX_ENA 0x00000001 +#define USP_TX_ENA 0x00000002 + +/* USP Interrupt Enable and status Register */ +#define USP_RX_DONE_INT 0x00000001 +#define USP_TX_DONE_INT 0x00000002 +#define USP_RX_OFLOW_INT 0x00000004 +#define USP_TX_UFLOW_INT 0x00000008 +#define USP_RX_IO_DMA_INT 0x00000010 +#define USP_TX_IO_DMA_INT 0x00000020 +#define USP_RXFIFO_FULL_INT 0x00000040 +#define USP_TXFIFO_EMPTY_INT 0x00000080 +#define USP_RXFIFO_THD_INT 0x00000100 +#define USP_TXFIFO_THD_INT 0x00000200 +#define USP_UART_FRM_ERR_INT 0x00000400 +#define USP_RX_TIMEOUT_INT 0x00000800 +#define USP_TX_ALLOUT_INT 0x00001000 +#define USP_RXD_BREAK_INT 0x00008000 + +/* All possible TX interruots */ +#define USP_TX_INTERRUPT (USP_TX_DONE_INT|USP_TX_UFLOW_INT|\ + USP_TX_IO_DMA_INT|\ + USP_TXFIFO_EMPTY_INT|\ + USP_TXFIFO_THD_INT) +/* All possible RX interruots */ +#define USP_RX_INTERRUPT (USP_RX_DONE_INT|USP_RX_OFLOW_INT|\ + USP_RX_IO_DMA_INT|\ + USP_RXFIFO_FULL_INT|\ + USP_RXFIFO_THD_INT|\ + USP_RXFIFO_THD_INT|USP_RX_TIMEOUT_INT) + +#define USP_INT_ALL 0x1FFF + +/* USP Pin I/O Data Register */ + +#define USP_RFS_PIN_VALUE_MASK 0x00000001 +#define USP_TFS_PIN_VALUE_MASK 0x00000002 +#define USP_RXD_PIN_VALUE_MASK 0x00000004 +#define USP_TXD_PIN_VALUE_MASK 0x00000008 +#define USP_SCLK_PIN_VALUE_MASK 0x00000010 + +/* USP RISC/DSP Mode Register */ +#define USP_RISC_DSP_SEL 0x00000001 + +/* USP ASYNC PARAMETER Register*/ + +#define USP_ASYNC_TIMEOUT_MASK 0x0000FFFF +#define USP_ASYNC_TIMEOUT_OFFSET 0 +#define USP_ASYNC_TIMEOUT(x) (((x)&USP_ASYNC_TIMEOUT_MASK)<<USP_ASYNC_TIMEOUT_OFFSET) + +#define USP_ASYNC_DIV2_MASK 0x003F0000 +#define USP_ASYNC_DIV2_OFFSET 16 + +/* USP TX DMA I/O MODE Register */ +#define USP_TX_MODE_IO 0x00000001 + +/* USP TX DMA I/O Length Register */ +#define USP_TX_DATA_LEN_MASK 0xFFFFFFFF +#define USP_TX_DATA_LEN_OFFSET 0 + +/* USP TX FIFO Control Register */ +#define USP_TX_FIFO_WIDTH_MASK 0x00000003 +#define USP_TX_FIFO_WIDTH_OFFSET 0 + +#define USP_TX_FIFO_THD_MASK 0x000001FC +#define USP_TX_FIFO_THD_OFFSET 2 + +/* USP TX FIFO Level Check Register */ +#define USP_TX_FIFO_LEVEL_CHECK_MASK 0x1F +#define USP_TX_FIFO_SC_OFFSET 0 +#define USP_TX_FIFO_LC_OFFSET 10 +#define USP_TX_FIFO_HC_OFFSET 20 + +#define TX_FIFO_SC(x) (((x) & USP_TX_FIFO_LEVEL_CHECK_MASK) << USP_TX_FIFO_SC_OFFSET) +#define TX_FIFO_LC(x) (((x) & USP_TX_FIFO_LEVEL_CHECK_MASK) << USP_TX_FIFO_LC_OFFSET) +#define TX_FIFO_HC(x) (((x) & USP_TX_FIFO_LEVEL_CHECK_MASK) << USP_TX_FIFO_HC_OFFSET) + +/* USP TX FIFO Operation Register */ +#define USP_TX_FIFO_RESET 0x00000001 +#define USP_TX_FIFO_START 0x00000002 + +/* USP TX FIFO Status Register */ +#define USP_TX_FIFO_LEVEL_MASK 0x0000007F +#define USP_TX_FIFO_LEVEL_OFFSET 0 + +#define USP_TX_FIFO_FULL 0x00000080 +#define USP_TX_FIFO_EMPTY 0x00000100 + +/* USP TX FIFO Data Register */ +#define USP_TX_FIFO_DATA_MASK 0xFFFFFFFF +#define USP_TX_FIFO_DATA_OFFSET 0 + +/* USP RX DMA I/O MODE Register */ +#define USP_RX_MODE_IO 0x00000001 +#define USP_RX_DMA_FLUSH 0x00000004 + +/* USP RX DMA I/O Length Register */ +#define USP_RX_DATA_LEN_MASK 0xFFFFFFFF +#define USP_RX_DATA_LEN_OFFSET 0 + +/* USP RX FIFO Control Register */ +#define USP_RX_FIFO_WIDTH_MASK 0x00000003 +#define USP_RX_FIFO_WIDTH_OFFSET 0 + +#define USP_RX_FIFO_THD_MASK 0x000001FC +#define USP_RX_FIFO_THD_OFFSET 2 + +/* USP RX FIFO Level Check Register */ + +#define USP_RX_FIFO_LEVEL_CHECK_MASK 0x1F +#define USP_RX_FIFO_SC_OFFSET 0 +#define USP_RX_FIFO_LC_OFFSET 10 +#define USP_RX_FIFO_HC_OFFSET 20 + +#define RX_FIFO_SC(x) (((x) & USP_RX_FIFO_LEVEL_CHECK_MASK) << USP_RX_FIFO_SC_OFFSET) +#define RX_FIFO_LC(x) (((x) & USP_RX_FIFO_LEVEL_CHECK_MASK) << USP_RX_FIFO_LC_OFFSET) +#define RX_FIFO_HC(x) (((x) & USP_RX_FIFO_LEVEL_CHECK_MASK) << USP_RX_FIFO_HC_OFFSET) + +/* USP RX FIFO Operation Register */ +#define USP_RX_FIFO_RESET 0x00000001 +#define USP_RX_FIFO_START 0x00000002 + +/* USP RX FIFO Status Register */ + +#define USP_RX_FIFO_LEVEL_MASK 0x0000007F +#define USP_RX_FIFO_LEVEL_OFFSET 0 + +#define USP_RX_FIFO_FULL 0x00000080 +#define USP_RX_FIFO_EMPTY 0x00000100 + +/* USP RX FIFO Data Register */ + +#define USP_RX_FIFO_DATA_MASK 0xFFFFFFFF +#define USP_RX_FIFO_DATA_OFFSET 0 + +/* + * When rx thd irq occur, sender just disable tx empty irq, + * Remaining data in tx fifo wil also be sent out. + */ +#define USP_FIFO_SIZE 128 +#define USP_TX_FIFO_THRESHOLD (USP_FIFO_SIZE/2) +#define USP_RX_FIFO_THRESHOLD (USP_FIFO_SIZE/2) + +/* FIFO_WIDTH for the USP_TX_FIFO_CTRL and USP_RX_FIFO_CTRL registers */ +#define USP_FIFO_WIDTH_BYTE 0x00 +#define USP_FIFO_WIDTH_WORD 0x01 +#define USP_FIFO_WIDTH_DWORD 0x02 + +#define USP_ASYNC_DIV2 16 + +#define USP_PLUGOUT_RETRY_CNT 2 + +#define USP_TX_RX_FIFO_WIDTH_DWORD 2 + +#define SIRF_USP_DIV_MCLK 0 +#endif
From: Rongjun Ying rongjun.ying@csr.com
This connects platform DAI, USP(DSP mode) CPU DAI and bt-sco Codec DAI together and works as a mach driver.
Signed-off-by: Rongjun Ying rongjun.ying@csr.com --- .../devicetree/bindings/sound/sirf-bt-sco.txt | 18 ++++ sound/soc/sirf/Kconfig | 6 + sound/soc/sirf/Makefile | 2 + sound/soc/sirf/sirf-bt-sco.c | 99 ++++++++++++++++++++ 4 files changed, 125 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/sirf-bt-sco.txt create mode 100644 sound/soc/sirf/sirf-bt-sco.c
diff --git a/Documentation/devicetree/bindings/sound/sirf-bt-sco.txt b/Documentation/devicetree/bindings/sound/sirf-bt-sco.txt new file mode 100644 index 0000000..e51de20 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/sirf-bt-sco.txt @@ -0,0 +1,18 @@ +* SiRF atlas6/prima2 and bt-sco based audio setups + +Required properties: +- compatible: "sirf,sirf-bt-sco" +- sirf,usp-controller: The phandle of the SiRF usp controller. + +Optional properties: +- bt-sco-master: The phandle of who is master, if set, + the codec is master, Otherwiss, the soc is master. + +Example: + +sirf-bt-sco { + compatible = "sirf,sirf-bt-sco"; + sirf,usp-controller = <&usp0>; + bt-sco-master; +}; + diff --git a/sound/soc/sirf/Kconfig b/sound/soc/sirf/Kconfig index bdd5869..a24a992 100644 --- a/sound/soc/sirf/Kconfig +++ b/sound/soc/sirf/Kconfig @@ -21,6 +21,12 @@ config SND_SOC_SIRF_I2S select REGMAP_MMIO tristate
+config SND_SOC_SIRF_BT_SCO + tristate "SoC Audio support for BT SCO" + depends on SND_SOC_SIRF + select SND_SOC_BT_SCO + select SND_SOC_SIRF_USP + config SND_SOC_SIRF_HDMI tristate "SoC Audio support for SiRF HDMI" depends on SND_SOC_SIRF diff --git a/sound/soc/sirf/Makefile b/sound/soc/sirf/Makefile index 1581b5a..0d4a6b7 100644 --- a/sound/soc/sirf/Makefile +++ b/sound/soc/sirf/Makefile @@ -2,10 +2,12 @@ snd-soc-sirf-audio-port-objs := sirf-audio-port.o snd-soc-sirf-audio-objs := sirf-audio.o snd-soc-sirf-usp-objs := sirf-usp.o snd-soc-sirf-i2s-objs := sirf-i2s.o +snd-soc-sirf-bt-sco-objs := sirf-bt-sco.o snd-soc-sirf-hdmi-objs := sirf-hdmi.o
obj-$(CONFIG_SND_SOC_SIRF_AUDIO_PORT) += snd-soc-sirf-audio-port.o obj-$(CONFIG_SND_SOC_SIRF_AUDIO) += snd-soc-sirf-audio.o obj-$(CONFIG_SND_SOC_SIRF_USP) += snd-soc-sirf-usp.o obj-$(CONFIG_SND_SOC_SIRF_I2S) += snd-soc-sirf-i2s.o +obj-$(CONFIG_SND_SOC_SIRF_BT_SCO) += snd-soc-sirf-bt-sco.o obj-$(CONFIG_SND_SOC_SIRF_HDMI) += snd-soc-sirf-hdmi.o diff --git a/sound/soc/sirf/sirf-bt-sco.c b/sound/soc/sirf/sirf-bt-sco.c new file mode 100644 index 0000000..e01b280 --- /dev/null +++ b/sound/soc/sirf/sirf-bt-sco.c @@ -0,0 +1,99 @@ +/* + * SiRF bt sco ALSA SoC Audio board driver + * + * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ +#include <linux/module.h> +#include <linux/of.h> + +#include <sound/soc.h> + +static int sirf_bt_sco_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->cpu_dai; + struct snd_soc_codec *codec = rtd->codec; + struct snd_soc_card *card = codec->card; + unsigned int fmt; + int ret; + + fmt = card->dai_link[0].dai_fmt; + + /* Set cpu DAI configuration */ + ret = snd_soc_dai_set_fmt(cpu_dai, fmt); + if (ret < 0) { + dev_err(card->dev, "can't set cpu DAI configuration\n"); + return ret; + } + + return 0; +} + +static struct snd_soc_ops sirf_bt_sco_ops = { + .hw_params = sirf_bt_sco_hw_params, +}; + +/* Digital audio interface glue - connects codec <--> CPU */ +static struct snd_soc_dai_link sirf_bt_sco_dai_links[] = { + { + .name = "SiRF BT SCO", + .stream_name = "SiRF BT_SCO", + .codec_dai_name = "bt-sco-pcm", + .codec_name = "bt-sco", + .ops = &sirf_bt_sco_ops, + }, +}; + +static struct snd_soc_card snd_soc_sirf_bt_sco_card = { + .name = "SiRF BT SCO", + .owner = THIS_MODULE, + .dai_link = sirf_bt_sco_dai_links, + .num_links = ARRAY_SIZE(sirf_bt_sco_dai_links), +}; + +static int sirf_bt_sco_probe(struct platform_device *pdev) +{ + struct snd_soc_card *card = &snd_soc_sirf_bt_sco_card; + int ret; + + sirf_bt_sco_dai_links[0].cpu_of_node = + of_parse_phandle(pdev->dev.of_node, "sirf,usp-controller", 0); + sirf_bt_sco_dai_links[0].platform_of_node = + of_parse_phandle(pdev->dev.of_node, "sirf,usp-controller", 0); + if (of_property_read_bool(pdev->dev.of_node, "bt-sco-master")) + sirf_bt_sco_dai_links[0].dai_fmt = SND_SOC_DAIFMT_CBM_CFM; + else + sirf_bt_sco_dai_links[0].dai_fmt = SND_SOC_DAIFMT_CBS_CFS; + card->dev = &pdev->dev; + + ret = devm_snd_soc_register_card(&pdev->dev, card); + if (ret) + dev_err(&pdev->dev, "snd_soc_register_card() failed:%d\n", ret); + + return ret; +} + +static const struct of_device_id sirf_bt_sco_of_match[] = { + { .compatible = "sirf,sirf-bt-sco", }, + {} +}; +MODULE_DEVICE_TABLE(of, sirf_bt_sco_of_match); + +static struct platform_driver sirf_bt_sco_driver = { + .driver = { + .name = "sirf-bt-sco", + .owner = THIS_MODULE, + .pm = &snd_soc_pm_ops, + .of_match_table = sirf_bt_sco_of_match, + }, + .probe = sirf_bt_sco_probe, +}; + +module_platform_driver(sirf_bt_sco_driver); + +MODULE_DESCRIPTION("SIRF BT SCO ALSA SoC Audio board driver"); +MODULE_AUTHOR("RongJun Ying Rongjun.Ying@csr.com"); +MODULE_LICENSE("GPL v2");
participants (4)
-
Barry Song -
Mark Brown -
RongJun Ying -
Rongjun Ying