This patch adds stream documentation describing SoundWire stream and stream states. Signed-off-by: Hardik Shah <hardik.t.shah@intel.com> Signed-off-by: Sanyog Kale <sanyog.r.kale@intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> --- Documentation/sound/alsa/sdw/stream.txt | 346 +++++++++++++++++++++++++++++++ 1 file changed, 346 insertions(+) create mode 100644 Documentation/sound/alsa/sdw/stream.txt diff --git a/Documentation/sound/alsa/sdw/stream.txt b/Documentation/sound/alsa/sdw/stream.txt new file mode 100644 index 0000000..a1a2ed0 --- /dev/null +++ b/Documentation/sound/alsa/sdw/stream.txt @@ -0,0 +1,346 @@ +Audio Stream in SoundWire +========================= +An audio stream is a logical or virtual connection created between + +1. System memory buffer(s) and Codec(s) +2. DSP memory buffer(s) and Codec(s) +3. FIFO(s) and Codec(s) +4. Codec(s) and Codec(s) + +which is typically driven by a DMA(s) channel through the data link. An +audio stream contains one or more channels of data. All channels within +stream must have same sample rate and same sample size. + +Assume a stream with two channels (Left & Right) is opened using +SoundWire interface. Below are some of different way a stream can be +represented in SoundWire. + +Stream Sample in memory (System memory, DSP memory or FIFOs): +------------------------- +| L | R | L | R | L | R | +------------------------- + +Example 1: Stereo Stream with L and R channels is rendered from Master +to Slave. Both Master and Slave is using single port. + ++---------------+ Clock Signal +---------------+ +| Master +---------------------------------------+ Slave | +| Interface | | Interface | +| | | 1 | +| | Data Signal | | +| L + R +---------------------------------------+ L + R | +| (Data) | Data Direction | (Data) | ++---------------+ +-----------------------> +---------------+ + + +Example 2: Stereo Stream with L and R channels is captured from Slave to +Master. Both Master and Slave is using single port. + + ++---------------+ Clock Signal +---------------+ +| Master +---------------------------------------+ Slave | +| Interface | | Interface | +| | | 1 | +| | Data Signal | | +| L + R +---------------------------------------+ L + R | +| (Data) | Data Direction | (Data) | ++---------------+ <-----------------------+ +---------------+ + + +Example 3: Stereo Stream with L and R channels is rendered by Master. +Each of the L and R channel is received by two different Slaves. Master +and both Slaves are using single port. + + ++---------------+ Clock Signal +---------------+ +| Master +------------+--------------------------+ Slave | +| Interface | | | Interface | +| | | | 1 | +| | | Data Signal | | +| L + R +------+--------------------------------+ L | +| (Data) | | | Data Direction | (Data) | ++---------------+ | | +-------------> +---------------+ + | | + | | + | | +---------------+ + | +------------------------> | Slave | + | | Interface | + | | 2 | + | | | + +------------------------------> | R | + | (Data) | + +---------------+ + + +Example 4: Stereo Stream with L and R channel is rendered by 2 Masters, +each rendering one channel, and is received by two different Slaves, +each receiving one channel. Both Masters and both Slaves are using +single port. + + ++---------------+ Clock Signal +---------------+ +| Master +---------------------------------------+ Slave | +| Interface | | Interface | +| 1 | | 1 | +| | Data Signal | | +| L +---------------------------------------+ L | +| (Data) | Data Direction | (Data) | ++---------------+ +-----------------------> +---------------+ + ++---------------+ Clock Signal +---------------+ +| Master +---------------------------------------+ Slave | +| Interface | | Interface | +| 2 | | 2 | +| | Data Signal | | +| R +---------------------------------------+ R | +| (Data) | Data Direction | (Data) | ++---------------+ +-----------------------> +---------------+ + + +Example 5: Stereo Stream with L and R channel is rendered by two +different Ports of the Master and is received by only single Port of the +Slave interface. + + ++------------------------+ +| | +| +--------------+ +-------------------+ +| | || | | +| | Data Port || L Channel | | +| | 1 |------------+ | | +| | L Channel || | +-----+----+ | +| | (Data) || | L + R Channel || Data | | +| Master +--------------+ | +---+---------> || Port | | +| Interface | | || 1 | | +| +--------------+ | || | | +| | || | +----------+ | +| | Data Port |------------+ | | +| | 2 || R Channel | Slave | +| | R Channel || | Interface | +| | (Data) || | 1 | +| +--------------+ Clock Signal | L + R | +| +---------------------------> | (Data) | ++------------------------+ | | + +-------------------+ + + +Example 6: Stereo stream with L and R channel is rendered by Slave +Interface 1 to Slave Interface 2. Master is driving the Clock. Audio +stream data flow is from Slave interface 1 to Slave Interface 2. + + + +---------------+ ++---------------+ Clock Signal | | +| Master +--+----------------------------------> | Slave | +| Interface | | Data Signal | Interface | +| +--------+----------------------------+ | 1 | ++---------------+ | | | | + | | | L + R | + | | +----------------+ | (Data) | + | | | +---------------+ + | | | + | | | Data Direction + | | | +---------------+ + | | | | | + | | +----------------> | Slave | + | | | Interface | + | | Clock Signal | 2 | + | +------------------------------+ | + | Data Signal | L + R | + +------------------------------------+ (Data) | + +---------------+ + + +SoundWire Stream Management flow +================================ + +SoundWire Stream definitions: +1. Current stream: This is classified as the stream on which operation +has to be performed like prepare, enable, disable, de-prepare etc. + +2. Active stream: This is classified as the stream which is already +active on bus other than current stream. There can be multiple active +streams on the bus. + +SoundWire bus driver manages stream operations for each stream getting +rendered/captured on the SoundWire bus. + +This section explains what Bus driver operations are done for each of +the stream getting allocated/released on bus driver. Following are the +stream states maintained by the Bus driver for each of the audio stream +getting opened. + + +SoundWire stream states +======================= +Below figure shows the SoundWire stream states and possible state +transition diagram. + +|--------------| |-------------| |--------------| |--------------| +| ALLOC |---->| CONFIG |---->| PREPARE |---->| ENABLE | +| STATE | | STATE | | STATE | | STATE | +|--------------| |-------------| |--------------| |--------------| + ^ | + | | + | | + | | + | \/ + |--------------| |--------------| |--------------| + | RELEASE |<--------------------| DEPREPARE |<----| DISABLE | + | STATE | | STATE | | STATE | + |--------------| |--------------| |--------------| + + +SoundWire Stream State Operations +================================== +Below section explains the operations done by the bus driver on +Master(s) and Slave(s) as part of stream state transitions. + +SDW_STATE_STRM_ALLOC: Allocation state for stream. This is the entry +state of the stream. Operations performed before entering in this +state: +1. An unique stream tag is assigned to stream. This stream tag is used +as a reference for all the operations performed on stream. + +2. The resources required for holding stream runtime information are +allocated and initialized. This holds all stream related information +such as stream type (PCM/PDM) and parameters, Master and Slave interface +associated with the stream, reference counting, stream state etc. + +After all above operations are successful, stream state is set to +SDW_STATE_STRM_ALLOC. + + +SDW_STATE_STRM_CONFIG: Configuration state of stream. Operations +performed before entering in this state: +1. The resources allocated for stream information in +SDW_STATE_STRM_ALLOC state are updated. This includes stream parameters, +Masters and Slaves runtime information associated with the stream. + +2. All the Masters and Slaves associated with the stream updates the +port configuration to bus driver. This includes port numbers allocated +by Master(s) and Slave(s) for this stream. + +After all above operations are successful, stream state is set to +SDW_STATE_STRM_CONFIG. + + +SDW_STATE_STRM_PREPARE: Prepare state of stream. Operations performed +before entering in this state: +1. Bus parameters such as bandwidth, frame shape, clock frequency, SSP +interval are computed based on current stream as well as already active +streams on bus. Re-computation is required to accommodate current stream +on the bus. + +2. Transport parameters of all Master and Slave ports are computed for +the current as well as already active stream based on above calculated +frame shape and clock frequency. + +3. Computed bus and transport parameters are programmed in Master and +Slave registers. The banked registers programming is done on the +alternate bank (bank currently unused). Port channels are enabled for +the already active streams on the alternate bank (bank currently +unused). This is done in order to not to disrupt already active +stream(s). + +4. Once all the new values are programmed, bus initiates switch to +alternate bank. Once switch is successful, the port channels enabled on +previous bank for already active streams are disabled. + +5. Ports of Master and Slave for current stream are prepared. + +After all above operations are successful, stream state is set to +SDW_STATE_STRM_PREPARE. + + +SDW_STATE_STRM_ENABLE: Enable state of stream. Operations performed +before entering in this state: +1. All the values computed in SDW_STATE_STRM_PREPARE state are +programmed in alternate bank (bank currently unused). It includes +programming of already active streams as well. + +2. All the Master and Slave port channels for the current stream are +enabled on alternate bank (bank currently unused). + +3. Once all the new values are programmed, bus initiates switch to +alternate bank. Once the switch is successful, the port channels enabled +on previous bank for already active streams are disabled. + +After all above operations are successful, stream state is set to +SDW_STATE_STRM_ENABLE. + + +SDW_STATE_STRM_DISABLE --> Disable state of stream. Operations performed +before entering in this state: +1. Disable for Master and Slave ports channels is performed on on +alternate bank (bank currently unused) registers for current stream. + +2. All the current configuration of bus and Master and Slave ports are +programmed into alternate bank (bank currently unused). It includes +programming of already active streams port channels on alternate bank +(bank currently unused). + +3. Bus initiates switch to alternate bank. Once the switch is +successful, the port channels of current stream are disabled. All the +port channels enabled on previous bank for active stream are disabled. + +After all above operations are successful, stream state is set to +SDW_STATE_STRM_DISABLE. + + +SDW_STATE_STRM_DEPREPARE: De-prepare state of stream. Operations +performed before entering in this state: +1. Check the bandwidth required per Master. If its zero, de-prepare +current stream and move stream state to SDW_STATE_STRM_DEPREPARE, rest +of the steps are not required. If bandwidth required per Master is non +zero that means some more streams are running on Master and continue +with next step. + +2. Bus parameters and transport parameters are computed for the active +stream(s) on the given Master. + +3. All the computed values for active stream(s) are programmed into +alternate bank (bank currently unused) in Master and Slave registers. + +4. Bus initiates switch to alternate bank. Once the switch is +successful, all the port channels enabled on previous bank for active +stream are disabled. + +5. De-prepare ports of the Master and Slave associated with current +stream. + +After all above operations are successful, stream state is set to +SDW_STATE_DEPREPARE. + + +SDW_STATE_STRM_RELEASE: Release state of stream. Operations performed +before entering in this state: +1. Release port resources for all Master and Slave ports used for +current stream. + +2. Release Master and Slave runtime resources used for current stream. + +3. Release stream runtime resources used for current stream. + +After all above operations are successful, stream state is set to +SDW_STATE_STRM_RELEASE. + +Future Enhancements +=================== +1. Slave to Slave communication: Currently stream between Slaves is not +supported. Master should be always part of the stream(s). + +2. Stream Linking for synchronized start: Currently multiple streams +cannot be synchronously started together with single bank switch. This +may require ASoC framework changes as well. + +Not Supported +============= +1. A single port with multiple channels supported cannot be used between +two streams or across stream. For example a port with 4 channels cannot +be used to handle 2 independent stereo streams even though it's possible +in theory in SoundWire. + +2. Bandwidth allocation is done in contiguous slots for stream. +Non-contiguous slots created due to bandwidth fragmentation are not +taken care in bandwidth calculation. -- 1.7.9.5

This patch adds following documentation: 1. Bus driver locking mechanism. 2. Bus driver error handling. Signed-off-by: Hardik Shah <hardik.t.shah@intel.com> Signed-off-by: Sanyog Kale <sanyog.r.kale@intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> --- Documentation/sound/alsa/sdw/error_handling.txt | 71 +++++++++++++++++++++++ Documentation/sound/alsa/sdw/locking.txt | 64 ++++++++++++++++++++ 2 files changed, 135 insertions(+) create mode 100644 Documentation/sound/alsa/sdw/error_handling.txt create mode 100644 Documentation/sound/alsa/sdw/locking.txt diff --git a/Documentation/sound/alsa/sdw/error_handling.txt b/Documentation/sound/alsa/sdw/error_handling.txt new file mode 100644 index 0000000..9441cfa --- /dev/null +++ b/Documentation/sound/alsa/sdw/error_handling.txt @@ -0,0 +1,71 @@ +The SoundWire PHY was designed with care and errors on the bus are going +to be very unlikely, and if they happen they should be limited to single +bit errors. Examples of this design can be found in the the +synchronization mechanism (sync loss after two errors) and short CRCs +used for the Bulk Register Access. + +The errors can be detected with multiple mechanisms: + +1. Bus clash or parity errors: This mechanism relies on low-level +detectors that are independent of the payload and usages, and they +cover both control and audio data. The current implementation only logs +such errors. Improvements could consist in invalidating an entire +programming sequence and restarting from a known position. In the case +of such errors happening outside of a control/command sequence, there is +no concealment or recovery for audio data enabled by the SoundWire +protocol, the location of the error will also impact its audibility +(most-significant bits will be more impacted in PCM), and after a number +of such errors are detected the bus might be reset. Note that bus +clashes due to programming errors (two streams using the same bit slots) +or electrical issues during the transmit/receive transition cannot be +distinguished, although a recurring bus clash when audio is enabled is a +clear hint of a bus allocation issue. The interrupt mechanism can also +help identify Slaves which detected a Bus Clash or a Parity Error, but +they may not be responsible for the errors so resetting them +individually is not a viable recovery strategy. + +2. Command status: Each command is associated with a status, which only +covers transmission of the data between devices. The ACK status +indicates that the command was received and will be executed by the end +of the current frame. A NAK indicates that the command was in error and +will not be applied. In case of a bad programming (command sent to +non-existent Slave or to a non-implemented register) or electrical +issue, no response signals the command was ignored. Some Master +implementations allow for a command to be retransmitted several times. +If the retransmission fails, backtracking and restarting the entire +programming sequence might be a solution. Alternatively some +implementations might directly issue a bus reset and re-enumerate all +devices. + +3. Timeouts: In a number of cases such as ChannelPrepare or +ClockStopPrepare, the bus driver is supposed to poll a register field +until it transitions to a NotFinished value of zero. The MIPI SoundWire +spec 1.1 does not define timeouts but the MIPI SoundWire DisCo document +adds recommendation on timeouts. If such configurations do not complete, +the driver will return a -ETIMEOUT. Such timeouts are symptoms of a +faulty Slave device and are likely impossible to recover from. + + +Errors during global reconfiguration sequences are extremely difficult +to handle: + +1. BankSwitch: An error during the last command issuing a BankSwitch is +difficult to backtrack from. Retransmitting the Bank Switch command +may be possible in a single segment setup, but this can lead to +synchronization problems when enabling multiple bus segments (a command +with side effects such as frame reconfiguration would be handled at +different times). A global hard-reset might be the best solution. + +2. ClockStop: If one Slave is not capable of engaging the clock stop and +the system still needs to suspend, the priority might be to suspend +anyway and reset the bus on startup. This would prevent any active +standby/always-on activity but would not impact power targets. + +Note that SoundWire does not provide a detection mechanism for writing +illegal values in valid registers. In a number of cases the standard +even mentions that the Slave might behave in implementation-defined +registers. The bus driver implementation does not provide a recovery +mechanism for such errors, Slave or Master driver implementers are +responsible for writing valid values in valid registers and implement +additional range checking if needed. + diff --git a/Documentation/sound/alsa/sdw/locking.txt b/Documentation/sound/alsa/sdw/locking.txt new file mode 100644 index 0000000..650162f --- /dev/null +++ b/Documentation/sound/alsa/sdw/locking.txt @@ -0,0 +1,64 @@ +This document explains locking mechanism of the SoundWire bus driver. +Following types of lock are used in SoundWire bus driver. + +1. Core lock +2. Master lock +3. Stream lock +4. Message lock + +1. Core lock: Global SoundWire bus driver lock. Core lock is used to +serialize each of the following operation(s) within SoundWire bus +driver. + - Addition and removal of Master. + - Acquire "Master lock" of each Master associated with the + aggregated stream. + + +2. Master lock: SoundWire bus instance lock. Master lock is used to +serialize each of the following operation(s) within SoundWire bus +instance. + - Addition and removal of Slave(s). + - Prepare and enable, disable and de-prepare. + + +3. Stream lock: SoundWire stream lock. Stream lock is used to serialize +access of stream data structure for a SoundWire stream. + + +4. Message lock: SoundWire message transfer lock. This lock is used to +serialize the message transfers(read/write) within the SoundWire bus +instance. + + +Lock Hierarchy +============== + +- Core lock is the parent of Master and Stream lock. +- Master lock is parent of Message lock. +- Master and Stream locks are independent of each other. + +Example +======= + +Below example shows how locks are acquired during prepare and enable +operation for aggregated stream. In this example, stream 1 is associated +with Master 1 and Master 2. + +1. Acquire Core lock. +2. Acquire Master 1 lock. +3. Acquire Master 2 lock. +4. Release Core lock. + +5. Prepare operation. + 5.1 Acquire Message lock. + 5.2 Transfer message on bus (Single message transfer example). + 5.3 Release Message lock. +6. Enable operation. + 6.1 Acquire Message lock. + 6.2 Transfer message on bus (Single message transfer example). + 6.3 Release Message lock. + +7. Acquire Core lock. +8. Release Master 1 lock. +9. Release Master 2 lock. +10. Release Core lock. -- 1.7.9.5

This patch adds following SoundWire bus driver APIs. 1. Register SoundWire Master device and driver. 2. Register SoundWire Slave driver. 3. Register Slave device capabilities. Signed-off-by: Hardik Shah <hardik.t.shah@intel.com> Signed-off-by: Sanyog Kale <sanyog.r.kale@intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> --- sound/Kconfig | 2 + sound/Makefile | 1 + sound/sdw/Kconfig | 6 + sound/sdw/Makefile | 1 + sound/sdw/sdw.c | 886 ++++++++++++++++++++++++++++++++++++++++++++++++++ sound/sdw/sdw_priv.h | 102 ++++++ 6 files changed, 998 insertions(+) create mode 100644 sound/sdw/Kconfig create mode 100644 sound/sdw/Makefile create mode 100644 sound/sdw/sdw.c create mode 100644 sound/sdw/sdw_priv.h diff --git a/sound/Kconfig b/sound/Kconfig index 5a240e0..9f67cf7 100644 --- a/sound/Kconfig +++ b/sound/Kconfig @@ -108,6 +108,8 @@ source "sound/parisc/Kconfig" source "sound/soc/Kconfig" +source "sound/sdw/Kconfig" + endif # SND menuconfig SOUND_PRIME diff --git a/sound/Makefile b/sound/Makefile index c41bdf5..914101e 100644 --- a/sound/Makefile +++ b/sound/Makefile @@ -3,6 +3,7 @@ obj-$(CONFIG_SOUND) += soundcore.o obj-$(CONFIG_SOUND_PRIME) += oss/ +obj-$(CONFIG_SOUND_SDW) += sdw/ obj-$(CONFIG_DMASOUND) += oss/ obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ sh/ synth/ usb/ \ firewire/ sparc/ spi/ parisc/ pcmcia/ mips/ soc/ atmel/ hda/ diff --git a/sound/sdw/Kconfig b/sound/sdw/Kconfig new file mode 100644 index 0000000..052079f --- /dev/null +++ b/sound/sdw/Kconfig @@ -0,0 +1,6 @@ +config SOUND_SDW + tristate + help + SoundWire interface is typically used for transporting data + related to audio functions. Concerned drivers should "select" + this. diff --git a/sound/sdw/Makefile b/sound/sdw/Makefile new file mode 100644 index 0000000..6ed1881 --- /dev/null +++ b/sound/sdw/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_SOUND_SDW) += sdw.o diff --git a/sound/sdw/sdw.c b/sound/sdw/sdw.c new file mode 100644 index 0000000..d4e79b8a --- /dev/null +++ b/sound/sdw/sdw.c @@ -0,0 +1,886 @@ +/* + * sdw.c - SoundWire bus driver implementation. + * + * Author: Hardik Shah <hardik.t.shah@intel.com> + * + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + * + * This file is provided under a dual BSD/GPLv2 license. When using or + * redistributing this file, you may do so under either license. + * + * GPL LICENSE SUMMARY + * + * Copyright(c) 2016 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * + * BSD LICENSE + * + * Copyright(c) 2016 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + * + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/errno.h> +#include <linux/slab.h> +#include <linux/pm_runtime.h> +#include <linux/pm_domain.h> +#include <sound/sdw_bus.h> +#include <sound/sdw_master.h> +#include <sound/sdw_slave.h> + +#include "sdw_priv.h" + +/* + * Global SoundWire core instance contains list of Masters registered, core + * lock and SoundWire stream tags. + */ +struct snd_sdw_core snd_sdw_core; + +static void sdw_slv_release(struct device *dev) +{ + kfree(to_sdw_slave(dev)); +} + +static void sdw_mstr_release(struct device *dev) +{ + struct sdw_master *mstr = to_sdw_master(dev); + + complete(&mstr->slv_released_complete); +} + +static struct device_type sdw_slv_type = { + .groups = NULL, + .release = sdw_slv_release, +}; + +static struct device_type sdw_mstr_type = { + .groups = NULL, + .release = sdw_mstr_release, +}; + +/** + * sdw_slv_verify - return parameter as sdw_slave, or NULL + * @dev: device, probably from some driver model iterator + * + * When traversing the driver model tree, perhaps using driver model + * iterators like @device_for_each_child(), you can't assume very much + * about the nodes you find. Use this function to avoid oopses caused + * by wrongly treating some non-SDW device as an sdw_slave. + */ +static struct sdw_slave *sdw_slv_verify(struct device *dev) +{ + return (dev->type == &sdw_slv_type) + ? to_sdw_slave(dev) + : NULL; +} + +/** + * sdw_mstr_verify: return parameter as sdw_master, or NULL + * + * @dev: device, probably from some driver model iterator + * + * When traversing the driver model tree, perhaps using driver model + * iterators like @device_for_each_child(), you can't assume very much + * about the nodes you find. Use this function to avoid oopses caused + * by wrongly treating some non-SDW device as an sdw_master. + */ +static struct sdw_master *sdw_mstr_verify(struct device *dev) +{ + return (dev->type == &sdw_mstr_type) + ? to_sdw_master(dev) + : NULL; +} + +static const struct sdw_slave_id *sdw_match_slv(const struct sdw_slave_id *id, + const struct sdw_slave *sdw_slv) +{ + const struct sdw_slave_priv *slv_priv = &sdw_slv->priv; + + if (!id) + return NULL; + + /* + * IDs should be NULL terminated like the last ID in the list should + * be null, as done for drivers like platform, i2c etc. + */ + while (id->name[0]) { + if (strncmp(slv_priv->name, id->name, SOUNDWIRE_NAME_SIZE) == 0) + return id; + + id++; + } + + return NULL; +} + +static const struct sdw_master_id *sdw_match_mstr( + const struct sdw_master_id *id, + const struct sdw_master *sdw_mstr) +{ + if (!id) + return NULL; + + /* + * IDs should be NULL terminated like the last ID in the list should + * be null, as done for drivers like platform, i2c etc. + */ + while (id->name[0]) { + if (strncmp(sdw_mstr->name, id->name, SOUNDWIRE_NAME_SIZE) == 0) + return id; + id++; + } + return NULL; +} + +static int sdw_slv_match(struct device *dev, struct device_driver *driver) +{ + struct sdw_slave *sdw_slv; + struct sdw_driver *sdw_drv = to_sdw_driver(driver); + struct sdw_slave_driver *drv; + int ret = 0; + + + if (sdw_drv->driver_type != SDW_DRIVER_TYPE_SLAVE) + return ret; + + drv = to_sdw_slave_driver(driver); + sdw_slv = to_sdw_slave(dev); + + /* + * We are matching based on the dev_id field, dev_id field is unique + * based on part_id and manufacturer id. Device will be registered + * based on dev_id and driver will also have same dev_id for device + * its controlling. + */ + ret = (sdw_match_slv(drv->id_table, sdw_slv) != NULL); + + if (ret < 0) + sdw_slv->priv.driver = drv; + + return ret; +} + +static int sdw_mstr_match(struct device *dev, struct device_driver *driver) +{ + struct sdw_master *sdw_mstr; + struct sdw_driver *sdw_drv = to_sdw_driver(driver); + struct sdw_master_driver *drv; + int ret = 0; + + if (sdw_drv->driver_type != SDW_DRIVER_TYPE_MASTER) + return ret; + + drv = to_sdw_master_driver(driver); + sdw_mstr = to_sdw_master(dev); + + ret = (sdw_match_mstr(drv->id_table, sdw_mstr) != NULL); + + if (driver->name && !ret) + ret = (strncmp(sdw_mstr->name, driver->name, + SOUNDWIRE_NAME_SIZE) == 0); + + if (ret < 0) + sdw_mstr->driver = drv; + + return ret; +} + +static int sdw_mstr_probe(struct device *dev) +{ + const struct sdw_master_driver *sdrv = + to_sdw_master_driver(dev->driver); + struct sdw_master *mstr = to_sdw_master(dev); + int ret; + + ret = dev_pm_domain_attach(dev, true); + + if (ret != -EPROBE_DEFER) { + ret = sdrv->probe(mstr, sdw_match_mstr(sdrv->id_table, mstr)); + if (ret < 0) + dev_pm_domain_detach(dev, true); + } + + return ret; +} + +static int sdw_slv_probe(struct device *dev) +{ + const struct sdw_slave_driver *sdrv = to_sdw_slave_driver(dev->driver); + struct sdw_slave *sdwslv = to_sdw_slave(dev); + int ret; + + ret = dev_pm_domain_attach(dev, true); + + if (ret != -EPROBE_DEFER) { + ret = sdrv->probe(sdwslv, sdw_match_slv(sdrv->id_table, + sdwslv)); + if (ret < 0) + dev_pm_domain_detach(dev, true); + } + + return ret; +} + +static int sdw_mstr_remove(struct device *dev) +{ + const struct sdw_master_driver *sdrv = + to_sdw_master_driver(dev->driver); + int ret; + + ret = sdrv->remove(to_sdw_master(dev)); + dev_pm_domain_detach(dev, true); + return ret; + +} + +static int sdw_slv_remove(struct device *dev) +{ + const struct sdw_slave_driver *sdrv = to_sdw_slave_driver(dev->driver); + int ret; + + ret = sdrv->remove(to_sdw_slave(dev)); + dev_pm_domain_detach(dev, true); + + return ret; +} + +static void sdw_slv_shutdown(struct device *dev) +{ + const struct sdw_slave_driver *sdrv = + to_sdw_slave_driver(dev->driver); + + sdrv->shutdown(to_sdw_slave(dev)); +} + +static void sdw_mstr_shutdown(struct device *dev) +{ + const struct sdw_master_driver *sdrv = + to_sdw_master_driver(dev->driver); + + sdrv->shutdown(to_sdw_master(dev)); +} + +static int sdw_match(struct device *dev, struct device_driver *driver) +{ + struct sdw_slave *sdw_slv; + struct sdw_master *sdw_mstr; + + sdw_slv = sdw_slv_verify(dev); + if (sdw_slv) + return sdw_slv_match(dev, driver); + + sdw_mstr = sdw_mstr_verify(dev); + if (sdw_mstr) + return sdw_mstr_match(dev, driver); + + /* + * Returning 0 to calling function means match not found, so calling + * function will not call probe + */ + return 0; + +} + +static const struct dev_pm_ops soundwire_pm = { + .suspend = pm_generic_suspend, + .resume = pm_generic_resume, + SET_RUNTIME_PM_OPS( + pm_generic_runtime_suspend, + pm_generic_runtime_resume, + NULL) +}; + +static struct bus_type sdw_bus_type = { + .name = "soundwire", + .match = sdw_match, + .pm = &soundwire_pm, +}; + +/** + * snd_sdw_master_register_driver: SoundWire Master driver registration with + * bus. This API will register the Master driver with the SoundWire + * bus. It is typically called from the driver's module-init function. + * + * @driver: Master Driver to be associated with Master interface. + * @owner: Module owner, generally THIS module. + */ +int snd_sdw_master_register_driver(struct sdw_master_driver *driver, + struct module *owner) +{ + int ret; + + if (!driver->probe) + return -EINVAL; + + if (!driver->ops->xfer_msg || !driver->ops->reset_page_addr) + return -EINVAL; + + if (!driver->port_ops->dpn_set_port_params || + !driver->port_ops->dpn_set_port_transport_params || + !driver->port_ops->dpn_port_enable_ch) + return -EINVAL; + + driver->driver.probe = sdw_mstr_probe; + + if (driver->remove) + driver->driver.remove = sdw_mstr_remove; + if (driver->shutdown) + driver->driver.shutdown = sdw_mstr_shutdown; + + /* add the driver to the list of sdw drivers in the driver core */ + driver->driver.owner = owner; + driver->driver.bus = &sdw_bus_type; + + /* + * When registration returns, the driver core will have called + * probe() for all matching-but-unbound Slaves, devices which are + * not bind to any driver still. + */ + ret = driver_register(&driver->driver); + if (ret) + return ret; + + pr_debug("sdw-core: driver [%s] registered\n", driver->driver.name); + + return 0; +} +EXPORT_SYMBOL_GPL(snd_sdw_master_register_driver); + +/** + * snd_sdw_slave_driver_register: SoundWire Slave driver registration with + * bus. This API will register the Slave driver with the SoundWire bus. + * It is typically called from the driver's module-init function. + * + * @driver: Driver to be associated with Slave. + * @owner: Module owner, generally THIS module. + */ +int snd_sdw_slave_driver_register(struct sdw_slave_driver *driver, + struct module *owner) +{ + int ret; + + if (driver->probe) + driver->driver.probe = sdw_slv_probe; + if (driver->remove) + driver->driver.remove = sdw_slv_remove; + if (driver->shutdown) + driver->driver.shutdown = sdw_slv_shutdown; + + /* Add the driver to the list of sdw drivers in the driver core */ + driver->driver.owner = owner; + driver->driver.bus = &sdw_bus_type; + + /* + * When registration returns, the driver core will have called + * probe() for all matching-but-unbound Slaves. + */ + ret = driver_register(&driver->driver); + if (ret) + return ret; + + pr_debug("sdw-core: driver [%s] registered\n", driver->driver.name); + + return 0; +} +EXPORT_SYMBOL_GPL(snd_sdw_slave_driver_register); + +static int sdw_copy_aud_mod_prop(struct sdw_port_aud_mode_prop *slv_prop, + struct sdw_port_aud_mode_prop *prop) +{ + /* + * Currently goto is used in API to perform different + * operations. TODO: Avoid usage of goto statement + */ + memcpy(slv_prop, prop, sizeof(*prop)); + + if (!prop->num_bus_freq_cfgs) + goto handle_sample_rate; + + slv_prop->clk_freq_buf = kcalloc(prop->num_bus_freq_cfgs, + sizeof(unsigned int), + GFP_KERNEL); + + if (!slv_prop->clk_freq_buf) + goto mem_error; + + memcpy(slv_prop->clk_freq_buf, prop->clk_freq_buf, + (prop->num_bus_freq_cfgs * + sizeof(unsigned int))); + +handle_sample_rate: + + if (!prop->num_sample_rate_cfgs) + return 0; + + slv_prop->sample_rate_buf = kcalloc(prop->num_sample_rate_cfgs, + sizeof(unsigned int), + GFP_KERNEL); + + if (!slv_prop->sample_rate_buf) + goto mem_error; + + memcpy(slv_prop->sample_rate_buf, prop->sample_rate_buf, + (prop->num_sample_rate_cfgs * + sizeof(unsigned int))); + + return 0; + +mem_error: + kfree(prop->clk_freq_buf); + kfree(slv_prop->sample_rate_buf); + return -ENOMEM; + +} + +static int sdw_update_dpn_caps(struct sdw_dpn_caps *slv_dpn_cap, + struct sdw_dpn_caps *dpn_cap) +{ + int j, ret = 0; + struct sdw_port_aud_mode_prop *slv_prop, *prop; + + /* + * Currently goto is used in API to perform different + * operations. TODO: Avoid usage of goto statement + */ + + /* + * slv_prop and prop are using to make copy of mode properties. + * prop holds mode properties received which needs to be updated to + * slv_prop. + */ + + memcpy(slv_dpn_cap, dpn_cap, sizeof(*dpn_cap)); + + /* + * Copy bps (bits per sample) buffer as part of Slave capabilities + */ + if (!dpn_cap->num_bps) + goto handle_ch_cnt; + + slv_dpn_cap->bps_buf = kcalloc(dpn_cap->num_bps, sizeof(u8), + GFP_KERNEL); + + if (!slv_dpn_cap->bps_buf) { + ret = -ENOMEM; + goto error; + } + + memcpy(slv_dpn_cap->bps_buf, dpn_cap->bps_buf, + (dpn_cap->num_bps * sizeof(u8))); + +handle_ch_cnt: + if (!dpn_cap->num_ch_cnt) + goto handle_audio_mode_prop; + + slv_dpn_cap->ch_cnt_buf = kcalloc(dpn_cap->num_ch_cnt, sizeof(u8), + GFP_KERNEL); + if (!dpn_cap->num_ch_cnt) { + ret = -ENOMEM; + goto error; + } + + /* Copy channel count buffer as part of Slave capabilities */ + memcpy(slv_dpn_cap->ch_cnt_buf, dpn_cap->ch_cnt_buf, + (dpn_cap->num_ch_cnt * sizeof(u8))); + +handle_audio_mode_prop: + + slv_dpn_cap->mode_properties = kzalloc((sizeof(*slv_prop) * + dpn_cap->num_audio_modes), + GFP_KERNEL); + + if (!slv_dpn_cap->mode_properties) { + ret = -ENOMEM; + goto error; + } + + for (j = 0; j < dpn_cap->num_audio_modes; j++) { + + prop = &dpn_cap->mode_properties[j]; + slv_prop = &slv_dpn_cap->mode_properties[j]; + + /* Copy audio properties as part of Slave capabilities */ + ret = sdw_copy_aud_mod_prop(slv_prop, prop); + if (ret < 0) + goto error; + } + + return ret; + +error: + kfree(slv_dpn_cap->mode_properties); + kfree(slv_dpn_cap->ch_cnt_buf); + kfree(slv_dpn_cap->bps_buf); + return ret; + +} + +/* Free all the memory allocated for registering the capabilities */ +static void sdw_unregister_slv_caps(struct sdw_slave *sdw, + unsigned int num_port_direction) +{ + int i, j, k; + struct sdw_slave_caps *caps = &sdw->priv.caps; + struct sdw_dpn_caps *dpn_cap; + struct sdw_port_aud_mode_prop *mode_prop; + u8 ports; + + for (i = 0; i < num_port_direction; i++) { + + if (i == SDW_DATA_DIR_OUT) + ports = caps->num_src_ports; + else + ports = caps->num_sink_ports; + for (j = 0; j < ports; j++) { + dpn_cap = &caps->dpn_caps[i][j]; + kfree(dpn_cap->bps_buf); + kfree(dpn_cap->ch_cnt_buf); + + for (k = 0; k < dpn_cap->num_audio_modes; k++) { + mode_prop = dpn_cap->mode_properties; + kfree(mode_prop->clk_freq_buf); + kfree(mode_prop->sample_rate_buf); + } + } + } +} + +static inline void sdw_copy_slv_caps(struct sdw_slave *sdw, + struct sdw_slave_caps *caps) +{ + struct sdw_slave_caps *slv_caps; + + slv_caps = &sdw->priv.caps; + + memcpy(slv_caps, caps, sizeof(*slv_caps)); +} + +/** + * snd_sdw_slave_register_caps: Register Slave device capabilities to the + * bus driver. Since bus driver handles bunch of Slave register + * programming it should be aware of Slave device capabilities. Slave + * device is attached to bus based on enumeration. Once Slave driver is + * attached to device and probe of Slave driver is called on device and + * driver binding, Slave driver should call this function to register + * its capabilities to bus. This should be the very first function to + * bus driver from Slave driver once Slave driver is registered and + * probed. + * + * @slave: SoundWire Slave handle. + * @cap: Slave caps to be registered to bus driver. + */ +int snd_sdw_slave_register_caps(struct sdw_slave *slave, + struct sdw_slave_caps *cap) +{ + struct sdw_slave_caps *caps; + struct sdw_dpn_caps *slv_dpn_cap, *dpn_cap; + int i, j, ret; + u8 ports; + + caps = &slave->priv.caps; + + sdw_copy_slv_caps(slave, cap); + + for (i = 0; i < SDW_MAX_PORT_DIRECTIONS; i++) { + if (i == SDW_DATA_DIR_OUT) + ports = caps->num_src_ports; + else + ports = caps->num_sink_ports; + + caps->dpn_caps[i] = kzalloc((sizeof(*slv_dpn_cap) * + ports), GFP_KERNEL); + + if (caps->dpn_caps[i] == NULL) { + ret = -ENOMEM; + goto error; + } + } + + for (i = 0; i < SDW_MAX_PORT_DIRECTIONS; i++) { + + if (i == SDW_DATA_DIR_OUT) + ports = caps->num_src_ports; + else + ports = caps->num_sink_ports; + + for (j = 0; j < ports; j++) { + + dpn_cap = &cap->dpn_caps[i][j]; + slv_dpn_cap = &caps->dpn_caps[i][j]; + + ret = sdw_update_dpn_caps(&caps->dpn_caps[i][j], + &cap->dpn_caps[i][j]); + if (ret < 0) { + dev_err(&slave->mstr->dev, "Failed to update Slave caps ret = %d\n", ret); + goto error; + } + } + } + + slave->priv.slave_cap_updated = true; + + return 0; + +error: + sdw_unregister_slv_caps(slave, i); + return ret; +} +EXPORT_SYMBOL_GPL(snd_sdw_slave_register_caps); + +/** + * snd_sdw_master_add: Registers the SoundWire Master interface. This needs + * to be called for each Master interface supported by SoC. This + * represents One clock and data line (Optionally multiple data lanes) + * of Master interface. + * + * @master: the Master to be added. + */ +int snd_sdw_master_add(struct sdw_master *master) +{ + int i, id, ret; + struct sdw_bus *sdw_bus = NULL; + + /* Sanity checks */ + if (unlikely(master->name[0] == '\0')) { + pr_err("sdw-core: Attempt to register a master with no name!\n"); + return -EINVAL; + } + + mutex_lock(&snd_sdw_core.core_mutex); + + /* Always start bus with 0th Index */ + id = idr_alloc(&snd_sdw_core.idr, master, 0, 0, GFP_KERNEL); + + if (id < 0) { + mutex_unlock(&snd_sdw_core.core_mutex); + return id; + } + + master->nr = id; + + /* + * Initialize the DeviceNumber in the Master structure. Each of + * these is assigned to the Slaves enumerating on this Master + * interface. + */ + for (i = 0; i <= SDW_MAX_DEVICES; i++) + master->sdw_addr[i].dev_num = i; + + mutex_init(&master->lock); + mutex_init(&master->msg_lock); + INIT_LIST_HEAD(&master->slv_list); + INIT_LIST_HEAD(&master->mstr_rt_list); + + sdw_bus = kzalloc(sizeof(*sdw_bus), GFP_KERNEL); + if (!sdw_bus) { + ret = -ENOMEM; + goto alloc_failed; + } + + sdw_bus->mstr = master; + master->bus = sdw_bus; + + dev_set_name(&master->dev, "sdw-%d", master->nr); + master->dev.bus = &sdw_bus_type; + master->dev.type = &sdw_mstr_type; + + ret = device_register(&master->dev); + if (ret < 0) + goto dev_reg_failed; + + dev_dbg(&master->dev, "master [%s] registered\n", master->name); + + /* + * Add bus to the list of buses inside core. This is list of Slave + * devices enumerated on this bus. Adding new devices at end. It can + * be added at any location in list. + */ + list_add_tail(&sdw_bus->bus_node, &snd_sdw_core.bus_list); + mutex_unlock(&snd_sdw_core.core_mutex); + + return 0; + +dev_reg_failed: + kfree(sdw_bus); +alloc_failed: + idr_remove(&snd_sdw_core.idr, master->nr); + mutex_unlock(&snd_sdw_core.core_mutex); + return ret; +} +EXPORT_SYMBOL_GPL(snd_sdw_master_add); + +static void sdw_unregister_slv(struct sdw_slave *sdw_slv) +{ + struct sdw_master *mstr; + + mstr = sdw_slave_to_master(sdw_slv); + + sdw_unregister_slv_caps(sdw_slv, SDW_MAX_PORT_DIRECTIONS); + + mutex_lock(&mstr->lock); + list_del(&sdw_slv->priv.node); + mutex_unlock(&mstr->lock); + + mstr->sdw_addr[sdw_slv->dev_num].assigned = false; + + device_unregister(&sdw_slv->dev); + kfree(sdw_slv); +} + +static int __unregister_slv(struct device *dev, void *dummy) +{ + struct sdw_slave *slave = sdw_slv_verify(dev); + + if (slave) + sdw_unregister_slv(slave); + + return 0; +} + +/** + * snd_sdw_master_del - unregister SDW Master + * + * @master: the Master being unregistered + */ +void snd_sdw_master_del(struct sdw_master *master) +{ + struct sdw_master *found; + + /* First make sure that this Master was ever added */ + mutex_lock(&snd_sdw_core.core_mutex); + found = idr_find(&snd_sdw_core.idr, master->nr); + + if (found != master) { + pr_debug("sdw-core: attempting to delete unregistered master [%s]\n", + master->name); + mutex_unlock(&snd_sdw_core.core_mutex); + return; + } + /* + * Detach any active Slaves. This can't fail, thus we do not check + * the returned value. + */ + device_for_each_child(&master->dev, NULL, __unregister_slv); + + /* device name is gone after device_unregister */ + dev_dbg(&master->dev, "master [%s] unregistered\n", master->name); + + /* wait until all references to the device are gone */ + init_completion(&master->slv_released_complete); + device_unregister(&master->dev); + wait_for_completion(&master->slv_released_complete); + + /* free bus id */ + idr_remove(&snd_sdw_core.idr, master->nr); + mutex_unlock(&snd_sdw_core.core_mutex); + + /* + * Clear the device structure in case this Master is ever going to + * be added again + */ + memset(&master->dev, 0, sizeof(master->dev)); +} +EXPORT_SYMBOL_GPL(snd_sdw_master_del); + +/** + * snd_sdw_master_get: Return the Master handle from Master number. + * Increments the reference count of the module. Similar to + * i2c_get_adapter. + * + * @nr: Master number. + * + * Returns Master handle on success, else NULL + */ +struct sdw_master *snd_sdw_master_get(int nr) +{ + struct sdw_master *master; + + mutex_lock(&snd_sdw_core.core_mutex); + + master = idr_find(&snd_sdw_core.idr, nr); + if (master && !try_module_get(master->driver->driver.owner)) + master = NULL; + + mutex_unlock(&snd_sdw_core.core_mutex); + + return master; +} +EXPORT_SYMBOL_GPL(snd_sdw_master_get); + +/** + * snd_sdw_master_put: Reverses the effect of sdw_master_get + * + * @master: Master handle. + */ +void snd_sdw_master_put(struct sdw_master *master) +{ + if (master) + module_put(master->driver->driver.owner); +} +EXPORT_SYMBOL_GPL(snd_sdw_master_put); + +static void sdw_exit(void) +{ + bus_unregister(&sdw_bus_type); +} + +static int sdw_init(void) +{ + int retval; + + mutex_init(&snd_sdw_core.core_mutex); + INIT_LIST_HEAD(&snd_sdw_core.bus_list); + idr_init(&snd_sdw_core.idr); + retval = bus_register(&sdw_bus_type); + + if (retval) + bus_unregister(&sdw_bus_type); + return retval; +} + +subsys_initcall(sdw_init); +module_exit(sdw_exit); + +MODULE_AUTHOR("Hardik Shah <hardik.t.shah@intel.com>"); +MODULE_AUTHOR("Sanyog Kale <sanyog.r.kale@intel.com>"); +MODULE_LICENSE("Dual BSD/GPL"); +MODULE_DESCRIPTION("SoundWire bus driver"); +MODULE_ALIAS("platform:soundwire"); diff --git a/sound/sdw/sdw_priv.h b/sound/sdw/sdw_priv.h new file mode 100644 index 0000000..5911aa6 --- /dev/null +++ b/sound/sdw/sdw_priv.h @@ -0,0 +1,102 @@ +/* + * sdw_priv.h - Private definition for SoundWire bus interface. + * + * Author: Hardik Shah <hardik.t.shah@intel.com> + * + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + * + * This file is provided under a dual BSD/GPLv2 license. When using or + * redistributing this file, you may do so under either license. + * + * GPL LICENSE SUMMARY + * + * Copyright(c) 2016 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * + * BSD LICENSE + * + * Copyright(c) 2016 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + * + */ + +#ifndef _LINUX_SDW_PRIV_H +#define _LINUX_SDW_PRIV_H + +/** + * sdw_driver: Structure to typecast both Master and Slave driver to generic + * SoundWire driver, to find out the driver type. + * + * @driver_type: Type of SoundWire driver, Master or Slave. + * @driver: Generic Linux driver. + */ +struct sdw_driver { + enum sdw_driver_type driver_type; + struct device_driver driver; +}; +#define to_sdw_driver(d) \ + container_of(d, struct sdw_driver, driver) +/** + * sdw_bus: Bus structure holding bus related information. + * + * @bus_node: Node to add the bus in the sdw_core list. + * @mstr: Master reference for the bus. + */ + +struct sdw_bus { + struct list_head bus_node; + struct sdw_master *mstr; +}; + +/** + * snd_sdw_core: Global SoundWire structure. It handles all the streams + * spawned across masters and has list of bus structure per every + * Master registered. + * + * @bus_list: List of all the bus instance. + * @core_mutex: Global lock for all bus instances. + * @idr: For identifying the registered buses. + */ +struct snd_sdw_core { + struct list_head bus_list; + struct mutex core_mutex; + struct idr idr; +}; + +#endif /* _LINUX_SDW_PRIV_H */ -- 1.7.9.5

This API is used by: 1. Bus driver to read/write MIPI defined registers. 2. Slave driver to read/write SoundWire Slave implementation defined registers. Slave driver should use regmap driver to access implementation defined registers, regmap driver uses read/write APIs internally. Signed-off-by: Hardik Shah <hardik.t.shah@intel.com> Signed-off-by: Sanyog Kale <sanyog.r.kale@intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> --- sound/sdw/sdw.c | 188 +++++++++++++++++++++++++++++++++++++++++++++++++- sound/sdw/sdw_priv.h | 144 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 329 insertions(+), 3 deletions(-) diff --git a/sound/sdw/sdw.c b/sound/sdw/sdw.c index d4e79b8a..c98e4d7 100644 --- a/sound/sdw/sdw.c +++ b/sound/sdw/sdw.c @@ -335,9 +335,191 @@ static int sdw_match(struct device *dev, struct device_driver *driver) }; /** - * snd_sdw_master_register_driver: SoundWire Master driver registration with - * bus. This API will register the Master driver with the SoundWire - * bus. It is typically called from the driver's module-init function. + * sdw_transfer: Local function where logic is placed to handle NOPM and PM + * variants of the Slave transfer functions. + * + * @mstr: Handle to SDW Master + * @msg: One or more messages to be transferred + * @num: Number of messages to be transferred. + * + * Returns negative error, else the number of messages transferred. + * + */ +static int sdw_transfer(struct sdw_master *mstr, struct sdw_msg *msg, int num, + struct sdw_deferred_xfer_data *data) +{ + unsigned long orig_jiffies; + int ret, try, i; + int program_scp_addr_page = false; + u8 prev_adr_pg1 = 0; + u8 prev_adr_pg2 = 0; + + for (i = 0; i < num; i++) { + + /* Reset timeout for every message */ + orig_jiffies = jiffies; + + /* Inform Master driver to program SCP addr or not */ + if ((prev_adr_pg1 != msg[i].addr_page1) || + (prev_adr_pg2 != msg[i].addr_page2)) + program_scp_addr_page = true; + + for (ret = 0, try = 0; try <= mstr->retries; try++) { + + /* Call deferred or sync handler based on call */ + if (!data) + ret = mstr->driver->ops->xfer_msg(mstr, + &msg[i], program_scp_addr_page); + + else if (mstr->driver->ops->xfer_msg_deferred) + mstr->driver->ops->xfer_msg_deferred( + mstr, &msg[i], + program_scp_addr_page, + data); + else + return -ENOTSUPP; + if (ret != -EAGAIN) + break; + + if (time_after(jiffies, orig_jiffies + mstr->timeout)) + break; + } + + + /* + * Set previous address page as current once message is + * transferred. + */ + prev_adr_pg1 = msg[i].addr_page1; + prev_adr_pg2 = msg[i].addr_page2; + } + + orig_jiffies = jiffies; + + ret = 0; + + /* Reset page address if its other than 0 */ + if (msg[i].addr_page1 && msg[i].addr_page2) { + for (try = 0; try <= mstr->retries; try++) { + /* + * Reset the page address to 0, so that always there + * is fast path access to MIPI defined Slave + * registers. + */ + + ret = mstr->driver->ops->reset_page_addr( + mstr, msg[0].dev_num); + + if (ret != -EAGAIN) + break; + + if (time_after(jiffies, orig_jiffies + mstr->timeout)) + break; + } + } + + if (!ret) + return i + 1; + + return ret; +} + +/** + * sdw_bank_switch_deferred: Initiate the transfer of the message but + * doesn't wait for the message to be completed. Bus driver waits + * outside context of this API for master driver to signal message + * transfer complete. This is not Public API, this is used by Bus + * driver only for Bank switch. + * + * @mstr: Master which will transfer the message. + * @msg: Message to be transferred. Message length of only 1 is supported. + * @data: Deferred information for the message to be transferred. This is + * filled by Master on message transfer complete. + * + * Returns immediately after initiating the transfer, Bus driver needs to + * wait on xfer_complete, part of data, which is set by Master driver on + * completion of message transfer. + * + */ +void sdw_bank_switch_deferred(struct sdw_master *mstr, struct sdw_msg *msg, + struct sdw_deferred_xfer_data *data) +{ + + pm_runtime_get_sync(&mstr->dev); + + sdw_transfer(mstr, msg, 1, data); + + pm_runtime_mark_last_busy(&mstr->dev); + pm_runtime_put_sync_autosuspend(&mstr->dev); + +} + +/** + * snd_sdw_slave_transfer: Transfer message on bus. + * + * @master: Master which will transfer the message. + * @msg: Array of messages to be transferred. + * @num: Number of messages to be transferred, messages include read and + * write messages, but not the ping commands. The read and write + * messages are transmitted as a part of read and write SoundWire + * commands with a parameter containing the payload. + * + * Returns the number of messages successfully transferred else appropriate + * error code. + */ +int snd_sdw_slave_transfer(struct sdw_master *master, struct sdw_msg *msg, + unsigned int num) +{ + int ret; + + /* + * Master reports the successfully transmitted messages onto the + * bus. If there are N message to be transmitted onto bus, and if + * Master gets error at (N-2) message it will report number of + * message transferred as N-2 Error is reported if ACK is not + * received for all messages or NACK is received for any of the + * transmitted messages. Currently both ACK not getting received + * and NACK is treated as error. But for upper level like regmap, + * both (Absence of ACK or NACK) errors are same as failure. + */ + + /* + * Make sure Master is woken up before message transfer Ideally + * function calling this should have wokenup Master as this will be + * called by Slave driver, and it will do runtime_get for itself, + * which will make sure Master is woken up as Master is parent Linux + * device of Slave. But if Slave is not implementing RTPM, it may + * not do this, so bus driver has to do it always irrespective of + * what Slave does. + */ + pm_runtime_get_sync(&master->dev); + + if (in_atomic() || irqs_disabled()) { + ret = mutex_trylock(&master->msg_lock); + if (!ret) { + ret = -EAGAIN; + goto out; + } + } else { + mutex_lock(&master->msg_lock); + } + + ret = sdw_transfer(master, msg, num, NULL); + + mutex_unlock(&master->msg_lock); +out: + /* Put Master to sleep once message is transferred */ + pm_runtime_mark_last_busy(&master->dev); + pm_runtime_put_sync_autosuspend(&master->dev); + + return ret; +} +EXPORT_SYMBOL_GPL(snd_sdw_slave_transfer); + +/** + * snd_sdw_master_register_driver: This API will register the Master driver + * with the SoundWire bus. It is typically called from the driver's + * module-init function. * * @driver: Master Driver to be associated with Master interface. * @owner: Module owner, generally THIS module. diff --git a/sound/sdw/sdw_priv.h b/sound/sdw/sdw_priv.h index 5911aa6..0af1c99 100644 --- a/sound/sdw/sdw_priv.h +++ b/sound/sdw/sdw_priv.h @@ -99,4 +99,148 @@ struct snd_sdw_core { struct idr idr; }; +/** + * sdw_bank_switch_deferred: Initiate the transfer of the message but + * doesn't wait for the message to be completed. Bus driver waits + * outside context of this API for master driver to signal message + * transfer complete. This is not Public API, this is used by Bus + * driver only for Bank switch. + * + * @mstr: Master which will transfer the message. + * @msg: Message to be transferred. Message length of only 1 is supported. + * @data: Deferred information for the message to be transferred. This is + * filled by Master on message transfer complete. + * + * Returns immediately after initiating the transfer, Bus driver needs to + * wait on xfer_complete, part of data, which is set by Master driver on + * completion of message transfer. + */ +void sdw_bank_switch_deferred(struct sdw_master *mstr, struct sdw_msg *msg, + struct sdw_deferred_xfer_data *data); +/* + * Helper function for bus driver to write messages. Since bus driver + * operates on MIPI defined Slave registers, addr_page1 and addr_page2 is + * set to 0. + */ +static inline int sdw_wr_msg(struct sdw_msg *msg, bool xmit_on_ssp, u16 addr, + u16 len, u8 *buf, u8 dev_num, + struct sdw_master *mstr, + int num_msg) +{ + msg->xmit_on_ssp = xmit_on_ssp; + msg->r_w_flag = SDW_MSG_FLAG_WRITE; + msg->addr = addr; + msg->len = len; + msg->buf = buf; + msg->dev_num = dev_num; + msg->addr_page1 = 0x0; + msg->addr_page2 = 0x0; + + return snd_sdw_slave_transfer(mstr, msg, num_msg); +} + +/* + * Helper function for bus driver to read messages. Since bus driver + * operates on MIPI defined Slave registers, addr_page1 and addr_page2 is + * set to 0. + */ +static inline int sdw_rd_msg(struct sdw_msg *msg, bool xmit_on_ssp, u16 addr, + u16 len, u8 *buf, u8 dev_num, + struct sdw_master *mstr, + int num_msg) +{ + msg->xmit_on_ssp = xmit_on_ssp; + msg->r_w_flag = SDW_MSG_FLAG_READ; + msg->addr = addr; + msg->len = len; + msg->buf = buf; + msg->dev_num = dev_num; + msg->addr_page1 = 0x0; + msg->addr_page2 = 0x0; + + return snd_sdw_slave_transfer(mstr, msg, num_msg); +} + +/* + * Helper function for bus driver to write messages (nopm version). Since + * bus driver operates on MIPI defined Slave registers, addr_page1 and + * addr_page2 is set to 0. + */ +static inline int sdw_wr_msg_nopm(struct sdw_msg *msg, bool xmit_on_ssp, + u16 addr, u16 len, u8 *buf, + u8 dev_num, + struct sdw_master *mstr, + int num_msg) +{ + msg->xmit_on_ssp = xmit_on_ssp; + msg->r_w_flag = SDW_MSG_FLAG_WRITE; + msg->addr = addr; + msg->len = len; + msg->buf = buf; + msg->dev_num = dev_num; + msg->addr_page1 = 0x0; + msg->addr_page2 = 0x0; + + return snd_sdw_slave_transfer(mstr, msg, num_msg); +} + +/* + * Helper function for bus driver to read messages (nopm version). Since + * bus driver operates on MIPI defined Slave registers, addr_page1 and + * addr_page2 is set to 0. + */ +static inline int sdw_rd_msg_nopm(struct sdw_msg *msg, bool xmit_on_ssp, + u16 addr, u16 len, u8 *buf, + u8 dev_num, + struct sdw_master *mstr, + int num_msg) +{ + msg->xmit_on_ssp = xmit_on_ssp; + msg->r_w_flag = SDW_MSG_FLAG_READ; + msg->addr = addr; + msg->len = len; + msg->buf = buf; + msg->dev_num = dev_num; + msg->addr_page1 = 0x0; + msg->addr_page2 = 0x0; + + return snd_sdw_slave_transfer(mstr, msg, num_msg); +} + +/* + * Helper function for bus driver to create read messages. Since bus driver + * operates on MIPI defined Slave registers, addr_page1 and addr_page2 is + * set to 0. + */ +static inline void sdw_create_rd_msg(struct sdw_msg *msg, bool xmit_on_ssp, + u16 addr, u16 len, u8 *buf, u8 dev_num) +{ + msg->xmit_on_ssp = xmit_on_ssp; + msg->r_w_flag = SDW_MSG_FLAG_READ; + msg->addr = addr; + msg->len = len; + msg->buf = buf; + msg->dev_num = dev_num; + msg->addr_page1 = 0x0; + msg->addr_page2 = 0x0; +} + +/* + * Helper function for bus driver to create write messages. Since bus driver + * operates on MIPI defined Slave registers, addr_page1 and addr_page2 is + * set to 0. + */ +static inline void sdw_create_wr_msg(struct sdw_msg *msg, bool xmit_on_ssp, + u16 addr, u16 len, u8 *buf, u8 dev_num) +{ + msg->xmit_on_ssp = xmit_on_ssp; + msg->r_w_flag = SDW_MSG_FLAG_WRITE; + msg->addr = addr; + msg->len = len; + msg->buf = buf; + msg->dev_num = dev_num; + msg->addr_page1 = 0x0; + msg->addr_page2 = 0x0; +} + #endif /* _LINUX_SDW_PRIV_H */ -- 1.7.9.5

Signed-off-by: Hardik Shah <hardik.t.shah@intel.com> Signed-off-by: Sanyog Kale <sanyog.r.kale@intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> --- include/sound/sdw_bus.h | 7 ++ include/trace/events/sdw.h | 209 ++++++++++++++++++++++++++++++++++++++++++++ sound/sdw/sdw.c | 37 ++++++++ 3 files changed, 253 insertions(+) create mode 100644 include/trace/events/sdw.h diff --git a/include/sound/sdw_bus.h b/include/sound/sdw_bus.h index 3ea0c71..ad3586e 100644 --- a/include/sound/sdw_bus.h +++ b/include/sound/sdw_bus.h @@ -894,5 +894,12 @@ int snd_sdw_config_ports(struct sdw_master *mstr, struct sdw_slave *slave, */ int snd_sdw_slave_transfer(struct sdw_master *master, struct sdw_msg *msg, unsigned int num); + +/* Function to enable tracing */ +void sdw_transfer_trace_reg(void); + +/* Function to disable tracing */ +void sdw_transfer_trace_unreg(void); + #endif /* _LINUX_SDW_BUS_H */ diff --git a/include/trace/events/sdw.h b/include/trace/events/sdw.h new file mode 100644 index 0000000..447b86e --- /dev/null +++ b/include/trace/events/sdw.h @@ -0,0 +1,209 @@ +/* + * sdw.h - SDW message transfer tracepoints. + * + * Author: Hardik Shah <hardik.t.shah@intel.com> + * + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + * + * This file is provided under a dual BSD/GPLv2 license. When using or + * redistributing this file, you may do so under either license. + * + * GPL LICENSE SUMMARY + * + * Copyright(c) 2016 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * + * BSD LICENSE + * + * Copyright(c) 2016 Intel Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + * + */ + +#undef TRACE_SYSTEM +#define TRACE_SYSTEM sdw + +#if !defined(_TRACE_SDW_H) || defined(TRACE_HEADER_MULTI_READ) +#define _TRACE_SDW_H + +#include <linux/mod_devicetable.h> +#include <sound/sdw_bus.h> +#include <linux/tracepoint.h> + +/* + * __sdw_transfer() write request + */ +TRACE_EVENT_FN(sdw_write, + TP_PROTO(const struct sdw_master *mstr, + const struct sdw_msg *msg, + int num), + TP_ARGS(mstr, msg, num), + TP_STRUCT__entry( + __field(int, master_nr) + __field(__u16, msg_nr) + __field(__u8, addr_page1) + __field(__u8, addr_page2) + __field(__u16, addr) + __field(__u16, flag) + __field(__u16, len) + __dynamic_array(__u8, buf, msg->len)), + TP_fast_assign( + __entry->master_nr = mstr->nr; + __entry->msg_nr = num; + __entry->addr = msg->addr; + __entry->flag = msg->r_w_flag; + __entry->len = msg->len; + __entry->addr_page1 = msg->addr_page1; + __entry->addr_page2 = msg->addr_page2; + memcpy(__get_dynamic_array(buf), msg->buf, msg->len); + ), + TP_printk("sdw-%d #%u a=%03x addr_page1=%04x addr_page2=%04x f=%04x l=%u [%*phD]", + __entry->master_nr, + __entry->msg_nr, + __entry->addr, + __entry->addr_page1, + __entry->addr_page2, + __entry->flag, + __entry->len, + __entry->len, __get_dynamic_array(buf) + ), + sdw_transfer_trace_reg, + sdw_transfer_trace_unreg); + +/* + * __sdw_transfer() read request + */ +TRACE_EVENT_FN(sdw_read, + TP_PROTO(const struct sdw_master *mstr, const struct sdw_msg *msg, + int num), + TP_ARGS(mstr, msg, num), + TP_STRUCT__entry( + __field(int, master_nr) + __field(__u16, msg_nr) + __field(__u8, addr_page1) + __field(__u8, addr_page2) + __field(__u16, addr) + __field(__u16, flag) + __field(__u16, len) + __dynamic_array(__u8, buf, msg->len)), + TP_fast_assign( + __entry->master_nr = mstr->nr; + __entry->msg_nr = num; + __entry->addr = msg->addr; + __entry->flag = msg->r_w_flag; + __entry->len = msg->len; + __entry->addr_page1 = msg->addr_page1; + __entry->addr_page2 = msg->addr_page2; + memcpy(__get_dynamic_array(buf), msg->buf, msg->len); + ), + TP_printk("sdw-%d #%u a=%03x addr_page1=%04x addr_page2=%04x f=%04x l=%u [%*phD]", + __entry->master_nr, + __entry->msg_nr, + __entry->addr, + __entry->addr_page1, + __entry->addr_page2, + __entry->flag, + __entry->len, + __entry->len, __get_dynamic_array(buf) + ), + sdw_transfer_trace_reg, + sdw_transfer_trace_unreg); + +/* + * __sdw_transfer() read reply + */ +TRACE_EVENT_FN(sdw_reply, + TP_PROTO(const struct sdw_master *mstr, + const struct sdw_msg *msg, + int num), + TP_ARGS(mstr, msg, num), + TP_STRUCT__entry( + __field(int, master_nr) + __field(__u16, msg_nr) + __field(__u16, addr) + __field(__u16, flag) + __field(__u16, len) + __dynamic_array(__u8, buf, msg->len)), + TP_fast_assign( + __entry->master_nr = mstr->nr; + __entry->msg_nr = num; + __entry->addr = msg->addr; + __entry->flag = msg->r_w_flag; + __entry->len = msg->len; + memcpy(__get_dynamic_array(buf), msg->buf, msg->len); + ), + TP_printk("sdw-%d #%u a=%03x f=%04x l=%u [%*phD]", + __entry->master_nr, + __entry->msg_nr, + __entry->addr, + __entry->flag, + __entry->len, + __entry->len, __get_dynamic_array(buf) + ), + sdw_transfer_trace_reg, + sdw_transfer_trace_unreg); + +/* + * __sdw_transfer() result + */ +TRACE_EVENT_FN(sdw_result, + TP_PROTO(const struct sdw_master *mstr, int num, int ret), + TP_ARGS(mstr, num, ret), + TP_STRUCT__entry( + __field(int, master_nr) + __field(__u16, nr_msgs) + __field(__s16, ret) + ), + TP_fast_assign( + __entry->master_nr = mstr->nr; + __entry->nr_msgs = num; + __entry->ret = ret; + ), + TP_printk("sdw-%d n=%u ret=%d", + __entry->master_nr, + __entry->nr_msgs, + __entry->ret + ), + sdw_transfer_trace_reg, + sdw_transfer_trace_unreg); + +#endif /* _TRACE_SDW_H */ + +/* This part must be outside protection */ +#include <trace/define_trace.h> diff --git a/sound/sdw/sdw.c b/sound/sdw/sdw.c index 449060e..71d2550 100644 --- a/sound/sdw/sdw.c +++ b/sound/sdw/sdw.c @@ -70,6 +70,8 @@ #include "sdw_priv.h" +#define CREATE_TRACE_POINTS +#include <trace/events/sdw.h> /* * Global SoundWire core instance contains list of Masters registered, core * lock and SoundWire stream tags. @@ -335,6 +337,17 @@ static int sdw_match(struct device *dev, struct device_driver *driver) .match = sdw_match, .pm = &soundwire_pm, }; +static struct static_key sdw_trace_msg = STATIC_KEY_INIT_FALSE; + +void sdw_transfer_trace_reg(void) +{ + static_key_slow_inc(&sdw_trace_msg); +} + +void sdw_transfer_trace_unreg(void) +{ + static_key_slow_dec(&sdw_trace_msg); +} static int sdw_find_free_dev_num(struct sdw_master *mstr, struct sdw_msg *msg) @@ -601,6 +614,21 @@ static int sdw_transfer(struct sdw_master *mstr, struct sdw_msg *msg, int num, u8 prev_adr_pg1 = 0; u8 prev_adr_pg2 = 0; + /* + * sdw_trace_msg gets enabled when trace point sdw_slave_transfer gets + * enabled. This is an efficient way of keeping the for-loop from + * being executed when not needed. + */ + if (static_key_false(&sdw_trace_msg)) { + int j; + + for (j = 0; j < num; j++) + if (msg[j].r_w_flag & SDW_MSG_FLAG_READ) + trace_sdw_read(mstr, &msg[j], j); + else + trace_sdw_write(mstr, &msg[j], j); + } + for (i = 0; i < num; i++) { /* Reset timeout for every message */ @@ -665,6 +693,15 @@ static int sdw_transfer(struct sdw_master *mstr, struct sdw_msg *msg, int num, } } + if (static_key_false(&sdw_trace_msg)) { + int j; + + for (j = 0; j < msg->len; j++) + if (msg[j].r_w_flag & SDW_MSG_FLAG_READ) + trace_sdw_reply(mstr, &msg[j], j); + trace_sdw_result(mstr, j, ret); + } + if (!ret) return i + 1; -- 1.7.9.5

From: Sanyog Kale <sanyog.r.kale@intel.com> This patch adds APIs for stream and port configurations for SoundWire bus driver. Signed-off-by: Hardik Shah <hardik.t.shah@intel.com> Signed-off-by: Sanyog Kale <sanyog.r.kale@intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> --- sound/sdw/sdw.c | 774 ++++++++++++++++++++++++++++++++++++++++++++++++++ sound/sdw/sdw_priv.h | 449 +++++++++++++++++++++++++++++ 2 files changed, 1223 insertions(+) diff --git a/sound/sdw/sdw.c b/sound/sdw/sdw.c index 71d2550..ffbec9e 100644 --- a/sound/sdw/sdw.c +++ b/sound/sdw/sdw.c @@ -2358,6 +2358,780 @@ static enum sdw_clk_stop_mode sdw_slv_get_clk_stp_mode(struct sdw_slave *slave) } /** + * snd_sdw_release_stream_tag: Free the already assigned stream tag. + * Reverses effect of "sdw_alloc_stream_tag" + * + * @stream_tag: Stream tag to be freed. + */ +void snd_sdw_release_stream_tag(unsigned int stream_tag) +{ + int i; + struct sdw_stream_tag *stream_tags = snd_sdw_core.stream_tags; + + /* Acquire core lock */ + mutex_lock(&snd_sdw_core.core_mutex); + + /* Get stream tag data structure */ + for (i = 0; i < SDW_NUM_STREAM_TAGS; i++) { + if (stream_tag == stream_tags[i].stream_tag) { + + /* Reference count update */ + sdw_dec_ref_count(&stream_tags[i].ref_count); + + if (stream_tags[i].ref_count == 0) + /* Free up resources */ + kfree(stream_tags[i].sdw_rt); + } + } + + /* Release core lock */ + mutex_unlock(&snd_sdw_core.core_mutex); +} +EXPORT_SYMBOL_GPL(snd_sdw_release_stream_tag); + +/** + * snd_sdw_alloc_stream_tag: Allocates unique stream_tag. Stream tag is + * a unique identifier for each SoundWire stream across all SoundWire + * bus instances. Stream tag is a software concept defined by bus + * driver for stream management and not by MIPI SoundWire Spec. Each + * SoundWire Stream is individually configured and controlled using the + * stream tag. Multiple Master(s) and Slave(s) associated with the + * stream, uses stream tag as an identifier. All the operations on the + * stream e.g. stream configuration, port configuration, prepare and + * enable of the ports are done based on stream tag. This API shall be + * called once per SoundWire stream either by the Master or Slave + * associated with the stream. + * + * @stream_tag: Stream tag returned by bus driver. + */ +int snd_sdw_alloc_stream_tag(unsigned int *stream_tag) +{ + int i; + int ret = -EINVAL; + struct sdw_runtime *sdw_rt; + struct sdw_stream_tag *stream_tags = snd_sdw_core.stream_tags; + + /* Acquire core lock */ + mutex_lock(&snd_sdw_core.core_mutex); + + /* Allocate new stream tag and initialize resources */ + for (i = 0; i < SDW_NUM_STREAM_TAGS; i++) { + if (!stream_tags[i].ref_count) { + + *stream_tag = stream_tags[i].stream_tag; + + /* Initialize stream lock */ + mutex_init(&stream_tags[i].stream_lock); + + /* Allocate resources for stream runtime handle */ + sdw_rt = kzalloc(sizeof(*sdw_rt), GFP_KERNEL); + if (!sdw_rt) { + ret = -ENOMEM; + goto out; + } + + /* Reference count update */ + sdw_inc_ref_count(&stream_tags[i].ref_count); + + /* Initialize Master and Slave list */ + INIT_LIST_HEAD(&sdw_rt->slv_rt_list); + INIT_LIST_HEAD(&sdw_rt->mstr_rt_list); + + /* Change stream state to ALLOC */ + sdw_rt->stream_state = SDW_STATE_STRM_ALLOC; + + stream_tags[i].sdw_rt = sdw_rt; + + ret = 0; + break; + } + } +out: + /* Release core lock */ + mutex_unlock(&snd_sdw_core.core_mutex); + return ret; +} +EXPORT_SYMBOL_GPL(snd_sdw_alloc_stream_tag); + +/** + * sdw_config_mstr_stream: Checks if master runtime handle already + * available, if not allocates and initialize Master runtime handle. + * + * @mstr: Master handle + * @stream_config: Stream configuration for the SoundWire audio stream. + * @sdw_rt: Stream runtime handle. + * + * Returns Master runtime handle. + */ +static struct sdw_mstr_runtime *sdw_config_mstr_stream(struct sdw_master *mstr, + struct sdw_stream_config *stream_config, + struct sdw_runtime *sdw_rt) +{ + struct sdw_mstr_runtime *mstr_rt = NULL; + struct sdw_stream_params *str_p; + + /* Retrieve Master handle if already available */ + list_for_each_entry(mstr_rt, &sdw_rt->mstr_rt_list, mstr_strm_node) { + if (mstr_rt->mstr == mstr) + return mstr_rt; + } + + /* Allocate resources for Master runtime handle */ + mstr_rt = kzalloc(sizeof(*mstr_rt), GFP_KERNEL); + if (!mstr_rt) + goto out; + + /* Initialization of Master runtime handle */ + INIT_LIST_HEAD(&mstr_rt->port_rt_list); + INIT_LIST_HEAD(&mstr_rt->slv_rt_list); + list_add_tail(&mstr_rt->mstr_strm_node, &sdw_rt->mstr_rt_list); + list_add_tail(&mstr_rt->mstr_node, &mstr->mstr_rt_list); + + /* Update PCM parameters for Master */ + mstr_rt->direction = stream_config->direction; + str_p = &mstr_rt->stream_params; + str_p->rate = stream_config->frame_rate; + str_p->channel_count = stream_config->channel_count; + str_p->bps = stream_config->bps; + + /* Add reference for Master device handle */ + mstr_rt->mstr = mstr; + + /* Add reference for stream runtime handle */ + mstr_rt->sdw_rt = sdw_rt; + +out: + return mstr_rt; +} + +/** + * sdw_config_slave_stream: Allocate and initialize slave runtime handle. + * + * @slave: Slave handle + * @stream_config: Stream configuration for the SoundWire audio stream. + * @sdw_rt: Stream runtime handle. + * + * Returns Slave runtime handle. + */ +static struct sdw_slv_runtime *sdw_config_slv_stream( + struct sdw_slave *slave, + struct sdw_stream_config *stream_config, + struct sdw_runtime *sdw_rt) +{ + struct sdw_slv_runtime *slv_rt = NULL; + struct sdw_stream_params *str_p; + + /* Allocate resources for Slave runtime handle */ + slv_rt = kzalloc(sizeof(*slv_rt), GFP_KERNEL); + if (!slv_rt) + goto out; + + /* Initialization of Slave runtime handle */ + INIT_LIST_HEAD(&slv_rt->port_rt_list); + + /* Update PCM parameters for Slave */ + slv_rt->direction = stream_config->direction; + str_p = &slv_rt->stream_params; + str_p->rate = stream_config->frame_rate; + str_p->channel_count = stream_config->channel_count; + str_p->bps = stream_config->bps; + + /* Add reference for Slave device handle */ + slv_rt->slv = slave; + + /* Add reference for stream runtime handle */ + slv_rt->sdw_rt = sdw_rt; + +out: + return slv_rt; +} + +/** + * sdw_release_mstr_stream: Removes entry from master runtime list and free + * up resources. + * + * @mstr: Master handle. + * @sdw_rt: Master runtime handle. + */ +static void sdw_release_mstr_stream(struct sdw_master *mstr, + struct sdw_runtime *sdw_rt) +{ + struct sdw_mstr_runtime *mstr_rt, *__mstr_rt; + + /* Retrieve Master runtime handle */ + list_for_each_entry_safe(mstr_rt, __mstr_rt, &sdw_rt->mstr_rt_list, + mstr_strm_node) { + + if (mstr_rt->mstr == mstr) { + + if (mstr_rt->direction == SDW_DATA_DIR_OUT) + /* Reference count update */ + sdw_dec_ref_count(&sdw_rt->tx_ref_count); + else + /* Reference count update */ + sdw_dec_ref_count(&sdw_rt->rx_ref_count); + + /* Remove node from the list */ + list_del(&mstr_rt->mstr_strm_node); + list_del(&mstr_rt->mstr_node); + + pm_runtime_mark_last_busy(&mstr->dev); + pm_runtime_put_sync_autosuspend(&mstr->dev); + + /* Free up Master runtime handle resources */ + kfree(mstr_rt); + } + } +} + +/** + * sdw_release_slv_stream: Removes entry from slave runtime list and free up + * resources. + * + * @slave: Slave handle. + * @sdw_rt: Stream runtime handle. + */ +static void sdw_release_slv_stream(struct sdw_slave *slave, + struct sdw_runtime *sdw_rt) +{ + struct sdw_slv_runtime *slv_rt, *__slv_rt; + + /* Retrieve Slave runtime handle */ + list_for_each_entry_safe(slv_rt, __slv_rt, &sdw_rt->slv_rt_list, + slave_strm_node) { + + if (slv_rt->slv == slave) { + + if (slv_rt->direction == SDW_DATA_DIR_OUT) + /* Reference count update */ + sdw_dec_ref_count(&sdw_rt->tx_ref_count); + else + /* Reference count update */ + sdw_dec_ref_count(&sdw_rt->rx_ref_count); + + /* Remove node from the list */ + list_del(&slv_rt->slave_strm_node); + + pm_runtime_mark_last_busy(&slave->dev); + pm_runtime_put_sync_autosuspend(&slave->dev); + + /* Free up Slave runtime handle resources */ + kfree(slv_rt); + } + } +} + +/** + * snd_sdw_release_stream: De-associates Master(s) and Slave(s) from stream. + * Reverse effect of the sdw_config_stream. Master calls this with + * Slave handle as NULL, Slave calls this with Master handle as NULL. + * + * @mstr: Master handle, + * @slave: SoundWire Slave handle, Null if stream configuration is called by + * Master driver. + * + * @stream_tag: Stream_tag representing the audio stream. All Masters and + * Slaves part of the same stream has same stream tag. So Bus driver + * holds information of all Masters and Slaves associated with stream + * tag. + */ +int snd_sdw_release_stream(struct sdw_master *mstr, + struct sdw_slave *slave, + unsigned int stream_tag) +{ + int i; + struct sdw_runtime *sdw_rt = NULL; + struct sdw_stream_tag *stream_tags = snd_sdw_core.stream_tags; + + /* Retrieve master handle if called by Slave */ + if (!mstr) + mstr = slave->mstr; + + /* Retrieve stream runtime handle */ + for (i = 0; i < SDW_NUM_STREAM_TAGS; i++) { + if (stream_tags[i].stream_tag == stream_tag) { + sdw_rt = stream_tags[i].sdw_rt; + break; + } + } + + if (!sdw_rt) { + dev_err(&mstr->dev, "Invalid stream tag\n"); + return -EINVAL; + } + + /* Call release API of Master/Slave */ + if (!slave) + sdw_release_mstr_stream(mstr, sdw_rt); + else + sdw_release_slv_stream(slave, sdw_rt); + + return 0; +} +EXPORT_SYMBOL_GPL(snd_sdw_release_stream); + +/** + * snd_sdw_config_stream: Configures the SoundWire stream. All the Master(s) + * and Slave(s) associated with the stream calls this API with + * "sdw_stream_config". This API configures SoundWire stream based on + * "sdw_stream_config" provided by each Master(s) and Slave(s) + * associated with the stream. Master calls this function with Slave + * handle as NULL, Slave calls this with Master handle as NULL. + * + * @mstr: Master handle. + * @slave: SoundWire Slave handle, Null if stream configuration is called by + * Master driver. + * + * @stream_config: Stream configuration for the SoundWire audio stream. + * @stream_tag: Stream_tag representing the audio stream. All Masters and + * Slaves part of the same stream has same stream tag. So Bus driver + * holds information of all Masters and Slaves associated with stream + * tag. + */ +int snd_sdw_config_stream(struct sdw_master *mstr, + struct sdw_slave *slave, + struct sdw_stream_config *stream_config, + unsigned int stream_tag) +{ + int i; + int ret = 0; + struct sdw_runtime *sdw_rt = NULL; + struct sdw_mstr_runtime *mstr_rt = NULL; + struct sdw_slv_runtime *slv_rt = NULL; + struct sdw_stream_tag *stream_tags = snd_sdw_core.stream_tags; + struct sdw_stream_tag *stream = NULL; + + /* Retrieve master handle if called by Slave */ + if (!mstr) + mstr = slave->mstr; + + /* Retrieve stream runtime handle */ + for (i = 0; i < SDW_NUM_STREAM_TAGS; i++) { + if (stream_tags[i].stream_tag == stream_tag) { + sdw_rt = stream_tags[i].sdw_rt; + stream = &stream_tags[i]; + break; + } + } + + if (!sdw_rt) { + dev_err(&mstr->dev, "Valid stream tag not found\n"); + ret = -EINVAL; + goto out; + } + + /* Acquire stream lock */ + mutex_lock(&stream->stream_lock); + + /* Get and Initialize Master runtime handle */ + mstr_rt = sdw_config_mstr_stream(mstr, stream_config, sdw_rt); + if (!mstr_rt) { + dev_err(&mstr->dev, "Master runtime configuration failed\n"); + ret = -EINVAL; + goto error; + } + + /* Initialize Slave runtime handle */ + if (slave) { + slv_rt = sdw_config_slv_stream(slave, stream_config, sdw_rt); + if (!slv_rt) { + dev_err(&mstr->dev, "Slave runtime configuration failed\n"); + ret = -EINVAL; + goto error; + } + } + + /* + * Stream params will be stored based on Tx only, since there can be + * only one Tx and multiple Rx, There can be multiple Tx if there is + * aggregation on Tx. That is handled by adding the channels to + * stream_params for each aggregated Tx slaves + */ + if (!sdw_rt->tx_ref_count && stream_config->direction == + SDW_DATA_DIR_OUT) { + sdw_rt->stream_params.rate = stream_config->frame_rate; + sdw_rt->stream_params.channel_count = + stream_config->channel_count; + sdw_rt->stream_params.bps = stream_config->bps; + /* Reference count update */ + sdw_inc_ref_count(&sdw_rt->tx_ref_count); + } + + /* + * Normally there will be only one Tx in system, multiple Tx can + * only be there if we support aggregation. In that case there may + * be multiple slave or masters handing different channels of same + * Tx stream. + */ + else if (sdw_rt->tx_ref_count && stream_config->direction == + SDW_DATA_DIR_OUT) { + if (sdw_rt->stream_params.rate != + stream_config->frame_rate) { + dev_err(&mstr->dev, "Frame rate for aggregated devices not matching\n"); + ret = -EINVAL; + goto error; + } + + if (sdw_rt->stream_params.bps != stream_config->bps) { + dev_err(&mstr->dev, "bps for aggregated devices not matching\n"); + ret = -EINVAL; + goto error; + } + + /* + * Number of channels gets added, since both devices will be + * supporting different channels. Like one Codec supporting + * L and other supporting R channel. + */ + sdw_rt->stream_params.channel_count += + stream_config->channel_count; + + /* Reference count update */ + sdw_inc_ref_count(&sdw_rt->tx_ref_count); + } else + /* Reference count update */ + sdw_inc_ref_count(&sdw_rt->rx_ref_count); + + sdw_rt->type = stream_config->type; + + /* Change stream state to CONFIG */ + sdw_rt->stream_state = SDW_STATE_STRM_CONFIG; + + /* + * Slaves are added to two list, This is because bandwidth is + * calculated for two masters individually, while Ports are enabled + * of all the aggregated masters and slaves part of the same stream + * tag simultaneously. + */ + if (slave) { + list_add_tail(&slv_rt->slave_strm_node, &sdw_rt->slv_rt_list); + list_add_tail(&slv_rt->slave_mstr_node, &mstr_rt->slv_rt_list); + } + + /* Release stream lock */ + mutex_unlock(&stream->stream_lock); + + if (slave) + pm_runtime_get_sync(&slave->dev); + else + pm_runtime_get_sync(&mstr->dev); + + return ret; + +error: + mutex_unlock(&stream->stream_lock); + kfree(mstr_rt); + kfree(slv_rt); +out: + return ret; + +} +EXPORT_SYMBOL_GPL(snd_sdw_config_stream); + +/** + * sdw_check_dpn_caps: Check Master and Slave port capabilities. This performs + * PCM parameter check based on PCM + * parameters received in stream. + * @dpn_cap: Capabilities of Master or Slave port. + * @strm_params: Stream PCM parameters. + */ +static int sdw_check_dpn_caps(struct sdw_dpn_caps *dpn_cap, + struct sdw_stream_params *strm_prms) +{ + struct sdw_port_aud_mode_prop *mode_prop = + dpn_cap->mode_properties; + int i, value; + + /* Check for sampling frequency */ + if (mode_prop->num_sample_rate_cfgs) { + for (i = 0; i < mode_prop->num_sample_rate_cfgs; i++) { + value = mode_prop->sample_rate_buf[i]; + if (strm_prms->rate == value) + break; + } + + if (i == mode_prop->num_sample_rate_cfgs) + return -EINVAL; + } else { + + if ((strm_prms->rate < mode_prop->min_sample_rate) + || (strm_prms->rate > + mode_prop->max_sample_rate)) { + return -EINVAL; + } + } + + /* Check for bit rate */ + if (dpn_cap->num_bps) { + for (i = 0; i < dpn_cap->num_bps; i++) { + value = dpn_cap->bps_buf[i]; + if (strm_prms->bps == value) + break; + } + + if (i == dpn_cap->num_bps) + return -EINVAL; + + } else { + + if ((strm_prms->bps < dpn_cap->min_bps) + || (strm_prms->bps > dpn_cap->max_bps)) + return -EINVAL; + } + + /* Check for number of channels */ + if (dpn_cap->num_ch_cnt) { + for (i = 0; i < dpn_cap->num_ch_cnt; i++) { + value = dpn_cap->ch_cnt_buf[i]; + if (strm_prms->bps == value) + break; + } + + if (i == dpn_cap->num_ch_cnt) + return -EINVAL; + + } else { + + if ((strm_prms->channel_count < dpn_cap->min_ch_cnt) || + (strm_prms->channel_count > dpn_cap->max_ch_cnt)) + return -EINVAL; + + } + + return 0; +} + +/** + * sdw_mstr_port_configuration: Master Port configuration. This performs + * all the port related configuration including allocation port + * structure memory, assign PCM parameters and add port node in master + * runtime list. + * + * @mstr: Master handle. + * @sdw_rt: Stream runtime information. + * @ports_config: Port configuration for Slave. + */ +static int sdw_mstr_port_configuration(struct sdw_master *mstr, + struct sdw_runtime *sdw_rt, + struct sdw_ports_config *ports_config) +{ + struct sdw_mstr_runtime *mstr_rt = NULL; + struct sdw_port_runtime *port_rt; + int found = 0; + int i; + int ret = 0, pn = 0; + struct sdw_dpn_caps *dpn_cap = mstr->caps.sdw_dpn_caps; + + /* Get Master device handle */ + list_for_each_entry(mstr_rt, &sdw_rt->mstr_rt_list, mstr_strm_node) { + if (mstr_rt->mstr == mstr) { + found = 1; + break; + } + } + + if (!found) { + dev_err(&mstr->dev, "Master not found for this port\n"); + return -EINVAL; + } + + /* Allocate resources for port runtime handle */ + port_rt = kzalloc((sizeof(*port_rt) * ports_config->num_ports), + GFP_KERNEL); + if (!port_rt) + return -ENOMEM; + + /* Check master capabilities */ + if (!dpn_cap) + return -EINVAL; + + /* Iterate for number of ports to perform initialization */ + for (i = 0; i < ports_config->num_ports; i++) { + port_rt[i].channel_mask = ports_config->port_config[i].ch_mask; + port_rt[i].port_num = pn = ports_config->port_config[i].num; + + /* Perform capability check for master port */ + ret = sdw_check_dpn_caps(&dpn_cap[pn], &mstr_rt->stream_params); + if (ret < 0) { + dev_err(&mstr->dev, "Master capabilities check failed ret = %d\n", ret); + goto error; + } + + /* Add node to port runtime list */ + list_add_tail(&port_rt[i].port_node, &mstr_rt->port_rt_list); + } + + return ret; + +error: + kfree(port_rt); + return ret; +} + +struct sdw_dpn_caps *sdw_get_slv_dpn_cap(struct sdw_slave_caps *slv_cap, + enum sdw_data_direction direction, + unsigned int port_num) +{ + int i; + struct sdw_dpn_caps *dpn_cap; + u8 num_ports; + bool port_found = 0; + + if (direction == SDW_DATA_DIR_OUT) + num_ports = slv_cap->num_src_ports; + else + num_ports = slv_cap->num_sink_ports; + + for (i = 0; i < num_ports; i++) { + dpn_cap = &slv_cap->dpn_caps[direction][i]; + + if (dpn_cap->port_number == port_num) { + port_found = 1; + break; + } + } + + if (!port_found) + return NULL; + + return dpn_cap; + +} + +/** + * sdw_config_slv_port: Slave Port configuration. This performs + * all the port related configuration including allocation port + * structure memory, assign PCM parameters and add port node in slave + * runtime list. + * @slave: Slave handle. + * @sdw_rt: Stream runtime information. + * @ports_config: Port configuration for Slave. + */ +static int sdw_config_slv_port(struct sdw_slave *slave, + struct sdw_runtime *sdw_rt, + struct sdw_ports_config *ports_config) +{ + struct sdw_slv_runtime *slv_rt; + struct sdw_port_runtime *port_rt; + struct sdw_dpn_caps *dpn_cap; + int found = 0, ret = 0; + int i, pn; + + /* Get Slave device handle */ + list_for_each_entry(slv_rt, &sdw_rt->slv_rt_list, slave_strm_node) { + if (slv_rt->slv == slave) { + found = 1; + break; + } + } + + if (!found) { + dev_err(&slave->mstr->dev, "Slave not found for this port\n"); + return -EINVAL; + } + + /* Check whether slave capabilities are valid or invalid */ + if (!slave->priv.slave_cap_updated) { + dev_err(&slave->mstr->dev, "Slave capabilities not updated\n"); + return -EINVAL; + } + + /* Allocate resources for port runtime handle */ + port_rt = kzalloc((sizeof(*port_rt) * ports_config->num_ports), + GFP_KERNEL); + if (!port_rt) + return -ENOMEM; + + /* Assign PCM parameters */ + for (i = 0; i < ports_config->num_ports; i++) { + port_rt[i].channel_mask = ports_config->port_config[i].ch_mask; + port_rt[i].port_num = pn = + ports_config->port_config[i].num; + + dpn_cap = sdw_get_slv_dpn_cap(&slave->priv.caps, + slv_rt->direction, + ports_config->port_config[i].num); + if (!dpn_cap) { + ret = -EINVAL; + dev_err(&slave->mstr->dev, "Slave port capabilities not found ret = %d\n", ret); + goto error; + } + + /* Perform capability check for slave port */ + ret = sdw_check_dpn_caps(dpn_cap, &slv_rt->stream_params); + if (ret < 0) { + dev_err(&slave->mstr->dev, "Slave capabilities check failed ret = %d\n", ret); + goto error; + } + + /* Add node to port runtime list */ + list_add_tail(&port_rt[i].port_node, &slv_rt->port_rt_list); + } + + return ret; + +error: + kfree(port_rt); + return ret; +} + +/** + * snd_sdw_config_ports: Configures Master or Slave Port(s) associated with + * the stream. All the Master(s) and Slave(s) associated with the + * stream calls this API with "sdw_ports_config". Master calls this + * function with Slave handle as NULL, Slave calls this with Master + * handle as NULL. + * + * @mstr: Master handle where the Slave is connected. + * @slave: Slave handle. + * @ports_config: Port configuration for each Port of SoundWire Slave. + * @stream_tag: Stream tag, where this Port is connected. + */ +int snd_sdw_config_ports(struct sdw_master *mstr, struct sdw_slave *slave, + struct sdw_ports_config *ports_config, + unsigned int stream_tag) +{ + int ret; + int i; + struct sdw_stream_tag *stream_tags = snd_sdw_core.stream_tags; + struct sdw_runtime *sdw_rt = NULL; + struct sdw_stream_tag *stream = NULL; + + /* Retrieve master handle if called by Slave */ + if (!mstr) + mstr = slave->mstr; + + /* Retrieve stream runtime handle */ + for (i = 0; i < SDW_NUM_STREAM_TAGS; i++) { + if (stream_tags[i].stream_tag == stream_tag) { + sdw_rt = stream_tags[i].sdw_rt; + stream = &stream_tags[i]; + break; + } + } + + if (!sdw_rt) { + dev_err(&mstr->dev, "Invalid stream tag\n"); + return -EINVAL; + } + + /* Acquire stream lock */ + mutex_lock(&stream->stream_lock); + + /* Perform Master/Slave port configuration */ + if (!slave) + ret = sdw_mstr_port_configuration(mstr, sdw_rt, ports_config); + else + ret = sdw_config_slv_port(slave, sdw_rt, ports_config); + + /* Release stream lock */ + mutex_unlock(&stream->stream_lock); + + return ret; +} +EXPORT_SYMBOL_GPL(snd_sdw_config_ports); + +/** * snd_sdw_master_stop_clock: Stop the clock. This function broadcasts the * SCP_CTRL register with clock_stop_now bit set. * diff --git a/sound/sdw/sdw_priv.h b/sound/sdw/sdw_priv.h index bbba27a..fc738b8 100644 --- a/sound/sdw/sdw_priv.h +++ b/sound/sdw/sdw_priv.h @@ -68,6 +68,31 @@ #define SDW_NUM_OF_MSG3_XFRD 3 #define SDW_NUM_OF_MSG4_XFRD 4 +/** + * Below values are not defined in MIPI standard. Completely arbitrary + * values that can be changed at will. + */ +#define SDW_MAX_STREAM_TAG_KEY_SIZE 80 +#define SDW_NUM_STREAM_TAGS 100 /* Max number of stream tags */ +#define SDW_DOUBLE_RATE_FACTOR 2 /* Double rate */ + +/* TODO: Description to be provided for SDW_FREQ_MOD_FACTOR */ +#define SDW_FREQ_MOD_FACTOR 3000 + +/** + * SDW_STRM_RATE_GROUPING is place holder number used to hold the frame rate + * used in grouping stream for efficiently calculating bandwidth. All the + * streams with same frame rates belong to same group. This number is + * dynamically increased if the group count number increases above 12. + */ +#define SDW_STRM_RATE_GROUPING 12 + +/* Size of buffer in bytes. */ +#define SDW_BUF_SIZE1 1 +#define SDW_BUF_SIZE2 2 +#define SDW_BUF_SIZE3 3 +#define SDW_BUF_SIZE4 4 + /* Maximum number of Data Ports. */ #define SDW_MAX_DATA_PORTS 15 @@ -80,6 +105,8 @@ */ #define SDW_INTR_STAT_READ_MAX_TRIES 10 +extern struct snd_sdw_core snd_sdw_core; + /** * sdw_driver: Structure to typecast both Master and Slave driver to generic * SoundWire driver, to find out the driver type. @@ -95,6 +122,278 @@ struct sdw_driver { container_of(d, struct sdw_driver, driver) /** + * sdw_stream_state: Stream state maintained by bus driver for performing + * stream operations. + * + * @SDW_STATE_STRM_ALLOC: New stream is allocated. + * @SDW_STATE_STRM_CONFIG: Stream is configured. PCM/PDM parameters of the + * Stream is updated to bus driver. + * + * @SDW_STATE_STRM_PREPARE: Stream is Prepared. All the ports of Master and + * Slave associated with this stream is prepared for enabling. + * + * @SDW_STATE_STRM_ENABLE: Stream is enabled. All the ports of Master and + * Slave associated with this stream are enable and now stream is + * active. + * + * @SDW_STATE_STRM_DISABLE: Stream in disabled state, All the ports of + * Master and Slave associated with the stream are disabled, and stream + * is not active on bus. + * + * @SDW_STATE_STRM_DEPREPARE: Stream in de-prepare state. All the ports of + * Master and Slave associated with the stream are de-prepared. + * + * @SDW_STATE_STRM_RELEASE: Stream in release state. Stream is not having + * any PCM/PDM configuration. There is not Free state for stream, since + * memory for the stream gets freed, and there is no way to update + * stream as free. + */ +enum sdw_stream_state { + SDW_STATE_STRM_ALLOC = 0, + SDW_STATE_STRM_CONFIG = 1, + SDW_STATE_STRM_PREPARE = 2, + SDW_STATE_STRM_ENABLE = 3, + SDW_STATE_STRM_DISABLE = 4, + SDW_STATE_STRM_DEPREPARE = 5, + SDW_STATE_STRM_RELEASE = 6, +}; + +/** + * sdw_update_bus_ops: Operations performed by bus driver for stream state + * transitions. Some of the operations are performed on individual + * streams, while some are global operations affecting all the streams + * on the bus. + * + * @SDW_BUS_PORT_PRE: Perform all the operations which is to be done before + * initiating the bank switch for stream getting enabled. Master and + * Slave driver may need to perform some operations before bank switch. + * Call Master and Slave handlers to accomplish device specific + * operations before initiating bank switch. + * + * @SDW_BUS_BANK_SWITCH: Initiate the bank switch operation by broadcasting + * SCP_FrameCtrl register. Depending upon the Master implementation + * broadcast will be finished as a part of this state, or Master may + * set some register as a part of PORT_POST below operation after which + * broadcast will be finished. Initiation of the broadcast message is + * done as part of this operation. Broadcast message gets transmitted + * on the bus during this or next operation is Master dependent. + * + * @SDW_BUS_PORT_POST: Perform all the operations which are do be done after + * initiating the Bank switch. Call Master and Slave handlers to + * perform Post bank switch operation. + * + * @SDW_BUS_BANK_SWITCH_WAIT: Bus driver waits here for the Bank switch to + * be completed. This is used for Master(s) running in aggregation mode + * where pre and post operations are performed before and after Bank + * switch operation. The Bank switch message broadcast will happen only + * when clock is enabled which is done as part of post Bank switch + * operation. After post Bank switch operation, bus driver waits for + * response of Bank switch. The bus driver provides SDW_BUS_PORT_PRE + * and SDW_BUS_PORT_POST for Bank switch operation which are as per + * Master implementation. + * + * @SDW_BUS_PORT_DIS_CHN: Disable all the ports of the alternate bank + * (unused bank) after the bank switch. Once Bank switch operation is + * successful, the running stream(s) enabled port channels on previous + * bank needs to be disabled for both Master(s) and Slave(s). + */ +enum sdw_update_bus_ops { + SDW_BUS_PORT_PRE, + SDW_BUS_BANK_SWITCH, + SDW_BUS_PORT_POST, + SDW_BUS_BANK_SWITCH_WAIT, + SDW_BUS_PORT_DIS_CHN, +}; + +/** + * sdw_stream_tag: Stream tag represents the unique SoundWire Audio stream. + * All the ports of the Master(s) and Slave(s) part of the same stream + * tags gets enabled/disabled as a part of single bank Switch.If + * samples of the stream are split between the Master(s), its Master + * responsibility of synchronizing the bank switch of two individual + * Masters. + * + * @stream_tag: Unique stream tag number. + * @stream_lock: Lock for stream. + * @ref_count: Number of times stream tag is allocated. Stream tag is is + * available for allocation if reference count is 0. + * + * @sdw_rt: Holds the stream runtime information. + */ +struct sdw_stream_tag { + int stream_tag; + struct mutex stream_lock; + int ref_count; + struct sdw_runtime *sdw_rt; +}; + +/** + * sdw_stream_params: Stream parameters. + * + * @rate: Sampling frequency + * @channel_count: Number of channels. + * @bps: bits per sample. + */ +struct sdw_stream_params { + unsigned int rate; + unsigned int channel_count; + unsigned int bps; +}; + +/** + * sdw_port_runtime: Holds the port parameters for each of the Master(s) + * Slave(s) port associated with the stream. + * + * @port_num: Port number. + * @channel_mask: Channels of the Stream handled by this port. + * @transport_params: Transport parameters of port. + * @port_params: Port parameters + * @port_node: Port runtime is added to the Port List of Master(s) or + * Slave(s) associated with stream. Node to add the Port runtime to + * Master(s) or Slave(s) list. + */ +struct sdw_port_runtime { + int port_num; + int channel_mask; + struct sdw_transport_params transport_params; + struct sdw_port_params port_params; + struct list_head port_node; +}; + +/** + * sdw_slave_runtime: Holds the Stream parameters for the Slave associated + * with the stream. + * + * @slv: Slave handle associated with this Stream. + * @sdw_rt: Stream handle to which this Slave stream is associated. + * @direction: Port Direction of the Slave for this Stream. Slave is + * transmitting the Data or receiving the Data. + * + * @stream_params: Stream parameters for Slave. + * @port_rt_list: List of Slave Ports associated with this Stream. + * @slave_strm_node: Stream runtime data structure maintains list of all the + * Slave runtime instances associated with stream. This is the node to + * add Slave runtime instance to that list. This list is used for the + * stream configuration. + * + * @slave_mstr_node: Master runtime data structure maintains list of all the + * Slave runtime instances. This is the node to add Slave runtime + * instance to that list. This list is used for Bandwidth calculation + * per bus. Slave runtime instance gets added to two list one for + * stream configuration and other for bandwidth calculation. Stream + * configuration is per stream where there may be multiple Masters and + * Slave associated with Stream. Bandwidth calculation is per Bus, + * where there is Single Master and Multiple Slaves associated with + * bus. + */ +struct sdw_slv_runtime { + struct sdw_slave *slv; + struct sdw_runtime *sdw_rt; + int direction; + struct sdw_stream_params stream_params; + struct list_head port_rt_list; + struct list_head slave_strm_node; + struct list_head slave_mstr_node; +}; + +/** + * sdw_bus_runtime: This structure holds the transport params and BW + * required by the stream on the bus. There may be multiple bus + * associated with the stream. This holds bus specific parameters of + * stream. TODO: Currently sdw_bus_runtime is part of sdw_mstr_runtime + * Master handle. Once stream between Slave to Slave is supported by + * bus driver, this needs to be made part of sdw_runtime handle. + * + * @stream_bw: Bus Bandwidth required by this stream (bps). + * @hstart: Horizontal Start column for this stream. + * @hstop: Horizontal stop column for this stream. + * @block_offset: Block offset for this stream. + * @sub_block_offset: Sub Block offset for this stream. + */ +struct sdw_bus_runtime { + unsigned int stream_bw; + int hstart; + int hstop; + int block_offset; + int sub_block_offset; + +}; + +/** + * sdw_mstr_runtime: Holds the Stream parameters for the Master associated + * with the stream. + * + * @mstr: Master handle associated with this stream. + * @sdw_rt: Stream handle to which this Master stream is associated. + * @stream_params: Stream parameters. + * @port_rt_list: List of this Master Ports associated with this Stream. + * @mstr_strm_node: Stream runtime data structure maintains list of all the + * Master runtime instances associated with stream. This is the node to + * add Master runtime instance to that list. This list is used for the + * stream configuration. + * + * @mstr_node: Master data structure maintains list of all the Master + * runtime instances. This is the node to add Master runtime instance + * to to that list. This list is used for Bandwidth calculation per + * bus. Master runtime instance gets added to two list one for stream + * configuration and other for bandwidth calculation. Stream + * configuration is per stream where there may be multiple Masters and + * Slave associated with Stream. Bandwidth calculation is per Bus, + * where there is Single Master and Multiple Slaves associated with + * bus. + * + * @slv_rt_list: List of the Slave_runtime instances associated with this + * Master_runtime. Its list of all the Slave(s) stream associated with + * this Master. There may be stereo stream from Master to two Slaves, + * where L and R samples from Master is received by two different + * Slave(s), so this list contains the runtime structure associated + * with both Slaves. + * + * @bus_rt: Bus parameters for the stream. There may be multiple bus + * associated with stream. This bus_rt is for current Master. + */ +struct sdw_mstr_runtime { + struct sdw_master *mstr; + struct sdw_runtime *sdw_rt; + int direction; + struct sdw_stream_params stream_params; + struct list_head port_rt_list; + struct list_head mstr_strm_node; + struct list_head mstr_node; + struct list_head slv_rt_list; + struct sdw_bus_runtime bus_rt; +}; + +/** + * sdw_runtime: This structure holds runtime information for each unique + * SoundWire stream. + * + * @tx_ref_count: Number of Transmit devices of stream. This may include + * multiple Master(s) and Slave(s) based on how stream samples are + * split between Mater and Slaves. + * @rx_ref_count: Number of Receive devices of stream. This may include + * multiple Master(s) and Slave(s) based on how stream samples are + * split between Mater and Slaves. + * + * @stream_params: Steam parameters. + * @slv_rt_list: List of the slaves part of this stream. + * @mstr_rt_list: List of Masters part of this stream. + * @type: Stream type PCM or PDM.This is not SoundWire concept, its used + * inside bus driver for efficient BW management. + * + * @stream_state: Current State of the stream. + */ +struct sdw_runtime { + int tx_ref_count; + int rx_ref_count; + struct sdw_stream_params stream_params; + struct list_head slv_rt_list; + struct list_head mstr_rt_list; + enum sdw_stream_type type; + enum sdw_stream_state stream_state; +}; + +/** * sdw_slv_status: List of Slave status. * * @node: Node for adding status to list of Slave status. @@ -110,6 +409,20 @@ struct sdw_slv_status { * * @bus_node: Node to add the bus in the sdw_core list. * @mstr: Master reference for the bus. + * @clk_state: State of the clock. + * @active_bank: Current bank in use. + * @max_clk_dr_freq: Maximum double rate clock frequency. This is maximum + * double clock rate supported per bus. + * @curr_clk_dr_freq: Current double rate clock frequency in use. This is + * current clock rate at which bus is running. + * + * @clk_div: Current clock divider in use. + * @bandwidth: Total bandwidth. + * @system_interval: Bus System interval (Stream Synchronization Point). + * @stream_interval: Stream interval. + * @frame_freq: SoundWire Frame frequency on bus. + * @col: Active columns. + * @row: Active rows. * @status_thread: Thread to process the Slave status. * @kworker: Worker for updating the Slave status. * @kwork: Work for worker @@ -121,16 +434,48 @@ struct sdw_slv_status { * context, spinlock is used to put the status reported by Master into * the status list which is processed by bus driver in thread context * later. + * + * @data: Data to be provided by bus driver for calling xfer_msg_deferred + * callback of Master driver. + */ struct sdw_bus { struct list_head bus_node; struct sdw_master *mstr; + unsigned int clk_state; + unsigned int active_bank; + unsigned int max_dr_clk_freq; + unsigned int curr_dr_clk_freq; + unsigned int clk_div; + unsigned int bandwidth; + unsigned int system_interval; + unsigned int stream_interval; + unsigned int frame_freq; + unsigned int col; + unsigned int row; struct task_struct *status_thread; struct kthread_worker kworker; struct kthread_work kwork; struct list_head status_list; spinlock_t spinlock; + struct sdw_deferred_xfer_data data; +}; + +/** + * sdw_row_col_pair: Information for each row column pair. This is used by + * bus driver for quick BW calculation. + * + * @row: Number of rows. + * @col: Number of columns + * @control_bits: Number of controls bits for this row-column pair. + * @data_bits: Number of controls bits for this row-column pair. + */ +struct sdw_row_col_pair { + int row; + int col; + int control_bits; + int data_bits; }; /** @@ -138,11 +483,17 @@ struct sdw_bus { * spawned across masters and has list of bus structure per every * Master registered. * + * @row_col_pair: Array holding all row-column pair possible as per MIPI + * 1.1 Spec. This is used for quick reference for BW calculation + * algorithm. + * * @bus_list: List of all the bus instance. * @core_mutex: Global lock for all bus instances. * @idr: For identifying the registered buses. */ struct snd_sdw_core { + struct sdw_stream_tag stream_tags[SDW_NUM_STREAM_TAGS]; + struct sdw_row_col_pair row_col_pair[MAX_NUM_ROW_COLS]; struct list_head bus_list; struct mutex core_mutex; struct idr idr; @@ -168,6 +519,58 @@ void sdw_bank_switch_deferred(struct sdw_master *mstr, struct sdw_msg *msg, struct sdw_deferred_xfer_data *data); /** + * sdw_index_to_col: Structure holding mapping of numbers to columns. + * + * @index: Holds index to number of columns. + * @col: Holds actual columns. + */ +struct sdw_index_to_col { + int index; + int col; +}; + +/** + * sdw_index_to_row: Structure holding mapping of numbers to rows. + * + * @index: Holds index to number of rows. + * @row: Holds actual rows. + */ +struct sdw_index_to_row { + int index; + int row; +}; + +/** + * sdw_group_params: Structure holding temporary variable while computing + * transport parameters of Master(s) and Slave(s). + * + * @rate: Holds stream rate. + * @full_bw: Holds full bandwidth per group. + * @payload_bw: Holds payload bandwidth per group. + * @hwidth: Holds hwidth per group. + */ +struct sdw_group_params { + int rate; + int full_bw; + int payload_bw; + int hwidth; +}; + +/** + * sdw_group_count: Structure holding group count and stream rate array + * while computing transport parameters of Master(s) and Slave(s). + * + * @group_count: Holds actual group count. + * @max_size: Holds maximum capacity of array. + * @stream_rates: Pointer to stream rates. + */ +struct sdw_group_count { + unsigned int group_count; + unsigned int max_size; + unsigned int *stream_rates; +}; + +/** * sdw_enable_disable_dpn_intr: Enable or Disable Slave Data Port interrupt. * This is called by bus driver before prepare and after deprepare of * the ports. @@ -182,6 +585,52 @@ void sdw_bank_switch_deferred(struct sdw_master *mstr, struct sdw_msg *msg, int sdw_enable_disable_dpn_intr(struct sdw_slave *sdw_slv, int port_num, int port_direction, bool enable); +/** + * sdw_create_row_col_pair: Initialization of bandwidth related operations. + * This is required to have fast path for the BW calculation when a new + * stream is prepared or deprepared. This is called only once as part + * of SoundWire Bus driver getting initialized. + */ +void sdw_create_row_col_pair(void); + +/** + * sdw_init_bus_params: Sets up bus data structure for BW calculation. This + * is called once per each Master interface registration to the + * SoundWire bus. + * + * @sdw_bus: Bus handle. + */ +void sdw_init_bus_params(struct sdw_bus *sdw_bus); + +/** + * sdw_get_slv_dpn_caps: Get the data port capabilities based on the port + * number and port direction. + * + * @slv_cap: Slave capabilities. + * @direction: Port data direction. + * @port_num: Port number. + */ +struct sdw_dpn_caps *sdw_get_slv_dpn_cap(struct sdw_slave_caps *slv_cap, + enum sdw_data_direction direction, + unsigned int port_num); + +/* Return bus structure */ +static inline struct sdw_bus *sdw_master_to_bus(struct sdw_master *mstr) +{ + return mstr->bus; +} + +/* Reference count increment */ +static inline void sdw_inc_ref_count(int *ref_count) +{ + (*ref_count)++; +} + +/* Reference count decrement */ +static inline void sdw_dec_ref_count(int *ref_count) +{ + (*ref_count)--; +} /* * Helper function for bus driver to write messages. Since bus driver -- 1.7.9.5