[alsa-devel] iMX6 ESAI TDM with underrun and overrun support
Hello, I am currently working on an iMX6 board, I work with the master branch of git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git I have seen some problems in the freescale ESAI implementation :
1.The registers TCCR and RCCR have TFP and RFP bits in register of a width of 5, not 4 ! With a value of 5 we are able to use the full range of slots (32) Patch : http://pastebin.com/Ai1RZ9mE 2.The channels number are limited in Playback to 12, but actually we can rise 128, in Capture it is limited to 8 but actually we can rise 128 also
Patch : http://pastebin.com/SHk5eHPa
I use the iMX6 ESAI bus to send audio datas to other processors ... but actually I don't have any codec behind ... I am wondering if there is any solution with the devicetree to implement such configuration with "simple-audio-card"
Because for the moment I have not find another solution than doing a module : http://pastebin.com/cnGwnEjn
I also see that the chip errata of the iMX6 ERR008000 is not handle ...Which make channel swapping on my ESAI bus ... Is there someone that succeed in implementing the underrun overrun catch ?
Thank you for your return,
Regards Aurelien BOUIN
Hi Aurelien,
[Adding Nicolin and Mark on Cc]
On Wed, Dec 17, 2014 at 1:13 PM, Aurelien Bouin a_bouin@yahoo.fr wrote:
Hello, I am currently working on an iMX6 board, I work with the master branch of git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git I have seen some problems in the freescale ESAI implementation :
1.The registers TCCR and RCCR have TFP and RFP bits in register of a width of 5, not 4 ! With a value of 5 we are able to use the full range of slots (32) Patch : http://pastebin.com/Ai1RZ9mE
Please send this as a formal patch for review in the list.
2.The channels number are limited in Playback to 12, but actually we can rise 128, in Capture it is limited to 8 but actually we can rise 128 also
Patch : http://pastebin.com/SHk5eHPa
Same here.
I use the iMX6 ESAI bus to send audio datas to other processors ... but actually I don't have any codec behind ... I am wondering if there is any solution with the devicetree to implement such configuration with "simple-audio-card"
Because for the moment I have not find another solution than doing a module : http://pastebin.com/cnGwnEjn
I also see that the chip errata of the iMX6 ERR008000 is not handle ...Which make channel swapping on my ESAI bus ... Is there someone that succeed in implementing the underrun overrun catch ?
Are you getting the "isr: Receiving overrun/underrun" warnings from the esai driver?
On Wed, Dec 17, 2014 at 2:04 PM, Fabio Estevam festevam@gmail.com wrote:
Hi Aurelien,
[Adding Nicolin and Mark on Cc]
On Wed, Dec 17, 2014 at 1:13 PM, Aurelien Bouin a_bouin@yahoo.fr wrote:
Hello, I am currently working on an iMX6 board, I work with the master branch of git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git I have seen some problems in the freescale ESAI implementation :
1.The registers TCCR and RCCR have TFP and RFP bits in register of a width of 5, not 4 !
I just looked at the manual: TFP and RFP are 4-bit dividers, so the current code is correct.
On Wed, Dec 17, 2014 at 5:16 PM, Fabio Estevam festevam@gmail.com wrote:
I just looked at the manual: TFP and RFP are 4-bit dividers, so the current code is correct.
Your second hunk:
-#define ESAI_xCCR_xDC_WIDTH 4 +#define ESAI_xCCR_xDC_WIDTH 5
Looks correct though. Would you like to submit a patch to fix it?
Hi Aurelien,
On Wed, Dec 17, 2014 at 02:04:25PM -0200, Fabio Estevam wrote:
On Wed, Dec 17, 2014 at 1:13 PM, Aurelien Bouin a_bouin@yahoo.fr wrote:
Hello, I am currently working on an iMX6 board, I work with the master branch of git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git I have seen some problems in the freescale ESAI implementation :
1.The registers TCCR and RCCR have TFP and RFP bits in register of a width of 5, not 4 ! With a value of 5 we are able to use the full range of slots (32) Patch : http://pastebin.com/Ai1RZ9mE
Only the width of xDC fields is incorrect as Fabio said.
Please send your revised patch to alsa-maillist, CC me and Mark. (It'd be better to use ./scripts/get_maintainer.pl to get info)
I'll wait for you patch; Otherwise, I can fix it this weekend.
2.The channels number are limited in Playback to 12, but actually we can rise 128, in Capture it is limited to 8 but actually we can rise 128 also
Patch : http://pastebin.com/SHk5eHPa
The limitation was applied because of the number of transmitters and receivers. TDM looks a bit a special case to me. So I personally encourage you to first apply the change it to your own code.
The other reason is that actually network mode only supports slots up to 32. So I don't get why you can make it happen to 128.....
I use the iMX6 ESAI bus to send audio datas to other processors ... but actually I don't have any codec behind ... I am wondering if there is any solution with the devicetree to implementing such configuration with "simple-audio-card"
Because for the moment I have not find another solution than doing a module : http://pastebin.com/cnGwnEjn
I also see that the chip errata of the iMX6 ERR008000 is not handle ... Which make channel swapping on my ESAI bus ... Is there someone that succeed in implementing the underrun overrun catch ?
the esai driver?
I think you may like to try the newer official BSP release from Freescale. I remember the fix is included and the fix is hard to merge into the Linux mainline because it hacks some common interfaces inside ASoC.
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git
Nicolin Chen
Hi Nicolin,
Le Jeudi 18 décembre 2014 0h36, Nicolin Chen nicoleotsuka@gmail.com a écrit :
Hi Aurelien,
On Wed, Dec 17, 2014 at 02:04:25PM -0200, Fabio Estevam wrote:
On Wed, Dec 17, 2014 at 1:13 PM, Aurelien Bouin a_bouin@yahoo.fr wrote:
Hello, I am currently working on an iMX6 board, I work with the master branch of git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git I have seen some problems in the freescale ESAI implementation :
1.The registers TCCR and RCCR have TFP and RFP bits in register of a width of 5, not 4 ! With a value of 5 we are able to use the full range of slots (32) Patch : http://pastebin.com/Ai1RZ9mE
Only the width of xDC fields is incorrect as Fabio said.>
You are right ... only the xDC fields is incorrect ...
Please send your revised patch to alsa-maillist, CC me and Mark.
(It'd be better to use ./scripts/get_maintainer.pl to get info)
I will send you a formated patch Do you mean that I have to CC the patch to all the maintainers ?
I'll wait for you patch; Otherwise, I can fix it this weekend.
2.The channels number are limited in Playback to 12, but actually we can rise 128, in Capture it is limited to 8 but actually we can rise 128 also
Patch : http://pastebin.com/SHk5eHPa
The limitation was applied because of the number of transmitters and receivers. TDM looks a bit a special case to me. So I personally encourage you to first apply the change it to your
own code.>
The other reason is that actually network mode only supports slots up to 32. So I don't get why you can make it happen to
128.....
Yes and No. It supports up to 32 words (slots) per period on each transmit line, in the limit of 128 words (FIFO limitations) My reference is in the Reference Manual of the iMX6 "26.1.1 Features" in the ESAI chapter
FYI in the fsl_esai.c you can find how multiples lines and slots are handled : -> fsl_esai_hw_params : u32 pins = DIV_ROUND_UP(channels, esai_priv->slots); Then it will enable the number of hardware pins used in transmit and receive mode with TFCR or RFCR : val = ESAI_xFCR_xWA(width) | ESAI_xFCR_xFWM(esai_priv->fifo_depth) | (tx ? ESAI_xFCR_TE(pins) | ESAI_xFCR_TIEN : ESAI_xFCR_RE(pins));
I first apply the patch on my kernel I am currently using 64 channels (32 slots of 8bits width on 2 transmits pins)
But for example you can use up to 6 transmits pins with a configuration of 2 slots of 16 bits width and 12 channels ask in alsa ...
I use the iMX6 ESAI bus to send audio datas to other processors ... but actually I don't have any codec behind ... I am wondering if there is any solution with the devicetree to implementing such configuration with "simple-audio-card"
Because for the moment I have not find another solution than doing a module : http://pastebin.com/cnGwnEjn
I also see that the chip errata of the iMX6 ERR008000 is not handle ... Which make channel swapping on my ESAI bus ... Is there someone that succeed in implementing the underrun overrun catch ?
the esai driver?
I think you may like to try the newer official BSP release from Freescale. I remember the fix is included and the fix is hard to merge into the Linux mainline because it hacks some common interfaces inside ASoC.
I already tried the branches : imx_3.10.31_1.1.0_alpha imx_3.10.31_1.1.0_beta2 They implemented a fsl_reset function somewhere ... but it is never called ... and the problem persist ... FYI I have posted something about the problem also on the IMX Community you can see some capture of the problem : https://community.freescale.com/message/463492#463492 It is easy to reproduce just take some cpu : while true;do true; done
Nicolin Chen
Thank you very much for your help,
Regards, Aurelien BOUIN
On Thu, Dec 18, 2014 at 7:00 AM, Aurelien Bouin a_bouin@yahoo.fr wrote:
Please send your revised patch to alsa-maillist, CC me and Mark.
(It'd be better to use ./scripts/get_maintainer.pl to get info)
I will send you a formated patch Do you mean that I have to CC the patch to all the maintainers ?
Please check Documentation/SubmittingPatches for details.
You should send the patch to Mark and Nicolin with this list on Cc.
On Thu, Dec 18, 2014 at 09:00:43AM +0000, Aurelien Bouin wrote:
Yes and No. It supports up to 32 words (slots) per period on each transmit line, in the limit of 128 words (FIFO limitations) My reference is in the Reference Manual of the iMX6 "26.1.1 Features" in the ESAI chapter
FYI in the fsl_esai.c you can find how multiples lines and slots are handled : -> fsl_esai_hw_params : u32 pins = DIV_ROUND_UP(channels, esai_priv->slots); Then it will enable the number of hardware pins used in transmit and receive mode with TFCR or RFCR : val = ESAI_xFCR_xWA(width) | ESAI_xFCR_xFWM(esai_priv->fifo_depth) | (tx ? ESAI_xFCR_TE(pins) | ESAI_xFCR_TIEN : ESAI_xFCR_RE(pins));
I first apply the patch on my kernel I am currently using 64 channels (32 slots of 8bits width on 2 transmits pins)
But for example you can use up to 6 transmits pins with a configuration of 2 slots of 16 bits width and 12 channels ask in alsa ...
Ah, I forgot you could use several pins....
I already tried the branches : imx_3.10.31_1.1.0_alpha imx_3.10.31_1.1.0_beta2 They implemented a fsl_reset function somewhere ... but it is never called ... and the problem persist ...
I have a bit doubt whether your problem is the underrun or not. Because I remember the work around submitter did test with underrun issue. The reset function would be trigger by the ESAI internal ISR but be called through the ISR from dma callback.
There's a fsl_esai_check_xrun() inside the ESAI. You can try to see if it's really underrun happened.
And besides, which pins from IOMUX are you using for ESAI?
--Nicolin
Hi Nicolin, First thank you for your support,
Le Vendredi 19 décembre 2014 10h23, Nicolin Chen nicoleotsuka@gmail.com a écrit : On Thu, Dec 18, 2014 at 09:00:43AM +0000, Aurelien Bouin wrote:
Yes and No. It supports up to 32 words (slots) per period on each transmit line, in the limit of 128 words (FIFO limitations) My reference is in the Reference Manual of the iMX6 "26.1.1 Features" in the ESAI chapter
FYI in the fsl_esai.c you can find how multiples lines and slots are handled : -> fsl_esai_hw_params : u32 pins = DIV_ROUND_UP(channels, esai_priv->slots); Then it will enable the number of hardware pins used in transmit and receive mode with TFCR or RFCR : val = ESAI_xFCR_xWA(width) | ESAI_xFCR_xFWM(esai_priv->fifo_depth) | (tx ? ESAI_xFCR_TE(pins) | ESAI_xFCR_TIEN : ESAI_xFCR_RE(pins));
I first apply the patch on my kernel I am currently using 64 channels (32 slots of 8bits width on 2 transmits pins)
But for example you can use up to 6 transmits pins with a configuration of 2 slots of 16 bits width and 12 channels ask in alsa ...
Ah, I forgot you could use several pins....
I already tried the branches : imx_3.10.31_1.1.0_alpha imx_3.10.31_1.1.0_beta2 They implemented a fsl_reset function somewhere ... but it is never called ... and the problem persist ...
I have a bit doubt whether your problem is the underrun or not. Because I remember the work around submitter did test with underrun issue. The reset function would be trigger by the ESAI internal ISR but be called through the ISR from dma callback.
There's a fsl_esai_check_xrun() inside the ESAI. You can try to see if
it's really underrun happened.
I get back to linux branch imx_3.10.31_1.1.0_beta2 at git://git.freescale.com/imx/linux-2.6-imx.git I figured out that the TIE and TEIE bits in the TCR register are not set at any moment ... So I add in the fsl_esai_set_dai_fmt
#define MAKE_TCR_INTERRUPTIBLE #ifdef MAKE_TCR_INTERRUPTIBLE //make it interruptible printk(KERN_ERR"%s(%d)\n",__func__,__LINE__); mask |= ESAI_xCR_xEIE_MASK | ESAI_xCR_xIE_MASK; xcr |= ESAI_xCR_xEIE | ESAI_xCR_xIE; //make it interruptible #endif /* MAKE_TCR_INTERRUPTIBLE */
I also add a dump function that show the register at fsl_esai_hw_params : ESAI_TCR 0x00728100 I also add debug in the function fsl_esai_check_xrun that show the saisr register When underrun occured (when I see that with an oscilloscope)
There is no interrupt generated ...
I tried to change the transmit fifo watermak(These bits configure the threshold at which the Transmit FIFO Empty flag will set) to set it to a value of 2 Before I was using 64, since I use 64 channels in this case I get a lot of underrun interrupt ... and of course it is not working correctly .. because the dma know to late that there is not enough data in the ESAI transmit FIFO...
FYI here is my fsl_esai.c modified : http://pastebin.com/x5vnfAM8
And besides, which pins from IOMUX are you using for ESAI?
I am using TX0, TX1 and RX0, RX1 But for the moment I am just working on the playback (transmits pins)
--Nicolin
Regards, Aurelien BOUIN
On Fri, Dec 19, 2014 at 10:13:32AM +0000, Aurelien Bouin wrote:
I have a bit doubt whether your problem is the underrun or not. Because I remember the work around submitter did test with underrun issue. The reset function would be trigger by the ESAI internal ISR but be called through the ISR from dma callback.
There's a fsl_esai_check_xrun() inside the ESAI. You can try to see if it's really underrun happened.
I also add a dump function that show the register at fsl_esai_hw_params : ESAI_TCR 0x00728100 I also add debug in the function fsl_esai_check_xrun that show the saisr register When underrun occured (when I see that with an oscilloscope)
There is no interrupt generated ...
So I suppose your 'no interrupt generated' also means that the underrun flag has never been set: even if you added check debug code into the fsl_esai_check_xrun(), it hasn't given you any feedback.
In that case, I think the channel swap was not resulted from ESAI hardware FIFO underrun.
I tried to change the transmit fifo watermak(These bits configure the threshold at which the Transmit FIFO Empty flag will set) to set it to a value of 2 Before I was using 64, since I use 64 channels in this case I get a lot of underrun interrupt ... and of course it is not working correctly .. Because the dma know to late that there is not enough data in the ESAI transmit FIFO...
Since you got the underrun error flag after you changed watermark, that also proves your previous channel swap issue was not trigger by the underrun issue.
And besides, which pins from IOMUX are you using for ESAI?
I am using TX0, TX1 and RX0, RX1
No, I'm asking the full pin name of IOMUX. Where's the TX0, TX1 come from the IOMUX. You can check you schematics or the pinctrl configuration in your dts/dtsi to see the name.
Another suggestion is for your mail client setting...please try to set your mail client to text/plain or auto-wrapping mode. We basically write code or mail no more than 80 characters per line.
--Nicolin
participants (3)
-
Aurelien Bouin -
Fabio Estevam -
Nicolin Chen