[alsa-devel] [PATCH] ASoC: Fix comment width in soc-cache.c
Lines should be less than 80 columns.
Signed-off-by: Mark Brown broonie@opensource.wolfsonmicro.com --- sound/soc/soc-cache.c | 9 +++++---- 1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/sound/soc/soc-cache.c b/sound/soc/soc-cache.c index 5655fce..3e7f691 100644 --- a/sound/soc/soc-cache.c +++ b/sound/soc/soc-cache.c @@ -393,10 +393,11 @@ static int snd_soc_16_16_spi_write(void *control_data, const char *data, #define snd_soc_16_16_spi_write NULL #endif
-/* Primitive bulk write support for soc-cache. The data pointed to by `data' needs - * to already be in the form the hardware expects including any leading register specific - * data. Any data written through this function will not go through the cache as it - * only handles writing to volatile or out of bounds registers. +/* Primitive bulk write support for soc-cache. The data pointed to by + * `data' needs to already be in the form the hardware expects + * including any leading register specific data. Any data written + * through this function will not go through the cache as it only + * handles writing to volatile or out of bounds registers. */ static int snd_soc_hw_bulk_write_raw(struct snd_soc_codec *codec, unsigned int reg, const void *data, size_t len)
On Mon, 2011-04-04 at 17:56 +0900, Mark Brown wrote:
Lines should be less than 80 columns.
Signed-off-by: Mark Brown broonie@opensource.wolfsonmicro.com
sound/soc/soc-cache.c | 9 +++++---- 1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/sound/soc/soc-cache.c b/sound/soc/soc-cache.c index 5655fce..3e7f691 100644 --- a/sound/soc/soc-cache.c +++ b/sound/soc/soc-cache.c @@ -393,10 +393,11 @@ static int snd_soc_16_16_spi_write(void *control_data, const char *data, #define snd_soc_16_16_spi_write NULL #endif
-/* Primitive bulk write support for soc-cache. The data pointed to by `data' needs
- to already be in the form the hardware expects including any leading register specific
- data. Any data written through this function will not go through the cache as it
- only handles writing to volatile or out of bounds registers.
+/* Primitive bulk write support for soc-cache. The data pointed to by
- `data' needs to already be in the form the hardware expects
- including any leading register specific data. Any data written
- through this function will not go through the cache as it only
*/
- handles writing to volatile or out of bounds registers.
static int snd_soc_hw_bulk_write_raw(struct snd_soc_codec *codec, unsigned int reg, const void *data, size_t len)
Acked-by: Liam Girdwood lrg@ti.com
participants (2)
-
Liam Girdwood -
Mark Brown