wm8960 codec driver question
Hi,
I hope this is the right place to ask .
In the driver ( soc/codecs/wm8960.c ) there is a function that sets pll - the wm8960_set_pll() , line 1185 . On exit , the function turns on the pll clocking like this :
/* Turn it on */ snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0x1); msleep(250); snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0x1);
What is the reason for the 250 ms delay ? I did not find anything related in the chip datasheet .
I found the delay very annoying in my app that generates an audible feedback to touchscreen events. Looks like it is safe to comment out the msleep() call , could there be any implications ?
Best regards, Alex Shinkin
On Thu, Apr 16, 2020 at 04:24:18AM +0000, Alexey Shinkin wrote:
/* Turn it on */ snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0x1); msleep(250); snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0x1);
What is the reason for the 250 ms delay ? I did not find anything related in the chip datasheet .
I found the delay very annoying in my app that generates an audible feedback to touchscreen events. Looks like it is safe to comment out the msleep() call , could there be any implications ?
Almost certainly this is providing time for the PLL to lock before turning on clocks dependent on this. If you reduce the value some systems might progress before the PLL is locked which could cause weird behaviour. Although might work fine on other systems, removing it all together is probably a bad idea though.
Thanks, Charles
participants (2)
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Alexey Shinkin -
Charles Keepax