[alsa-devel] [PATCH V2 0/2] Support more sample rate in asrc
Support more sample rate in asrc
Shengjiu Wang (2): ASoC: fsl_asrc: replace the process_option table with function ASoC: fsl_asrc: Unify the supported input and output rate
Changes in v2 - add more comments in code - add commit "Unify the supported input and output rate"
sound/soc/fsl/fsl_asrc.c | 116 ++++++++++++++++++++++++++++++++++------------- 1 file changed, 85 insertions(+), 31 deletions(-)
When we want to support more sample rate, for example 12kHz/24kHz we need update the process_option table, if we want to support more sample rate next time, the table need to be updated again. which is not flexible.
We got a function fsl_asrc_sel_proc to replace the table, which can give the pre-processing and post-processing options according to the sample rate.
Signed-off-by: Shengjiu Wang shengjiu.wang@nxp.com --- sound/soc/fsl/fsl_asrc.c | 87 +++++++++++++++++++++++++++++++++++++----------- 1 file changed, 67 insertions(+), 20 deletions(-)
diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c index 0b937924d2e4..5857d383d962 100644 --- a/sound/soc/fsl/fsl_asrc.c +++ b/sound/soc/fsl/fsl_asrc.c @@ -26,24 +26,6 @@ #define pair_dbg(fmt, ...) \ dev_dbg(&asrc_priv->pdev->dev, "Pair %c: " fmt, 'A' + index, ##__VA_ARGS__)
-/* Sample rates are aligned with that defined in pcm.h file */ -static const u8 process_option[][12][2] = { - /* 8kHz 11.025kHz 16kHz 22.05kHz 32kHz 44.1kHz 48kHz 64kHz 88.2kHz 96kHz 176kHz 192kHz */ - {{0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0},}, /* 5512Hz */ - {{0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0},}, /* 8kHz */ - {{0, 2}, {0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0},}, /* 11025Hz */ - {{1, 2}, {0, 2}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0},}, /* 16kHz */ - {{1, 2}, {1, 2}, {0, 2}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0},}, /* 22050Hz */ - {{1, 2}, {2, 1}, {2, 1}, {0, 2}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0}, {0, 0},}, /* 32kHz */ - {{2, 2}, {2, 2}, {2, 1}, {2, 1}, {0, 2}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0},}, /* 44.1kHz */ - {{2, 2}, {2, 2}, {2, 1}, {2, 1}, {0, 2}, {0, 2}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0},}, /* 48kHz */ - {{2, 2}, {2, 2}, {2, 2}, {2, 1}, {1, 2}, {0, 2}, {0, 2}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0},}, /* 64kHz */ - {{2, 2}, {2, 2}, {2, 2}, {2, 2}, {1, 2}, {1, 2}, {1, 2}, {1, 1}, {1, 1}, {1, 1}, {1, 1}, {1, 1},}, /* 88.2kHz */ - {{2, 2}, {2, 2}, {2, 2}, {2, 2}, {1, 2}, {1, 2}, {1, 2}, {1, 1}, {1, 1}, {1, 1}, {1, 1}, {1, 1},}, /* 96kHz */ - {{2, 2}, {2, 2}, {2, 2}, {2, 2}, {2, 2}, {2, 2}, {2, 2}, {2, 1}, {2, 1}, {2, 1}, {2, 1}, {2, 1},}, /* 176kHz */ - {{2, 2}, {2, 2}, {2, 2}, {2, 2}, {2, 2}, {2, 2}, {2, 2}, {2, 1}, {2, 1}, {2, 1}, {2, 1}, {2, 1},}, /* 192kHz */ -}; - /* Corresponding to process_option */ static int supported_input_rate[] = { 5512, 8000, 11025, 16000, 22050, 32000, 44100, 48000, 64000, 88200, @@ -79,6 +61,63 @@
static unsigned char *clk_map[2];
+/* + * Select the pre-processing and post-processing options + * + * Fsin: input sample rate + * Fsout: output sample rate + * pre_proc: return value for pre-processing option + * post_proc: return value for post-processing option + */ +static int fsl_asrc_sel_proc(int Fsin, int Fsout, int *pre_proc, int *post_proc) +{ + bool det_out_op2_cond; + bool det_out_op0_cond; + + /* Codition for selection of post-processing */ + det_out_op2_cond = (((Fsin * 15 > Fsout * 16) & (Fsout < 56000)) | + ((Fsin > 56000) & (Fsout < 56000))); + det_out_op0_cond = (Fsin * 23 < Fsout * 8); + + /* + * unsupported case: Tsout>16.125*Tsin, and Tsout>8.125*Tsin. + * Tsout>16.125*Tsin -> Fsin * 8 > 129 * Fsout + * Tsout>8.125*Tsin -> Fsin * 8 > 65 * Fsout + * Tsout>4.125*Tsin -> Fsin * 8 > 33 * Fsout + * Tsout>1.875*Tsin -> Fsin * 8 > 15 * Fsout + */ + if (Fsin * 8 > 129 * Fsout) + *pre_proc = 5; + else if (Fsin * 8 > 65 * Fsout) + *pre_proc = 4; + else if (Fsin * 8 > 33 * Fsout) + *pre_proc = 2; + else if (Fsin * 8 > 15 * Fsout) { + if (Fsin > 152000) + *pre_proc = 2; + else + *pre_proc = 1; + } else if (Fsin < 76000) + *pre_proc = 0; + else if (Fsin > 152000) + *pre_proc = 2; + else + *pre_proc = 1; + + if (det_out_op2_cond) + *post_proc = 2; + else if (det_out_op0_cond) + *post_proc = 0; + else + *post_proc = 1; + + /* unsupported options */ + if (*pre_proc == 4 || *pre_proc == 5) + return -EINVAL; + + return 0; +} + /** * Request ASRC pair * @@ -239,8 +278,10 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair) u32 inrate, outrate, indiv, outdiv; u32 clk_index[2], div[2]; int in, out, channels; + int pre_proc, post_proc; struct clk *clk; bool ideal; + int ret;
if (!config) { pair_err("invalid pair config\n"); @@ -289,6 +330,12 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair) return -EINVAL; }
+ ret = fsl_asrc_sel_proc(inrate, outrate, &pre_proc, &post_proc); + if (ret) { + pair_err("No supported pre-processing options\n"); + return ret; + } + /* Validate input and output clock sources */ clk_index[IN] = clk_map[IN][config->inclk]; clk_index[OUT] = clk_map[OUT][config->outclk]; @@ -380,8 +427,8 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair) /* Apply configurations for pre- and post-processing */ regmap_update_bits(asrc_priv->regmap, REG_ASRCFG, ASRCFG_PREMODi_MASK(index) | ASRCFG_POSTMODi_MASK(index), - ASRCFG_PREMOD(index, process_option[in][out][0]) | - ASRCFG_POSTMOD(index, process_option[in][out][1])); + ASRCFG_PREMOD(index, pre_proc) | + ASRCFG_POSTMOD(index, post_proc));
return fsl_asrc_set_ideal_ratio(pair, inrate, outrate); }
Hi Shengjiu,
Mostly looking good. See few comments inline:
<snip>
+/*
- Select the pre-processing and post-processing options
- Fsin: input sample rate
- Fsout: output sample rate
- pre_proc: return value for pre-processing option
- post_proc: return value for post-processing option
- */
+static int fsl_asrc_sel_proc(int Fsin, int Fsout, int *pre_proc, int *post_proc)
Lets be naming consistent here: Fsin -> fs_in, Fsout -> fs_out.
+{
bool det_out_op2_cond;bool det_out_op0_cond;/* Codition for selection of post-processing */det_out_op2_cond = (((Fsin * 15 > Fsout * 16) & (Fsout < 56000)) |((Fsin > 56000) & (Fsout < 56000)));
Remove outer parenthesis. Also should here be a logical or (||) instead of bitwise or (|)? Same for && vs &.
det_out_op0_cond = (Fsin * 23 < Fsout * 8);
Remove outer parenthesis.
/** unsupported case: Tsout>16.125*Tsin, and Tsout>8.125*Tsin.* Tsout>16.125*Tsin -> Fsin * 8 > 129 * Fsout* Tsout>8.125*Tsin -> Fsin * 8 > 65 * Fsout* Tsout>4.125*Tsin -> Fsin * 8 > 33 * Fsout* Tsout>1.875*Tsin -> Fsin * 8 > 15 * Fsout*/if (Fsin * 8 > 129 * Fsout)*pre_proc = 5;else if (Fsin * 8 > 65 * Fsout)*pre_proc = 4;else if (Fsin * 8 > 33 * Fsout)*pre_proc = 2;else if (Fsin * 8 > 15 * Fsout) {if (Fsin > 152000)*pre_proc = 2;else*pre_proc = 1;} else if (Fsin < 76000)*pre_proc = 0;else if (Fsin > 152000)*pre_proc = 2;else*pre_proc = 1;if (det_out_op2_cond)*post_proc = 2;else if (det_out_op0_cond)*post_proc = 0;else*post_proc = 1;/* unsupported options */if (*pre_proc == 4 || *pre_proc == 5)return -EINVAL;return 0;+}
/**
- Request ASRC pair
@@ -239,8 +278,10 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair) u32 inrate, outrate, indiv, outdiv; u32 clk_index[2], div[2]; int in, out, channels;
int pre_proc, post_proc; struct clk *clk; bool ideal;int ret; if (!config) { pair_err("invalid pair config\n");@@ -289,6 +330,12 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair) return -EINVAL; }
ret = fsl_asrc_sel_proc(inrate, outrate, &pre_proc, &post_proc);if (ret) {pair_err("No supported pre-processing options\n");return ret;}/* Validate input and output clock sources */ clk_index[IN] = clk_map[IN][config->inclk]; clk_index[OUT] = clk_map[OUT][config->outclk];@@ -380,8 +427,8 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair) /* Apply configurations for pre- and post-processing */ regmap_update_bits(asrc_priv->regmap, REG_ASRCFG, ASRCFG_PREMODi_MASK(index) | ASRCFG_POSTMODi_MASK(index),
ASRCFG_PREMOD(index, process_option[in][out][0]) |ASRCFG_POSTMOD(index, process_option[in][out][1]));
ASRCFG_PREMOD(index, pre_proc) |ASRCFG_POSTMOD(index, post_proc)); return fsl_asrc_set_ideal_ratio(pair, inrate, outrate);}
1.9.1
On Thu, Apr 11, 2019 at 09:39:06AM +0000, S.j. Wang wrote:
+/*
- Select the pre-processing and post-processing options
By aligning with other function comments: /** * Select the pre-processing and post-processing options
- Fsin: input sample rate
- Fsout: output sample rate
I would suggest to use inrate and outrate to keep naming consistent.
- pre_proc: return value for pre-processing option
- post_proc: return value for post-processing option
- */
+static int fsl_asrc_sel_proc(int Fsin, int Fsout, int *pre_proc, int *post_proc) +{
- bool det_out_op2_cond;
- bool det_out_op0_cond;
By looking at the comments below. Probably better to rename them bool post_proc_cond2, post_proc_cond0;
- /* Codition for selection of post-processing */
"Codition" -> "Conditions"
- det_out_op2_cond = (((Fsin * 15 > Fsout * 16) & (Fsout < 56000)) |
((Fsin > 56000) & (Fsout < 56000)));
Combining Daniel's comments + indentation alignment: det_out_op2_cond = (Fsin * 15 > Fsout * 16 && Fsout < 56000) || (Fsin > 56000 && Fsout < 56000);
- det_out_op0_cond = (Fsin * 23 < Fsout * 8);
- /*
* unsupported case: Tsout>16.125*Tsin, and Tsout>8.125*Tsin.
Funny thing is that there'd be no point in checking the 16.125, if Tsout is bigger than 8.125 times of Tsin, i.e. only one condition: Tsout > 8.125 * Tsin
* Tsout>16.125*Tsin -> Fsin * 8 > 129 * Fsout* Tsout>8.125*Tsin -> Fsin * 8 > 65 * Fsout* Tsout>4.125*Tsin -> Fsin * 8 > 33 * Fsout* Tsout>1.875*Tsin -> Fsin * 8 > 15 * Fsout
Took me a while to understand what it is saying....
Better to write like this: /* Does not support cases: Tsout > 8.125 * Tsin */ if (Fsin * 8 > 65 * Fsout) { pair_err("Does not support %d > 8.125 * %d\n", Fsout, Fsin); return -EINVAL; }
/* Otherwise, select pre_proc between [0, 2] */ if (Fsin * 8 > 33 * Fsout)
*pre_proc = 2;- else if (Fsin * 8 > 15 * Fsout) {
if (Fsin > 152000)*pre_proc = 2;else*pre_proc = 1;- } else if (Fsin < 76000)
*pre_proc = 0;- else if (Fsin > 152000)
*pre_proc = 2;- else
*pre_proc = 1;
<== Would look better by moving post_cond calculations here.
- if (det_out_op2_cond)
*post_proc = 2;- else if (det_out_op0_cond)
*post_proc = 0;- else
*post_proc = 1;
And we could remove this check below:
- /* unsupported options */
- if (*pre_proc == 4 || *pre_proc == 5)
return -EINVAL;
So basically we are doing: 1) Error out unsupported cases 2) Select pre_proc 3) Calculate conditions for post_proc 4) Select post_proc
Thanks
Unify the supported input and output rate, add the 12kHz/24kHz/128kHz to the support list
Signed-off-by: Shengjiu Wang shengjiu.wang@nxp.com --- sound/soc/fsl/fsl_asrc.c | 29 ++++++++++++++++++----------- 1 file changed, 18 insertions(+), 11 deletions(-)
diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c index 5857d383d962..44bcc4a7b23b 100644 --- a/sound/soc/fsl/fsl_asrc.c +++ b/sound/soc/fsl/fsl_asrc.c @@ -27,13 +27,14 @@ dev_dbg(&asrc_priv->pdev->dev, "Pair %c: " fmt, 'A' + index, ##__VA_ARGS__)
/* Corresponding to process_option */ -static int supported_input_rate[] = { - 5512, 8000, 11025, 16000, 22050, 32000, 44100, 48000, 64000, 88200, - 96000, 176400, 192000, +static unsigned int supported_asrc_rate[] = { + 5512, 8000, 11025, 12000, 16000, 22050, 24000, 32000, 44100, 48000, + 64000, 88200, 96000, 128000, 176400, 192000, };
-static int supported_asrc_rate[] = { - 8000, 11025, 16000, 22050, 32000, 44100, 48000, 64000, 88200, 96000, 176400, 192000, +static struct snd_pcm_hw_constraint_list fsl_asrc_rate_constraints = { + .count = ARRAY_SIZE(supported_asrc_rate), + .list = supported_asrc_rate, };
/** @@ -305,11 +306,11 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair) ideal = config->inclk == INCLK_NONE;
/* Validate input and output sample rates */ - for (in = 0; in < ARRAY_SIZE(supported_input_rate); in++) - if (inrate == supported_input_rate[in]) + for (in = 0; in < ARRAY_SIZE(supported_asrc_rate); in++) + if (inrate == supported_asrc_rate[in]) break;
- if (in == ARRAY_SIZE(supported_input_rate)) { + if (in == ARRAY_SIZE(supported_asrc_rate)) { pair_err("unsupported input sample rate: %dHz\n", inrate); return -EINVAL; } @@ -502,7 +503,9 @@ static int fsl_asrc_dai_startup(struct snd_pcm_substream *substream, snd_pcm_hw_constraint_step(substream->runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
- return 0; + + return snd_pcm_hw_constraint_list(substream->runtime, 0, + SNDRV_PCM_HW_PARAM_RATE, &fsl_asrc_rate_constraints); }
static int fsl_asrc_dai_hw_params(struct snd_pcm_substream *substream, @@ -626,14 +629,18 @@ static int fsl_asrc_dai_probe(struct snd_soc_dai *dai) .stream_name = "ASRC-Playback", .channels_min = 1, .channels_max = 10, - .rates = FSL_ASRC_RATES, + .rate_min = 5512, + .rate_max = 192000, + .rates = SNDRV_PCM_RATE_KNOT, .formats = FSL_ASRC_FORMATS, }, .capture = { .stream_name = "ASRC-Capture", .channels_min = 1, .channels_max = 10, - .rates = FSL_ASRC_RATES, + .rate_min = 5512, + .rate_max = 192000, + .rates = SNDRV_PCM_RATE_KNOT, .formats = FSL_ASRC_FORMATS, }, .ops = &fsl_asrc_dai_ops,
On Thu, Apr 11, 2019 at 09:39:09AM +0000, S.j. Wang wrote:
Unify the supported input and output rate, add the
We previously didn't support 5KHz->5KHz, but now we do? That'd be great if so.
static int fsl_asrc_dai_hw_params(struct snd_pcm_substream *substream, @@ -626,14 +629,18 @@ static int fsl_asrc_dai_probe(struct snd_soc_dai *dai) .stream_name = "ASRC-Playback", .channels_min = 1, .channels_max = 10,
.rates = FSL_ASRC_RATES,
.rate_min = 5512,.rate_max = 192000,.rates = SNDRV_PCM_RATE_KNOT,
.rates = FSL_ASRC_RATES,
Probably could remove FSL_ASRC_RATES define since it's not used.
Thanks
participants (3)
-
Daniel Baluta -
Nicolin Chen -
S.j. Wang