On Thu, May 17, 2018 at 04:26:01PM +0200, Marco Felsch wrote:

From: Philipp Zabel p.zabel@pengutronix.de

In asynchronous mode, a RxFS and RxClk connection needs to be made between two ports. Add a define for the bit to be set in the *SEL fields.

Signed-off-by: Philipp Zabel p.zabel@pengutronix.de Signed-off-by: Marco Felsch m.felsch@pengutronix.de

---

include/dt-bindings/sound/fsl-imx-audmux.h | 4 ++++ 1 file changed, 4 insertions(+)

diff --git a/include/dt-bindings/sound/fsl-imx-audmux.h b/include/dt-bindings/sound/fsl-imx-audmux.h index 751fe1416f95..6120696abe63 100644 --- a/include/dt-bindings/sound/fsl-imx-audmux.h +++ b/include/dt-bindings/sound/fsl-imx-audmux.h @@ -25,6 +25,10 @@ #define MX51_AUDMUX_PORT6 5 #define MX51_AUDMUX_PORT7 6

+/* TFSEL/TCSEL/RFSEL/RCSEL can be sourced from Rx/Tx clocks on i.MX51/53/6Q */

It's actually not confined to 51/53/6Q -- 21 and 35 should also have it according to their Reference Manuals.

+#define IMX_AUDMUX_RXFS 0x8 +#define IMX_AUDMUX_RXCLK 0x8

/* Register definitions for the i.MX21/27 Digital Audio Multiplexer */ #define IMX_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff)

#define IMX_AUDMUX_V1_PCR_INMEN (1 << 8)

2.17.0