On 15/11/2022 11:55, Srinivas Kandagatla wrote:

LPASS VA Macro now has soundwire master to deal with access to analog mic in low power island use cases. This also means that VA macro now needs to get hold of the npl clock too. Add clock bindings required for this.

As part of adding this bindings, also update bindings to be able to specific and associate the clock names specific to the SoC.

Signed-off-by: Srinivas Kandagatla srinivas.kandagatla@linaro.org

.../bindings/sound/qcom,lpass-va-macro.yaml | 72 ++++++++++++++++--- 1 file changed, 64 insertions(+), 8 deletions(-)

diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml index c36caf90b837..848e34111df1 100644 --- a/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml @@ -27,16 +27,13 @@ properties: const: 0

clocks:

• maxItems: 3

• minItems: 1

• maxItems: 4

• clock-names:

• oneOf:

•  - items:   #for ADSP based platforms
  

•      - const: mclk
  

•      - const: core
  

•      - const: dcodec
  

•  - items:   #for ADSP bypass based platforms
  

•      - const: mclk
  

• minItems: 1

• maxItems: 4

  clock-output-names: maxItems: 1

@@ -61,6 +58,65 @@ required:

• reg
• "#sound-dai-cells"

+allOf:

• • if:

•  properties:
  

•    compatible:
  

•      contains:
  

•        const: qcom,sc7280-lpass-va-macro
  

• then:

•  properties:
  

•    clocks:
  

•      minItems: 1
  

You can skip minItems here.

•      maxItems: 1
  

•    clock-names:
  

•      items:
  

•        - const: mclk
  

•  required:
  

•    - clock-names
  

•    - clocks
  

IIUC, all variants require now clocks, so these two lines should be part of top level "required:".

• • if:

•  properties:
  

•    compatible:
  

•      contains:
  

•        const: qcom,sm8250-lpass-va-macro
  

• then:

•  properties:
  

•    clocks:
  

•      minItems: 3
  

•      maxItems: 3
  

•    clock-names:
  

•      items:
  

•        - const: mclk
  

•        - const: core
  

•        - const: dcodec
  

•  required:
  

•    - clock-names
  

•    - clocks
  

• • if:

•  properties:
  

•    compatible:
  

•      contains:
  

•        enum:
  

•          - qcom,sc8280xp-lpass-va-macro
  

•          - qcom,sm8450-lpass-va-macro
  

• then:

•  properties:
  

•    clocks:
  

•      minItems: 4
  

•      maxItems: 4
  

•    clock-names:
  

•      items:
  

•        - const: mclk
  

•        - const: npl
  

How about making it the last clock so the order matches with sm8250?

Best regards, Krzysztof

Thanks Krzysztof,

On 15/11/2022 14:23, Krzysztof Kozlowski wrote:

On 15/11/2022 11:55, Srinivas Kandagatla wrote:

...

New versions of VA Macro has soundwire integrated, so handle the soundwire npl clock correctly in the codec driver.

Signed-off-by: Srinivas Kandagatla srinivas.kandagatla@linaro.org

sound/soc/codecs/lpass-va-macro.c | 41 +++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+)

diff --git a/sound/soc/codecs/lpass-va-macro.c b/sound/soc/codecs/lpass-va-macro.c index b0b6cf29cba3..d59af6d69c34 100644 --- a/sound/soc/codecs/lpass-va-macro.c +++ b/sound/soc/codecs/lpass-va-macro.c @@ -205,6 +205,7 @@ struct va_macro { int dec_mode[VA_MACRO_NUM_DECIMATORS]; struct regmap *regmap; struct clk *mclk;

• struct clk *npl; struct clk *macro; struct clk *dcodec; struct clk *fsgen;

@@ -1332,6 +1333,9 @@ static int fsgen_gate_enable(struct clk_hw *hw) struct regmap *regmap = va->regmap; int ret;

• if (va->has_swr_master)

• clk_prepare_enable(va->mclk);
  

No error path?

that is true, i missed this indeed, sending v2 with this and other ret = PTR_ERR(va->npl) change.

--srini

...

• ret = va_macro_mclk_enable(va, true); if (!va->has_swr_master) return ret;

@@ -1358,6 +1362,8 @@ static void fsgen_gate_disable(struct clk_hw *hw) CDC_VA_SWR_CLK_EN_MASK, 0x0);

va_macro_mclk_enable(va, false);

• if (va->has_swr_master)

• clk_disable_unprepare(va->mclk);
  

  }

  static int fsgen_gate_is_enabled(struct clk_hw *hw)

@@ -1386,6 +1392,9 @@ static int va_macro_register_fsgen_output(struct va_macro *va) struct clk_init_data init; int ret;

• if (va->has_swr_master)

• parent = va->npl;
  

• parent_clk_name = __clk_get_name(parent);

  of_property_read_string(np, "clock-output-names", &clk_name);

@@ -1512,6 +1521,14 @@ static int va_macro_probe(struct platform_device *pdev) /* mclk rate */ clk_set_rate(va->mclk, 2 * VA_MACRO_MCLK_FREQ);

• if (va->has_swr_master) {

• va->npl = devm_clk_get(dev, "npl");
  

I think you miss: ret = PTR_ERR(va->npl);

...

• if (IS_ERR(va->npl))
  

• 	goto err;
  

• clk_set_rate(va->npl, 2 * VA_MACRO_MCLK_FREQ);
  

• }
• ret = clk_prepare_enable(va->macro); if (ret) goto err;

Best regards, Krzysztof