[PATCH v1 0/3] Add TDM audio on StarFive JH7110
This patchset adds TDM audio driver for the StarFive JH7110 SoC. The first patch adds device tree binding for TDM module. The second patch adds tdm driver support for JH7110 SoC. The last patch adds device node of tdm and sound card to JH7110 dts.
The series has been tested on the VisionFive 2 boards which equip with JH7110 SoC and works normally.
The last patch should be applied after the following patchset: https://lore.kernel.org/all/20230322094820.24738-1-walker.chen@starfivetech....
Walker Chen (3): dt-bindings: sound: Add TDM for StarFive JH7110 ASoC: starfive: Add JH7110 TDM driver riscv: dts: starfive: add tdm node and sound card
.../bindings/sound/starfive,jh7110-tdm.yaml | 95 +++ MAINTAINERS | 6 + .../jh7110-starfive-visionfive-2.dtsi | 87 +++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 34 + sound/soc/Kconfig | 1 + sound/soc/Makefile | 1 + sound/soc/starfive/Kconfig | 15 + sound/soc/starfive/Makefile | 2 + sound/soc/starfive/jh7110_tdm.c | 579 ++++++++++++++++++ sound/soc/starfive/jh7110_tdm.h | 155 +++++ 10 files changed, 975 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml create mode 100644 sound/soc/starfive/Kconfig create mode 100644 sound/soc/starfive/Makefile create mode 100644 sound/soc/starfive/jh7110_tdm.c create mode 100644 sound/soc/starfive/jh7110_tdm.h
base-commit: fe15c26ee26efa11741a7b632e9f23b01aca4cc6 prerequisite-patch-id: c3a6b87df79b338fc97766406d010fedb79ab428 prerequisite-patch-id: b49509523cf7c098f684647bdc4fdaece48b61bc prerequisite-patch-id: 46cc850aa0e9e03ccf5ed23d8458babfca3d71af prerequisite-patch-id: a6975e61ee5803fbd74b1c21ab925fd81c3c0eab prerequisite-patch-id: ac150a8c622e858e088df8121093d448df49c245 prerequisite-patch-id: 044263ef2fb9f1e5a586edbf85d5f67814a28430 prerequisite-patch-id: 89f049f951e5acf75aab92541992f816fd0acc0d prerequisite-patch-id: 9f3dbc9073eee89134e68977e941e457593c2757 prerequisite-patch-id: 8600b156a235be2b3db53be3f834e7a370e2cfb9 prerequisite-patch-id: 1b2d0982b18da060c82134f05bf3ce16425bac8d prerequisite-patch-id: 090ba4b78d47bc19204916e76fdbc70021785388 prerequisite-patch-id: a5d9e0f7d4f8163f566678894cf693015119f2d9 prerequisite-patch-id: 4c12d958e3a3d629d86dddb1e4f099d8909393e0 prerequisite-patch-id: bb939c0c7c26b08addfccd890f9d3974b6eaec53 prerequisite-patch-id: 8f5c66dfb14403424044192f6fa05b347ad356a7 prerequisite-patch-id: fd93763b95469912bde9bdfa4cd827c8d5dba9c6 prerequisite-patch-id: 6987950c2eb4b3773b2df8f7934eff434244aeab prerequisite-patch-id: 258ea5f9b8bf41b6981345dcc81795f25865d38f prerequisite-patch-id: 8b6f2c9660c0ac0ee4e73e4c21aca8e6b75e81b9 prerequisite-patch-id: dbb0c0151b8bdf093e6ce79fd2fe3f60791a6e0b prerequisite-patch-id: e7773c977a7b37692e9792b21cc4f17fa58f9215 prerequisite-patch-id: d57e95d31686772abc4c4d5aa1cadc344dc293cd prerequisite-patch-id: 9f911969d0a550648493952c99096d26e05d4d83 prerequisite-patch-id: 2ddada18ab6ea5cd1da14212aaf59632f5203d40 prerequisite-patch-id: 398744c61913c76a35754de867c4f820ca7a8d99 prerequisite-patch-id: be3d7a6a13098884ec26cd5e543cc95c39045e35 prerequisite-patch-id: b3ce7955a80d90d992b7d1bca3409f465810b2bb prerequisite-patch-id: db2f66860cc5b2fd2f71747c4428287b6e3153fb prerequisite-patch-id: 9da71dcd3af4c68da9d855b43aab6927103e7525 prerequisite-patch-id: 2d9e4f185631549094b6136cf8717a507b68c5bb prerequisite-patch-id: bb8e071ed43998874b9d98292c0dcdeedc0760ca prerequisite-patch-id: cd0b464336aabfbfad96c1a3595c0f9ce9401638 prerequisite-patch-id: 24eab3d30274700c2be4727bece743c76d2618bd prerequisite-patch-id: 584c256c9acb52ee2773d0c81c3f4977fc18155a prerequisite-patch-id: 2bc43b375b470f7e8bbe937b78678ba3856e3b8f prerequisite-patch-id: 32deea16304859842af5c2151bc41d91cf6dfc9b prerequisite-patch-id: d85dbedbb3b36bbd6806f4eb84a2129c8f8963aa prerequisite-patch-id: c0bdbdd3db98f7ebae0661dd331edac2c84c70f8 prerequisite-patch-id: 6abf359fa445f4104432ddee27044dfbfb128417
Add bindings to describe the TDM driver for the StarFive JH7110 SoC.
Signed-off-by: Walker Chen walker.chen@starfivetech.com --- .../bindings/sound/starfive,jh7110-tdm.yaml | 95 +++++++++++++++++++ 1 file changed, 95 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml
diff --git a/Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml b/Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml new file mode 100644 index 000000000000..d65b9ed781ef --- /dev/null +++ b/Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml @@ -0,0 +1,95 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/starfive,jh7110-tdm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: StarFive JH7110 TDM Controller + +description: | + The TDM Controller is a Time Division Multiplexed audio interface + integrated in StarFive JH7110 SoC, allowing up to 8 channels of + audio over a serial interface. The TDM controller can operate both + in master and slave mode. + +maintainers: + - Walker Chen walker.chen@starfivetech.com + +properties: + compatible: + enum: + - starfive,jh7110-tdm + + reg: + maxItems: 1 + + clocks: + items: + - description: TDM AHB Clock + - description: TDM APB Clock + - description: TDM Internal Clock + - description: TDM Clock + - description: Inner MCLK + - description: TDM External Clock + + clock-names: + items: + - const: tdm_ahb + - const: tdm_apb + - const: tdm_internal + - const: tdm + - const: mclk_inner + - const: tdm_ext + + resets: + items: + - description: tdm ahb reset line + - description: tdm apb reset line + - description: tdm core reset line + + dmas: + items: + - description: RX DMA Channel + - description: TX DMA Channel + + dma-names: + items: + - const: rx + - const: tx + + "#sound-dai-cells": + const: 0 + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - dmas + - dma-names + - "#sound-dai-cells" + +additionalProperties: false + +examples: + - | + tdm: tdm@10090000 { + compatible = "starfive,jh7110-tdm"; + reg = <0x10090000 0x1000>; + clocks = <&syscrg 184>, + <&syscrg 185>, + <&syscrg 186>, + <&syscrg 187>, + <&syscrg 17>, + <&tdm_ext>; + clock-names = "tdm_ahb", "tdm_apb", + "tdm_internal", "tdm", + "mclk_inner", "tdm_ext"; + resets = <&syscrg 105>, + <&syscrg 107>, + <&syscrg 106>; + dmas = <&dma 20>, <&dma 21>; + dma-names = "rx","tx"; + #sound-dai-cells = <0>; + };
On 29/03/2023 17:33, Walker Chen wrote:
Add bindings to describe the TDM driver for the StarFive JH7110 SoC.
Signed-off-by: Walker Chen walker.chen@starfivetech.com
.../bindings/sound/starfive,jh7110-tdm.yaml | 95 +++++++++++++++++++ 1 file changed, 95 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml
diff --git a/Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml b/Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml new file mode 100644 index 000000000000..d65b9ed781ef --- /dev/null +++ b/Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml @@ -0,0 +1,95 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/starfive,jh7110-tdm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml#
+title: StarFive JH7110 TDM Controller
+description: |
- The TDM Controller is a Time Division Multiplexed audio interface
- integrated in StarFive JH7110 SoC, allowing up to 8 channels of
- audio over a serial interface. The TDM controller can operate both
- in master and slave mode.
+maintainers:
- Walker Chen walker.chen@starfivetech.com
Missing allOf: with $ref to dai-common.
+properties:
- compatible:
- enum:
- starfive,jh7110-tdm
- reg:
- maxItems: 1
(...)
+required:
- compatible
- reg
- clocks
- clock-names
- resets
- dmas
- dma-names
- "#sound-dai-cells"
+additionalProperties: false
+examples:
- |
- tdm: tdm@10090000 {
Drop tdm label, not used.
Best regards, Krzysztof
On 2023/3/30 15:39, Krzysztof Kozlowski wrote:
On 29/03/2023 17:33, Walker Chen wrote:
Add bindings to describe the TDM driver for the StarFive JH7110 SoC.
Signed-off-by: Walker Chen walker.chen@starfivetech.com
.../bindings/sound/starfive,jh7110-tdm.yaml | 95 +++++++++++++++++++ 1 file changed, 95 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml
diff --git a/Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml b/Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml new file mode 100644 index 000000000000..d65b9ed781ef --- /dev/null +++ b/Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml @@ -0,0 +1,95 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/starfive,jh7110-tdm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml#
+title: StarFive JH7110 TDM Controller
+description: |
- The TDM Controller is a Time Division Multiplexed audio interface
- integrated in StarFive JH7110 SoC, allowing up to 8 channels of
- audio over a serial interface. The TDM controller can operate both
- in master and slave mode.
+maintainers:
- Walker Chen walker.chen@starfivetech.com
Missing allOf: with $ref to dai-common.
Indeed missing allOf, thank you for kind reminding.
+properties:
- compatible:
- enum:
- starfive,jh7110-tdm
- reg:
- maxItems: 1
(...)
+required:
- compatible
- reg
- clocks
- clock-names
- resets
- dmas
- dma-names
- "#sound-dai-cells"
+additionalProperties: false
+examples:
- |
- tdm: tdm@10090000 {
Drop tdm label, not used.
Ok, will drop it.
Best regards, Walker
Add tdm driver support for the StarFive JH7110 SoC.
Signed-off-by: Walker Chen walker.chen@starfivetech.com --- MAINTAINERS | 6 + sound/soc/Kconfig | 1 + sound/soc/Makefile | 1 + sound/soc/starfive/Kconfig | 15 + sound/soc/starfive/Makefile | 2 + sound/soc/starfive/jh7110_tdm.c | 579 ++++++++++++++++++++++++++++++++ sound/soc/starfive/jh7110_tdm.h | 155 +++++++++ 7 files changed, 759 insertions(+) create mode 100644 sound/soc/starfive/Kconfig create mode 100644 sound/soc/starfive/Makefile create mode 100644 sound/soc/starfive/jh7110_tdm.c create mode 100644 sound/soc/starfive/jh7110_tdm.h
diff --git a/MAINTAINERS b/MAINTAINERS index 958b7ec118b4..ddf47c9a7020 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19952,6 +19952,12 @@ F: Documentation/devicetree/bindings/power/starfive* F: drivers/soc/starfive/jh71xx_pmu.c F: include/dt-bindings/power/starfive,jh7110-pmu.h
+STARFIVE JH7110 TDM DRIVERS +M: Walker Chen walker.chen@starfivetech.com +S: Maintained +F: Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml +F: sound/soc/starfive/jh7110-tdm.* + STARFIVE SOC DRIVERS M: Conor Dooley conor@kernel.org S: Maintained diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig index 848fbae26c3b..8d1d9401ecf2 100644 --- a/sound/soc/Kconfig +++ b/sound/soc/Kconfig @@ -91,6 +91,7 @@ source "sound/soc/sh/Kconfig" source "sound/soc/sof/Kconfig" source "sound/soc/spear/Kconfig" source "sound/soc/sprd/Kconfig" +source "sound/soc/starfive/Kconfig" source "sound/soc/sti/Kconfig" source "sound/soc/stm/Kconfig" source "sound/soc/sunxi/Kconfig" diff --git a/sound/soc/Makefile b/sound/soc/Makefile index 507eaed1d6a1..65aeb4ef4068 100644 --- a/sound/soc/Makefile +++ b/sound/soc/Makefile @@ -59,6 +59,7 @@ obj-$(CONFIG_SND_SOC) += sh/ obj-$(CONFIG_SND_SOC) += sof/ obj-$(CONFIG_SND_SOC) += spear/ obj-$(CONFIG_SND_SOC) += sprd/ +obj-$(CONFIG_SND_SOC) += starfive/ obj-$(CONFIG_SND_SOC) += sti/ obj-$(CONFIG_SND_SOC) += stm/ obj-$(CONFIG_SND_SOC) += sunxi/ diff --git a/sound/soc/starfive/Kconfig b/sound/soc/starfive/Kconfig new file mode 100644 index 000000000000..737c956f7b93 --- /dev/null +++ b/sound/soc/starfive/Kconfig @@ -0,0 +1,15 @@ +# SPDX-License-Identifier: GPL-2.0-only +config SND_SOC_STARFIVE + tristate "Audio support for StarFive SoC" + depends on COMPILE_TEST || SOC_STARFIVE + help + Say Y or M if you want to add support for codecs attached to + the Starfive SoCs' Audio interfaces. You will also need to + select the audio interfaces to support below. + +config SND_SOC_JH7110_TDM + tristate "JH7110 TDM device driver" + depends on HAVE_CLK && SND_SOC_STARFIVE + select SND_SOC_GENERIC_DMAENGINE_PCM + help + Say Y or M if you want to add support for StarFive TDM driver. diff --git a/sound/soc/starfive/Makefile b/sound/soc/starfive/Makefile new file mode 100644 index 000000000000..f7d960211d72 --- /dev/null +++ b/sound/soc/starfive/Makefile @@ -0,0 +1,2 @@ +# StarFive Platform Support +obj-$(CONFIG_SND_SOC_JH7110_TDM) += jh7110_tdm.o diff --git a/sound/soc/starfive/jh7110_tdm.c b/sound/soc/starfive/jh7110_tdm.c new file mode 100644 index 000000000000..669202689eb9 --- /dev/null +++ b/sound/soc/starfive/jh7110_tdm.c @@ -0,0 +1,579 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * TDM driver for the StarFive JH7110 SoC + * + * Copyright (C) 2023 StarFive Technology Co., Ltd. + */ + +#include <linux/clk.h> +#include <linux/device.h> +#include <linux/module.h> +#include <linux/of_irq.h> +#include <linux/of_platform.h> +#include <linux/pm_runtime.h> +#include <linux/regmap.h> +#include <linux/reset.h> +#include <sound/initval.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/soc-dai.h> +#include "jh7110_tdm.h" + +static inline u32 jh7110_tdm_readl(struct jh7110_tdm_dev *tdm, u16 reg) +{ + return readl_relaxed(tdm->tdm_base + reg); +} + +static inline void jh7110_tdm_writel(struct jh7110_tdm_dev *tdm, u16 reg, u32 val) +{ + writel_relaxed(val, tdm->tdm_base + reg); +} + +static void jh7110_tdm_save_context(struct jh7110_tdm_dev *tdm, + struct snd_pcm_substream *substream) +{ + tdm->saved_pcmgbcr = jh7110_tdm_readl(tdm, TDM_PCMGBCR); + tdm->saved_pcmdiv = jh7110_tdm_readl(tdm, TDM_PCMDIV); + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + tdm->saved_pcmtxcr = jh7110_tdm_readl(tdm, TDM_PCMTXCR); + else + tdm->saved_pcmrxcr = jh7110_tdm_readl(tdm, TDM_PCMRXCR); +} + +static void jh7110_tdm_start(struct jh7110_tdm_dev *tdm, struct snd_pcm_substream *substream) +{ + u32 data; + unsigned int val; + + data = jh7110_tdm_readl(tdm, TDM_PCMGBCR); + jh7110_tdm_writel(tdm, TDM_PCMGBCR, data | PCMGBCR_ENABLE); + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + val = jh7110_tdm_readl(tdm, TDM_PCMTXCR); + jh7110_tdm_writel(tdm, TDM_PCMTXCR, val | PCMTXCR_TXEN); + } else { + val = jh7110_tdm_readl(tdm, TDM_PCMRXCR); + jh7110_tdm_writel(tdm, TDM_PCMRXCR, val | PCMRXCR_RXEN); + } +} + +static void jh7110_tdm_stop(struct jh7110_tdm_dev *tdm, struct snd_pcm_substream *substream) +{ + unsigned int val; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + val = jh7110_tdm_readl(tdm, TDM_PCMTXCR); + val &= ~PCMTXCR_TXEN; + jh7110_tdm_writel(tdm, TDM_PCMTXCR, val); + } else { + val = jh7110_tdm_readl(tdm, TDM_PCMRXCR); + val &= ~PCMRXCR_RXEN; + jh7110_tdm_writel(tdm, TDM_PCMRXCR, val); + } +} + +static int jh7110_tdm_syncdiv(struct jh7110_tdm_dev *tdm) +{ + u32 sl, sscale, syncdiv; + + sl = (tdm->rx.sl >= tdm->tx.sl) ? tdm->rx.sl : tdm->tx.sl; + sscale = (tdm->rx.sscale >= tdm->tx.sscale) ? tdm->rx.sscale : tdm->tx.sscale; + syncdiv = tdm->pcmclk / tdm->samplerate - 1; + + if ((syncdiv + 1) < (sl * sscale)) { + dev_err(tdm->dev, "Failed to set syncdiv!\n"); + return -EINVAL; + } + + if (tdm->syncm == TDM_SYNCM_LONG && + (tdm->rx.sscale <= 1 || tdm->tx.sscale <= 1)) { + if ((syncdiv + 1) <= sl) { + dev_err(tdm->dev, "Wrong syncdiv! It must be (syncdiv+1) > max[tx.sl, rx.sl]\n"); + return -EINVAL; + } + } + + jh7110_tdm_writel(tdm, TDM_PCMDIV, syncdiv); + return 0; +} + +static void jh7110_tdm_control(struct jh7110_tdm_dev *tdm) +{ + u32 data; + + data = (tdm->clkpolity << CLKPOL_BIT) | + (tdm->elm << ELM_BIT) | + (tdm->syncm << SYNCM_BIT) | + (tdm->ms_mode << MS_BIT); + jh7110_tdm_writel(tdm, TDM_PCMGBCR, data); +} + +static void jh7110_tdm_config(struct jh7110_tdm_dev *tdm, + struct snd_pcm_substream *substream) +{ + u32 datarx, datatx; + + jh7110_tdm_control(tdm); + jh7110_tdm_syncdiv(tdm); + + datarx = (tdm->rx.ifl << IFL_BIT) | + (tdm->rx.wl << WL_BIT) | + (tdm->rx.sscale << SSCALE_BIT) | + (tdm->rx.sl << SL_BIT) | + (tdm->rx.lrj << LRJ_BIT); + + datatx = (tdm->tx.ifl << IFL_BIT) | + (tdm->tx.wl << WL_BIT) | + (tdm->tx.sscale << SSCALE_BIT) | + (tdm->tx.sl << SL_BIT) | + (tdm->tx.lrj << LRJ_BIT); + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + jh7110_tdm_writel(tdm, TDM_PCMTXCR, datatx); + else + jh7110_tdm_writel(tdm, TDM_PCMRXCR, datarx); +} + +static void jh7110_tdm_clk_disable(struct jh7110_tdm_dev *tdm) +{ + clk_disable_unprepare(tdm->clk_tdm); + clk_disable_unprepare(tdm->clk_tdm_ext); + clk_disable_unprepare(tdm->clk_tdm_internal); + clk_disable_unprepare(tdm->clk_tdm_apb); + clk_disable_unprepare(tdm->clk_tdm_ahb); + clk_disable_unprepare(tdm->clk_mclk_inner); +} + +static int jh7110_tdm_clk_enable(struct jh7110_tdm_dev *tdm) +{ + int ret; + + ret = clk_prepare_enable(tdm->clk_mclk_inner); + if (ret) { + dev_err(tdm->dev, "failed to prepare enable clk_mclk_inner\n"); + return ret; + } + + ret = clk_prepare_enable(tdm->clk_tdm_ahb); + if (ret) { + dev_err(tdm->dev, "Failed to prepare enable clk_tdm_ahb\n"); + goto dis_mclk_inner_clk; + } + + ret = clk_prepare_enable(tdm->clk_tdm_apb); + if (ret) { + dev_err(tdm->dev, "Failed to prepare enable clk_tdm_apb\n"); + goto dis_tdm_ahb_clk; + } + + ret = clk_prepare_enable(tdm->clk_tdm_internal); + if (ret) { + dev_err(tdm->dev, "Failed to prepare enable clk_tdm_intl\n"); + goto dis_tdm_apb_clk; + } + + ret = clk_prepare_enable(tdm->clk_tdm_ext); + if (ret) { + dev_err(tdm->dev, "Failed to prepare enable clk_tdm_ext\n"); + goto dis_tdm_internal_clk; + } + + ret = clk_prepare_enable(tdm->clk_tdm); + if (ret) { + dev_err(tdm->dev, "Failed to prepare enable clk_tdm\n"); + goto dis_tdm_ext_clk; + } + + ret = reset_control_deassert(tdm->resets); + if (ret) { + dev_err(tdm->dev, "%s: failed to deassert tdm resets\n", __func__); + goto dis_tdm_clk; + } + + ret = clk_set_parent(tdm->clk_tdm, tdm->clk_tdm_ext); + if (ret) { + dev_err(tdm->dev, "Can't set clock source for clk_tdm: %d\n", ret); + goto dis_tdm_clk; + } + return 0; + +dis_tdm_clk: + clk_disable_unprepare(tdm->clk_tdm); +dis_tdm_ext_clk: + clk_disable_unprepare(tdm->clk_tdm_ext); +dis_tdm_internal_clk: + clk_disable_unprepare(tdm->clk_tdm_internal); +dis_tdm_apb_clk: + clk_disable_unprepare(tdm->clk_tdm_apb); +dis_tdm_ahb_clk: + clk_disable_unprepare(tdm->clk_tdm_ahb); +dis_mclk_inner_clk: + clk_disable_unprepare(tdm->clk_mclk_inner); + + return ret; +} + +#ifdef CONFIG_PM +static int jh7110_tdm_runtime_suspend(struct device *dev) +{ + struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev); + + jh7110_tdm_clk_disable(tdm); + + return 0; +} + +static int jh7110_tdm_runtime_resume(struct device *dev) +{ + struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev); + + return jh7110_tdm_clk_enable(tdm); +} +#endif + +#ifdef CONFIG_PM_SLEEP +static int jh7110_tdm_suspend(struct snd_soc_component *component) +{ + return pm_runtime_force_suspend(component->dev); +} + +static int jh7110_tdm_resume(struct snd_soc_component *component) +{ + struct jh7110_tdm_dev *tdm = snd_soc_component_get_drvdata(component); + + /* restore context */ + jh7110_tdm_writel(tdm, TDM_PCMGBCR, tdm->saved_pcmgbcr); + jh7110_tdm_writel(tdm, TDM_PCMDIV, tdm->saved_pcmdiv); + + return pm_runtime_force_resume(component->dev); +} + +#else +#define jh7110_tdm_suspend NULL +#define jh7110_tdm_resume NULL +#endif + +static const struct snd_soc_component_driver jh7110_tdm_component = { + .name = "jh7110-tdm", + .suspend = jh7110_tdm_suspend, + .resume = jh7110_tdm_resume, +}; + +static int jh7110_tdm_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai); + int chan_wl, chan_sl, chan_nr; + unsigned int data_width; + unsigned int dma_bus_width; + struct snd_dmaengine_dai_dma_data *dma_data = NULL; + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); + struct snd_soc_dai_link *dai_link = rtd->dai_link; + + dai_link->stop_dma_first = 1; + + data_width = params_width(params); + + tdm->samplerate = params_rate(params); + tdm->pcmclk = params_channels(params) * tdm->samplerate * data_width; + + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + chan_wl = TDM_16BIT_WORD_LEN; + chan_sl = TDM_16BIT_SLOT_LEN; + dma_bus_width = DMA_SLAVE_BUSWIDTH_2_BYTES; + break; + + case SNDRV_PCM_FORMAT_S32_LE: + chan_wl = TDM_32BIT_WORD_LEN; + chan_sl = TDM_32BIT_SLOT_LEN; + dma_bus_width = DMA_SLAVE_BUSWIDTH_4_BYTES; + break; + + default: + dev_err(tdm->dev, "tdm: unsupported PCM fmt"); + return -EINVAL; + } + + chan_nr = params_channels(params); + switch (chan_nr) { + case ONE_CHANNEL_SUPPORT: + case TWO_CHANNEL_SUPPORT: + case FOUR_CHANNEL_SUPPORT: + case SIX_CHANNEL_SUPPORT: + case EIGHT_CHANNEL_SUPPORT: + break; + default: + dev_err(tdm->dev, "channel not supported\n"); + return -EINVAL; + } + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + tdm->tx.wl = chan_wl; + tdm->tx.sl = chan_sl; + tdm->tx.sscale = chan_nr; + tdm->play_dma_data.addr_width = dma_bus_width; + dma_data = &tdm->play_dma_data; + } else { + tdm->rx.wl = chan_wl; + tdm->rx.sl = chan_sl; + tdm->rx.sscale = chan_nr; + tdm->capture_dma_data.addr_width = dma_bus_width; + dma_data = &tdm->capture_dma_data; + } + + snd_soc_dai_set_dma_data(dai, substream, dma_data); + + jh7110_tdm_config(tdm, substream); + jh7110_tdm_save_context(tdm, substream); + + return 0; +} + +static int jh7110_tdm_trigger(struct snd_pcm_substream *substream, + int cmd, struct snd_soc_dai *dai) +{ + struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai); + int ret = 0; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + /* restore context */ + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + jh7110_tdm_writel(tdm, TDM_PCMTXCR, tdm->saved_pcmtxcr); + else + jh7110_tdm_writel(tdm, TDM_PCMRXCR, tdm->saved_pcmrxcr); + + jh7110_tdm_start(tdm, substream); + break; + + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + jh7110_tdm_stop(tdm, substream); + break; + default: + ret = -EINVAL; + break; + } + return ret; +} + +static const struct snd_soc_dai_ops jh7110_tdm_dai_ops = { + .hw_params = jh7110_tdm_hw_params, + .trigger = jh7110_tdm_trigger, +}; + +static int jh7110_tdm_dai_probe(struct snd_soc_dai *dai) +{ + struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai); + + snd_soc_dai_init_dma_data(dai, &tdm->play_dma_data, &tdm->capture_dma_data); + snd_soc_dai_set_drvdata(dai, tdm); + return 0; +} + +#define JH7110_TDM_RATES SNDRV_PCM_RATE_8000_48000 + +#define JH7110_TDM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ + SNDRV_PCM_FMTBIT_S32_LE) + +static struct snd_soc_dai_driver jh7110_tdm_dai = { + .name = "sf_tdm", + .id = 0, + .playback = { + .stream_name = "Playback", + .channels_min = 1, + .channels_max = 8, + .rates = JH7110_TDM_RATES, + .formats = JH7110_TDM_FORMATS, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 8, + .rates = JH7110_TDM_RATES, + .formats = JH7110_TDM_FORMATS, + }, + .ops = &jh7110_tdm_dai_ops, + .probe = jh7110_tdm_dai_probe, + .symmetric_rate = 1, +}; + +static const struct snd_pcm_hardware jh7110_pcm_hardware = { + .info = (SNDRV_PCM_INFO_MMAP | + SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_PAUSE | + SNDRV_PCM_INFO_RESUME | + SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_BLOCK_TRANSFER), + .buffer_bytes_max = 192512, + .period_bytes_min = 4096, + .period_bytes_max = 32768, + .periods_min = 1, + .periods_max = 48, + .fifo_size = 16, +}; + +static const struct snd_dmaengine_pcm_config jh7110_dmaengine_pcm_config = { + .pcm_hardware = &jh7110_pcm_hardware, + .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config, + .prealloc_buffer_size = 192512, +}; + +static void jh7110_tdm_init_params(struct jh7110_tdm_dev *tdm) +{ + tdm->clkpolity = TDM_TX_RASING_RX_FALLING; + if (tdm->frame_mode == SHORT_LATER) { + tdm->elm = TDM_ELM_LATE; + tdm->syncm = TDM_SYNCM_SHORT; + } else if (tdm->frame_mode == SHORT_EARLY) { + tdm->elm = TDM_ELM_EARLY; + tdm->syncm = TDM_SYNCM_SHORT; + } else { + tdm->elm = TDM_ELM_EARLY; + tdm->syncm = TDM_SYNCM_LONG; + } + + tdm->ms_mode = TDM_AS_SLAVE; + tdm->rx.ifl = TDM_FIFO_HALF; + tdm->tx.ifl = TDM_FIFO_HALF; + tdm->rx.wl = TDM_16BIT_WORD_LEN; + tdm->tx.wl = TDM_16BIT_WORD_LEN; + tdm->rx.sscale = 2; + tdm->tx.sscale = 2; + tdm->rx.lrj = TDM_LEFT_JUSTIFT; + tdm->tx.lrj = TDM_LEFT_JUSTIFT; + + tdm->play_dma_data.addr = TDM_FIFO; + tdm->play_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; + tdm->play_dma_data.fifo_size = TDM_FIFO_DEPTH / 2; + tdm->play_dma_data.maxburst = 16; + + tdm->capture_dma_data.addr = TDM_FIFO; + tdm->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; + tdm->capture_dma_data.fifo_size = TDM_FIFO_DEPTH / 2; + tdm->capture_dma_data.maxburst = 8; +} + +static int jh7110_tdm_clk_reset_init(struct platform_device *pdev, + struct jh7110_tdm_dev *tdm) +{ + int ret; + + static struct clk_bulk_data clks[] = { + { .id = "tdm_ahb" }, + { .id = "tdm_apb" }, + { .id = "tdm_internal" }, + { .id = "tdm" }, + { .id = "mclk_inner" }, + { .id = "tdm_ext" }, + }; + + ret = devm_clk_bulk_get(&pdev->dev, ARRAY_SIZE(clks), clks); + if (ret) { + dev_err(&pdev->dev, "Failed to get tdm clocks\n"); + return ret; + } + + tdm->clk_tdm_ahb = clks[0].clk; + tdm->clk_tdm_apb = clks[1].clk; + tdm->clk_tdm_internal = clks[2].clk; + tdm->clk_tdm = clks[3].clk; + tdm->clk_mclk_inner = clks[4].clk; + tdm->clk_tdm_ext = clks[5].clk; + + tdm->resets = devm_reset_control_array_get_exclusive(&pdev->dev); + if (IS_ERR(tdm->resets)) { + ret = PTR_ERR(tdm->resets); + dev_err(&pdev->dev, "Failed to get tdm resets"); + return ret; + } + + return jh7110_tdm_clk_enable(tdm); +} + +static int jh7110_tdm_probe(struct platform_device *pdev) +{ + struct jh7110_tdm_dev *tdm; + int ret; + + tdm = devm_kzalloc(&pdev->dev, sizeof(*tdm), GFP_KERNEL); + if (!tdm) + return -ENOMEM; + + tdm->tdm_base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(tdm->tdm_base)) + return PTR_ERR(tdm->tdm_base); + + tdm->dev = &pdev->dev; + + ret = jh7110_tdm_clk_reset_init(pdev, tdm); + if (ret) { + dev_err(&pdev->dev, "Failed to enable audio-tdm clock\n"); + return ret; + } + + tdm->frame_mode = SHORT_LATER; + jh7110_tdm_init_params(tdm); + + dev_set_drvdata(&pdev->dev, tdm); + ret = devm_snd_soc_register_component(&pdev->dev, &jh7110_tdm_component, + &jh7110_tdm_dai, 1); + if (ret != 0) { + dev_err(&pdev->dev, "Failed to register dai\n"); + return ret; + } + + ret = devm_snd_dmaengine_pcm_register(&pdev->dev, + &jh7110_dmaengine_pcm_config, + SND_DMAENGINE_PCM_FLAG_COMPAT); + if (ret) { + dev_err(&pdev->dev, "Could not register pcm: %d\n", ret); + return ret; + } + + pm_runtime_enable(&pdev->dev); +#ifdef CONFIG_PM + jh7110_tdm_clk_disable(tdm); +#endif + + return 0; +} + +static int jh7110_tdm_dev_remove(struct platform_device *pdev) +{ + pm_runtime_disable(&pdev->dev); + return 0; +} + +static const struct of_device_id jh7110_tdm_of_match[] = { + {.compatible = "starfive,jh7110-tdm",}, + {} +}; + +MODULE_DEVICE_TABLE(of, jh7110_tdm_of_match); + +static const struct dev_pm_ops jh7110_tdm_pm_ops = { + SET_RUNTIME_PM_OPS(jh7110_tdm_runtime_suspend, + jh7110_tdm_runtime_resume, NULL) +}; + +static struct platform_driver jh7110_tdm_driver = { + .driver = { + .name = "jh7110-tdm", + .of_match_table = jh7110_tdm_of_match, + .pm = &jh7110_tdm_pm_ops, + }, + .probe = jh7110_tdm_probe, + .remove = jh7110_tdm_dev_remove, +}; +module_platform_driver(jh7110_tdm_driver); + +MODULE_AUTHOR("Walker Chen walker.chen@starfivetech.com"); +MODULE_DESCRIPTION("StarFive JH7110 TDM ASoC Driver"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/starfive/jh7110_tdm.h b/sound/soc/starfive/jh7110_tdm.h new file mode 100644 index 000000000000..aa4ab3624319 --- /dev/null +++ b/sound/soc/starfive/jh7110_tdm.h @@ -0,0 +1,155 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * TDM driver for the StarFive JH7110 SoC + * + * Copyright (C) 2023 StarFive Technology Co., Ltd. + */ +#ifndef __SND_SOC_STARFIVE_TDM_H +#define __SND_SOC_STARFIVE_TDM_H + +#include <linux/clk.h> +#include <linux/device.h> +#include <linux/types.h> +#include <sound/dmaengine_pcm.h> +#include <sound/pcm.h> +#include <linux/dmaengine.h> +#include <linux/types.h> + +#define TDM_PCMGBCR 0x00 + #define PCMGBCR_MASK 0x1e + #define PCMGBCR_ENABLE BIT(0) + #define PCMGBCR_TRITXEN BIT(4) + #define CLKPOL_BIT 5 + #define TRITXEN_BIT 4 + #define ELM_BIT 3 + #define SYNCM_BIT 2 + #define MS_BIT 1 +#define TDM_PCMTXCR 0x04 + #define PCMTXCR_TXEN BIT(0) + #define IFL_BIT 11 + #define WL_BIT 8 + #define SSCALE_BIT 4 + #define SL_BIT 2 + #define LRJ_BIT 1 +#define TDM_PCMRXCR 0x08 + #define PCMRXCR_RXEN BIT(0) + #define PCMRXCR_RXSL_MASK 0xc + #define PCMRXCR_RXSL_16BIT 0x4 + #define PCMRXCR_RXSL_32BIT 0x8 + #define PCMRXCR_SCALE_MASK 0xf0 + #define PCMRXCR_SCALE_1CH 0x10 +#define TDM_PCMDIV 0x0c + +/* DMA registers */ +#define TDM_FIFO 0x170c0000 +#define TDM_FIFO_DEPTH 32 + +#define ONE_CHANNEL_SUPPORT 1 +#define TWO_CHANNEL_SUPPORT 2 +#define FOUR_CHANNEL_SUPPORT 4 +#define SIX_CHANNEL_SUPPORT 6 +#define EIGHT_CHANNEL_SUPPORT 8 + +enum TDM_MASTER_SLAVE_MODE { + TDM_AS_MASTER = 0, + TDM_AS_SLAVE, +}; + +enum TDM_CLKPOL { + /* tx raising and rx falling */ + TDM_TX_RASING_RX_FALLING = 0, + /* tx falling and rx raising */ + TDM_TX_FALLING_RX_RASING, +}; + +enum TDM_FRAME_MODE { + SHORT_EARLY = 0, + SHORT_LATER, + LONG, +}; + +enum TDM_ELM { + /* only work while SYNCM=0 */ + TDM_ELM_LATE = 0, + TDM_ELM_EARLY, +}; + +enum TDM_SYNCM { + /* short frame sync */ + TDM_SYNCM_SHORT = 0, + /* long frame sync */ + TDM_SYNCM_LONG, +}; + +enum TDM_IFL { + /* FIFO to send or received : half-1/2, Quarter-1/4 */ + TDM_FIFO_HALF = 0, + TDM_FIFO_QUARTER, +}; + +enum TDM_WL { + /* send or received word length */ + TDM_8BIT_WORD_LEN = 0, + TDM_16BIT_WORD_LEN, + TDM_20BIT_WORD_LEN, + TDM_24BIT_WORD_LEN, + TDM_32BIT_WORD_LEN, +}; + +enum TDM_SL { + /* send or received slot length */ + TDM_8BIT_SLOT_LEN = 0, + TDM_16BIT_SLOT_LEN, + TDM_32BIT_SLOT_LEN, +}; + +enum TDM_LRJ { + /* left-justify or right-justify */ + TDM_RIGHT_JUSTIFY = 0, + TDM_LEFT_JUSTIFT, +}; + +struct tdm_chan_cfg { + enum TDM_IFL ifl; + enum TDM_WL wl; + unsigned char sscale; + enum TDM_SL sl; + enum TDM_LRJ lrj; + unsigned char enable; +}; + +struct jh7110_tdm_dev { + void __iomem *tdm_base; + struct device *dev; + struct clk *clk_tdm_ahb; + struct clk *clk_tdm_apb; + struct clk *clk_tdm_internal; + struct clk *clk_tdm; + struct clk *clk_mclk_inner; + struct clk *clk_tdm_ext; + struct reset_control *resets; + + enum TDM_CLKPOL clkpolity; + enum TDM_ELM elm; + enum TDM_SYNCM syncm; + enum TDM_MASTER_SLAVE_MODE ms_mode; + enum TDM_FRAME_MODE frame_mode; + + struct tdm_chan_cfg tx; + struct tdm_chan_cfg rx; + + u16 syncdiv; + u32 samplerate; + u32 pcmclk; + + /* data related to DMA transfers b/w tdm and DMAC */ + struct snd_dmaengine_dai_dma_data play_dma_data; + struct snd_dmaengine_dai_dma_data capture_dma_data; + u32 saved_pcmgbcr; + u32 saved_pcmtxcr; + u32 saved_pcmrxcr; + u32 saved_pcmdiv; + +}; + +#endif /* __SND_SOC_STARFIVE_TDM_H */
Add the tdm controller node and sound card for the StarFive JH7110 SoC.
Signed-off-by: Walker Chen walker.chen@starfivetech.com --- .../jh7110-starfive-visionfive-2.dtsi | 87 +++++++++++++++++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 34 ++++++++ 2 files changed, 121 insertions(+)
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index 1155b97b593d..35137c2edf5d 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -62,6 +62,10 @@ clock-frequency = <297000000>; };
+&wm8960_mclk { + clock-frequency = <24576000>; +}; + &i2srx_bclk_ext { clock-frequency = <12288000>; }; @@ -102,6 +106,14 @@ pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; status = "okay"; + + wm8960: codec@1a { + compatible = "wlf,wm8960"; + reg = <0x1a>; + #sound-dai-cells = <0>; + + wlf,shared-lrclk; + }; };
&i2c2 { @@ -214,6 +226,40 @@ slew-rate = <0>; }; }; + + tdm0_pins: tdm0-pins { + tdm0-pins-tx { + pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD, + GPOEN_ENABLE, + GPI_NONE)>; + bias-pull-up; + drive-strength = <2>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; + + tdm0-pins-rx { + pinmux = <GPIOMUX(61, GPOUT_HIGH, + GPOEN_DISABLE, + GPI_SYS_TDM_RXD)>; + input-enable; + }; + + tdm0-pins-sync { + pinmux = <GPIOMUX(63, GPOUT_HIGH, + GPOEN_DISABLE, + GPI_SYS_TDM_SYNC)>; + input-enable; + }; + + tdm0-pins-pcmclk { + pinmux = <GPIOMUX(38, GPOUT_HIGH, + GPOEN_DISABLE, + GPI_SYS_TDM_CLK)>; + input-enable; + }; + }; };
&uart0 { @@ -221,3 +267,44 @@ pinctrl-0 = <&uart0_pins>; status = "okay"; }; + +&tdm { + pinctrl-names = "default"; + pinctrl-0 = <&tdm0_pins>; + status = "okay"; +}; + +&sound0 { + simple-audio-card,dai-link@0 { + reg = <0>; + status = "okay"; + format = "dsp_a"; + bitclock-master = <&dailink_master>; + frame-master = <&dailink_master>; + + widgets = + "Microphone", "Mic Jack", + "Line", "Line In", + "Line", "Line Out", + "Speaker", "Speaker", + "Headphone", "Headphone Jack"; + routing = + "Headphone Jack", "HP_L", + "Headphone Jack", "HP_R", + "Speaker", "SPK_LP", + "Speaker", "SPK_LN", + "LINPUT1", "Mic Jack", + "LINPUT3", "Mic Jack", + "RINPUT1", "Mic Jack", + "RINPUT2", "Mic Jack"; + cpu { + sound-dai = <&tdm>; + }; + + dailink_master:codec { + sound-dai = <&wm8960>; + clocks = <&wm8960_mclk>; + clock-names = "mclk"; + }; + }; +}; diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index b503b6137743..a89158d1d7a6 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -210,6 +210,12 @@ #clock-cells = <0>; };
+ wm8960_mclk: wm8960_mclk { + compatible = "fixed-clock"; + clock-output-names = "wm8960_mclk"; + #clock-cells = <0>; + }; + i2srx_bclk_ext: i2srx-bclk-ext-clock { compatible = "fixed-clock"; clock-output-names = "i2srx_bclk_ext"; @@ -375,6 +381,27 @@ status = "disabled"; };
+ tdm: tdm@10090000 { + compatible = "starfive,jh7110-tdm"; + reg = <0x0 0x10090000 0x0 0x1000>; + clocks = <&syscrg JH7110_SYSCLK_TDM_AHB>, + <&syscrg JH7110_SYSCLK_TDM_APB>, + <&syscrg JH7110_SYSCLK_TDM_INTERNAL>, + <&syscrg JH7110_SYSCLK_TDM_TDM>, + <&syscrg JH7110_SYSCLK_MCLK_INNER>, + <&tdm_ext>; + clock-names = "tdm_ahb", "tdm_apb", + "tdm_internal", "tdm", + "mclk_inner", "tdm_ext"; + resets = <&syscrg JH7110_SYSRST_TDM_AHB>, + <&syscrg JH7110_SYSRST_TDM_APB>, + <&syscrg JH7110_SYSRST_TDM_CORE>; + dmas = <&dma 20>, <&dma 21>; + dma-names = "rx","tx"; + #sound-dai-cells = <0>; + status = "disabled"; + }; + stgcrg: clock-controller@10230000 { compatible = "starfive,jh7110-stgcrg"; reg = <0x0 0x10230000 0x0 0x10000>; @@ -601,5 +628,12 @@ #reset-cells = <1>; power-domains = <&pwrc JH7110_PD_VOUT>; }; + + sound0: snd-card0 { + compatible = "simple-audio-card"; + simple-audio-card,name = "Starfive-TDM-Sound-Card"; + #address-cells = <1>; + #size-cells = <0>; + }; }; };
On 29/03/2023 17:33, Walker Chen wrote:
Add the tdm controller node and sound card for the StarFive JH7110 SoC.
Signed-off-by: Walker Chen walker.chen@starfivetech.com
.../jh7110-starfive-visionfive-2.dtsi | 87 +++++++++++++++++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 34 ++++++++ 2 files changed, 121 insertions(+)
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index 1155b97b593d..35137c2edf5d 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -62,6 +62,10 @@ clock-frequency = <297000000>; };
+&wm8960_mclk {
- clock-frequency = <24576000>;
+};
&i2srx_bclk_ext { clock-frequency = <12288000>; }; @@ -102,6 +106,14 @@ pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; status = "okay";
- wm8960: codec@1a {
compatible = "wlf,wm8960";
reg = <0x1a>;
#sound-dai-cells = <0>;
wlf,shared-lrclk;
- };
};
&i2c2 { @@ -214,6 +226,40 @@ slew-rate = <0>; }; };
- tdm0_pins: tdm0-pins {
tdm0-pins-tx {
pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
GPOEN_ENABLE,
GPI_NONE)>;
bias-pull-up;
drive-strength = <2>;
input-disable;
input-schmitt-disable;
slew-rate = <0>;
};
tdm0-pins-rx {
pinmux = <GPIOMUX(61, GPOUT_HIGH,
GPOEN_DISABLE,
GPI_SYS_TDM_RXD)>;
input-enable;
};
tdm0-pins-sync {
pinmux = <GPIOMUX(63, GPOUT_HIGH,
GPOEN_DISABLE,
GPI_SYS_TDM_SYNC)>;
input-enable;
};
tdm0-pins-pcmclk {
pinmux = <GPIOMUX(38, GPOUT_HIGH,
GPOEN_DISABLE,
GPI_SYS_TDM_CLK)>;
input-enable;
};
- };
};
&uart0 { @@ -221,3 +267,44 @@ pinctrl-0 = <&uart0_pins>; status = "okay"; };
+&tdm {
- pinctrl-names = "default";
- pinctrl-0 = <&tdm0_pins>;
- status = "okay";
+};
+&sound0 {
- simple-audio-card,dai-link@0 {
reg = <0>;
status = "okay";
Why? Drop.
format = "dsp_a";
bitclock-master = <&dailink_master>;
frame-master = <&dailink_master>;
widgets =
Drop line break.
"Microphone", "Mic Jack",
"Line", "Line In",
"Line", "Line Out",
"Speaker", "Speaker",
"Headphone", "Headphone Jack";
routing =
Drop unnecessary line break.
"Headphone Jack", "HP_L",
"Headphone Jack", "HP_R",
"Speaker", "SPK_LP",
"Speaker", "SPK_LN",
"LINPUT1", "Mic Jack",
"LINPUT3", "Mic Jack",
"RINPUT1", "Mic Jack",
"RINPUT2", "Mic Jack";
cpu {
sound-dai = <&tdm>;
};
dailink_master:codec {
Missing space after label:.
sound-dai = <&wm8960>;
clocks = <&wm8960_mclk>;
clock-names = "mclk";
};
- };
+}; diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index b503b6137743..a89158d1d7a6 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -210,6 +210,12 @@ #clock-cells = <0>; };
- wm8960_mclk: wm8960_mclk {
No underscores in node names. Use consistent naming - do you see here any nodes named "mclk"?
Anyway this is some fake clock. Real clock should come out from wm8960.
compatible = "fixed-clock";
clock-output-names = "wm8960_mclk";
#clock-cells = <0>;
- };
- i2srx_bclk_ext: i2srx-bclk-ext-clock { compatible = "fixed-clock"; clock-output-names = "i2srx_bclk_ext";
@@ -375,6 +381,27 @@ status = "disabled"; };
tdm: tdm@10090000 {
compatible = "starfive,jh7110-tdm";
reg = <0x0 0x10090000 0x0 0x1000>;
clocks = <&syscrg JH7110_SYSCLK_TDM_AHB>,
<&syscrg JH7110_SYSCLK_TDM_APB>,
<&syscrg JH7110_SYSCLK_TDM_INTERNAL>,
<&syscrg JH7110_SYSCLK_TDM_TDM>,
<&syscrg JH7110_SYSCLK_MCLK_INNER>,
<&tdm_ext>;
clock-names = "tdm_ahb", "tdm_apb",
"tdm_internal", "tdm",
"mclk_inner", "tdm_ext";
resets = <&syscrg JH7110_SYSRST_TDM_AHB>,
<&syscrg JH7110_SYSRST_TDM_APB>,
<&syscrg JH7110_SYSRST_TDM_CORE>;
dmas = <&dma 20>, <&dma 21>;
dma-names = "rx","tx";
#sound-dai-cells = <0>;
status = "disabled";
};
- stgcrg: clock-controller@10230000 { compatible = "starfive,jh7110-stgcrg"; reg = <0x0 0x10230000 0x0 0x10000>;
@@ -601,5 +628,12 @@ #reset-cells = <1>; power-domains = <&pwrc JH7110_PD_VOUT>; };
sound0: snd-card0 {
1. Why card0? 2. Where is this node located? In MMIO bus? Run some basic checks on your DTS before submitting upstream. dtbs_check dtbs W=1
3. Why this is even in the DTSI? This really looks wrong.
compatible = "simple-audio-card";
simple-audio-card,name = "Starfive-TDM-Sound-Card";
#address-cells = <1>;
#size-cells = <0>;
Best regards, Krzysztof
On Thu, Mar 30, 2023 at 09:43:10AM +0200, Krzysztof Kozlowski wrote:
On 29/03/2023 17:33, Walker Chen wrote:
Add the tdm controller node and sound card for the StarFive JH7110 SoC.
compatible = "fixed-clock";
clock-output-names = "wm8960_mclk";
#clock-cells = <0>;
- };
- i2srx_bclk_ext: i2srx-bclk-ext-clock { compatible = "fixed-clock"; clock-output-names = "i2srx_bclk_ext";
@@ -375,6 +381,27 @@ status = "disabled"; };
tdm: tdm@10090000 {
compatible = "starfive,jh7110-tdm";
reg = <0x0 0x10090000 0x0 0x1000>;
clocks = <&syscrg JH7110_SYSCLK_TDM_AHB>,
<&syscrg JH7110_SYSCLK_TDM_APB>,
<&syscrg JH7110_SYSCLK_TDM_INTERNAL>,
<&syscrg JH7110_SYSCLK_TDM_TDM>,
<&syscrg JH7110_SYSCLK_MCLK_INNER>,
<&tdm_ext>;
clock-names = "tdm_ahb", "tdm_apb",
"tdm_internal", "tdm",
"mclk_inner", "tdm_ext";
resets = <&syscrg JH7110_SYSRST_TDM_AHB>,
<&syscrg JH7110_SYSRST_TDM_APB>,
<&syscrg JH7110_SYSRST_TDM_CORE>;
dmas = <&dma 20>, <&dma 21>;
dma-names = "rx","tx";
#sound-dai-cells = <0>;
status = "disabled";
};
- stgcrg: clock-controller@10230000 { compatible = "starfive,jh7110-stgcrg"; reg = <0x0 0x10230000 0x0 0x10000>;
@@ -601,5 +628,12 @@ #reset-cells = <1>; power-domains = <&pwrc JH7110_PD_VOUT>; };
sound0: snd-card0 {
- Why card0?
- Where is this node located? In MMIO bus? Run some basic checks on
your DTS before submitting upstream. dtbs_check dtbs W=1
- Why this is even in the DTSI? This really looks wrong.
Excuse me for not following here, but Walker, could you point me at where in the schematic for the VisionFive 2 that this wm8960 actually is? I know ~nothing about audio, but good old Google tells me that this is a dedicated codec chip and I was looking at [1] and could not easily find it on the schematic.
Thanks, Conor.
1 https://doc-en.rvspace.org/VisionFive2/PDF/SCH_RV002_V1.2A_20221216.pdf
On 2023/3/30 15:58, Conor Dooley wrote:
On Thu, Mar 30, 2023 at 09:43:10AM +0200, Krzysztof Kozlowski wrote:
On 29/03/2023 17:33, Walker Chen wrote:
Add the tdm controller node and sound card for the StarFive JH7110 SoC.
compatible = "fixed-clock";
clock-output-names = "wm8960_mclk";
#clock-cells = <0>;
- };
- i2srx_bclk_ext: i2srx-bclk-ext-clock { compatible = "fixed-clock"; clock-output-names = "i2srx_bclk_ext";
@@ -375,6 +381,27 @@ status = "disabled"; };
tdm: tdm@10090000 {
compatible = "starfive,jh7110-tdm";
reg = <0x0 0x10090000 0x0 0x1000>;
clocks = <&syscrg JH7110_SYSCLK_TDM_AHB>,
<&syscrg JH7110_SYSCLK_TDM_APB>,
<&syscrg JH7110_SYSCLK_TDM_INTERNAL>,
<&syscrg JH7110_SYSCLK_TDM_TDM>,
<&syscrg JH7110_SYSCLK_MCLK_INNER>,
<&tdm_ext>;
clock-names = "tdm_ahb", "tdm_apb",
"tdm_internal", "tdm",
"mclk_inner", "tdm_ext";
resets = <&syscrg JH7110_SYSRST_TDM_AHB>,
<&syscrg JH7110_SYSRST_TDM_APB>,
<&syscrg JH7110_SYSRST_TDM_CORE>;
dmas = <&dma 20>, <&dma 21>;
dma-names = "rx","tx";
#sound-dai-cells = <0>;
status = "disabled";
};
- stgcrg: clock-controller@10230000 { compatible = "starfive,jh7110-stgcrg"; reg = <0x0 0x10230000 0x0 0x10000>;
@@ -601,5 +628,12 @@ #reset-cells = <1>; power-domains = <&pwrc JH7110_PD_VOUT>; };
sound0: snd-card0 {
- Why card0?
- Where is this node located? In MMIO bus? Run some basic checks on
your DTS before submitting upstream. dtbs_check dtbs W=1
- Why this is even in the DTSI? This really looks wrong.
Excuse me for not following here, but Walker, could you point me at where in the schematic for the VisionFive 2 that this wm8960 actually is? I know ~nothing about audio, but good old Google tells me that this is a dedicated codec chip and I was looking at [1] and could not easily find it on the schematic.
Thanks, Conor.
1 https://doc-en.rvspace.org/VisionFive2/PDF/SCH_RV002_V1.2A_20221216.pdf
Hi Conor,
The TDM need work together with external codec WM8960 by plugging the raspberry pie audio board into the 40-pin, which is found in sheet 21 of the schematic. Because the 40-pin of VisionFive2 is fully compatible with the pins of Raspberry pie audio board.
For more information of the audio board, you can take a look at the following webpage: https://wiki.seeedstudio.com/ReSpeaker_2_Mics_Pi_HAT/
The schematic of audio board: https://files.seeedstudio.com/wiki/MIC_HATv1.0_for_raspberrypi/src/ReSpeaker...
Best regards, Walker
On Thu, Mar 30, 2023 at 11:16:08PM +0800, Walker Chen wrote:
On 2023/3/30 15:58, Conor Dooley wrote:
Excuse me for not following here, but Walker, could you point me at where in the schematic for the VisionFive 2 that this wm8960 actually is? I know ~nothing about audio, but good old Google tells me that this is a dedicated codec chip and I was looking at [1] and could not easily find it on the schematic.
1 https://doc-en.rvspace.org/VisionFive2/PDF/SCH_RV002_V1.2A_20221216.pdf
The TDM need work together with external codec WM8960 by plugging the raspberry pie audio board into the 40-pin, which is found in sheet 21 of the schematic. Because the 40-pin of VisionFive2 is fully compatible with the pins of Raspberry pie audio board.
For more information of the audio board, you can take a look at the following webpage: https://wiki.seeedstudio.com/ReSpeaker_2_Mics_Pi_HAT/
The schematic of audio board: https://files.seeedstudio.com/wiki/MIC_HATv1.0_for_raspberrypi/src/ReSpeaker...
Ahh, I feared that this was the case. If it's not on the board, then it shouldn't be in the dts (and certainly nothing should be in jh7110.dtsi!). I suppose this should be a dt-overlay, but I don't know anything about the upstream infrastructure for those. Nor do I know what is permitted in terms of overlays.
Thanks, Conor.
On 2023/3/30 15:43, Krzysztof Kozlowski wrote:
On 29/03/2023 17:33, Walker Chen wrote:
Add the tdm controller node and sound card for the StarFive JH7110 SoC.
Signed-off-by: Walker Chen walker.chen@starfivetech.com
.../jh7110-starfive-visionfive-2.dtsi | 87 +++++++++++++++++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 34 ++++++++ 2 files changed, 121 insertions(+)
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index 1155b97b593d..35137c2edf5d 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -62,6 +62,10 @@ clock-frequency = <297000000>; };
+&wm8960_mclk {
- clock-frequency = <24576000>;
+};
&i2srx_bclk_ext { clock-frequency = <12288000>; }; @@ -102,6 +106,14 @@ pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; status = "okay";
- wm8960: codec@1a {
compatible = "wlf,wm8960";
reg = <0x1a>;
#sound-dai-cells = <0>;
wlf,shared-lrclk;
- };
};
&i2c2 { @@ -214,6 +226,40 @@ slew-rate = <0>; }; };
- tdm0_pins: tdm0-pins {
tdm0-pins-tx {
pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
GPOEN_ENABLE,
GPI_NONE)>;
bias-pull-up;
drive-strength = <2>;
input-disable;
input-schmitt-disable;
slew-rate = <0>;
};
tdm0-pins-rx {
pinmux = <GPIOMUX(61, GPOUT_HIGH,
GPOEN_DISABLE,
GPI_SYS_TDM_RXD)>;
input-enable;
};
tdm0-pins-sync {
pinmux = <GPIOMUX(63, GPOUT_HIGH,
GPOEN_DISABLE,
GPI_SYS_TDM_SYNC)>;
input-enable;
};
tdm0-pins-pcmclk {
pinmux = <GPIOMUX(38, GPOUT_HIGH,
GPOEN_DISABLE,
GPI_SYS_TDM_CLK)>;
input-enable;
};
- };
};
&uart0 { @@ -221,3 +267,44 @@ pinctrl-0 = <&uart0_pins>; status = "okay"; };
+&tdm {
- pinctrl-names = "default";
- pinctrl-0 = <&tdm0_pins>;
- status = "okay";
+};
+&sound0 {
- simple-audio-card,dai-link@0 {
reg = <0>;
status = "okay";
Why? Drop.
Will drop it.
format = "dsp_a";
bitclock-master = <&dailink_master>;
frame-master = <&dailink_master>;
widgets =
Drop line break.
OK, will drop it.
"Microphone", "Mic Jack",
"Line", "Line In",
"Line", "Line Out",
"Speaker", "Speaker",
"Headphone", "Headphone Jack";
routing =
Drop unnecessary line break.
OK, will drop it.
"Headphone Jack", "HP_L",
"Headphone Jack", "HP_R",
"Speaker", "SPK_LP",
"Speaker", "SPK_LN",
"LINPUT1", "Mic Jack",
"LINPUT3", "Mic Jack",
"RINPUT1", "Mic Jack",
"RINPUT2", "Mic Jack";
cpu {
sound-dai = <&tdm>;
};
dailink_master:codec {
Missing space after label:.
Will be fixed.
sound-dai = <&wm8960>;
clocks = <&wm8960_mclk>;
clock-names = "mclk";
};
- };
+}; diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index b503b6137743..a89158d1d7a6 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -210,6 +210,12 @@ #clock-cells = <0>; };
- wm8960_mclk: wm8960_mclk {
No underscores in node names. Use consistent naming - do you see here any nodes named "mclk"?
Anyway this is some fake clock. Real clock should come out from wm8960.
Thank you for pointing out this, it will be fixed.
compatible = "fixed-clock";
clock-output-names = "wm8960_mclk";
#clock-cells = <0>;
- };
- i2srx_bclk_ext: i2srx-bclk-ext-clock { compatible = "fixed-clock"; clock-output-names = "i2srx_bclk_ext";
@@ -375,6 +381,27 @@ status = "disabled"; };
tdm: tdm@10090000 {
compatible = "starfive,jh7110-tdm";
reg = <0x0 0x10090000 0x0 0x1000>;
clocks = <&syscrg JH7110_SYSCLK_TDM_AHB>,
<&syscrg JH7110_SYSCLK_TDM_APB>,
<&syscrg JH7110_SYSCLK_TDM_INTERNAL>,
<&syscrg JH7110_SYSCLK_TDM_TDM>,
<&syscrg JH7110_SYSCLK_MCLK_INNER>,
<&tdm_ext>;
clock-names = "tdm_ahb", "tdm_apb",
"tdm_internal", "tdm",
"mclk_inner", "tdm_ext";
resets = <&syscrg JH7110_SYSRST_TDM_AHB>,
<&syscrg JH7110_SYSRST_TDM_APB>,
<&syscrg JH7110_SYSRST_TDM_CORE>;
dmas = <&dma 20>, <&dma 21>;
dma-names = "rx","tx";
#sound-dai-cells = <0>;
status = "disabled";
};
- stgcrg: clock-controller@10230000 { compatible = "starfive,jh7110-stgcrg"; reg = <0x0 0x10230000 0x0 0x10000>;
@@ -601,5 +628,12 @@ #reset-cells = <1>; power-domains = <&pwrc JH7110_PD_VOUT>; };
sound0: snd-card0 {
- Why card0?
There are several audio interfaces in JH7110 SoC, each as an independent sound card. TDM is for snd-card0, latter i2s will be for snd-card1, spdif will be for snd-card2, etc.
- Where is this node located? In MMIO bus? Run some basic checks on
your DTS before submitting upstream. dtbs_check dtbs W=1
- Why this is even in the DTSI? This really looks wrong.
It seems that the sound node should be located in DTS file more appropriately.
Best regards, Walker
participants (4)
-
Conor Dooley
-
Conor Dooley
-
Krzysztof Kozlowski
-
Walker Chen