[alsa-devel] ASoC, TWL4030 Register defaults
Hi alsa devels,
Thanks for your suggestions.
Here is the patch for the register default values. The defaults are chosen for minimal gain settings of the input and output devices of the CODEC.
If asked for i can send the details of each register. I will format and send the other patches soon.
The patch is as follows:
[PATCH] Register default values for gain, path selection for various input and output devices From: chnaveenkrishna chnaveen@chnaveen.mistral.in To: Date: Today 04:49:50 pm
--- sound/soc/codecs/twl4030.c | 28 ++++++++++++++-------------- 1 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c index ee2f0d3..3bc42b3 100644 --- a/sound/soc/codecs/twl4030.c +++ b/sound/soc/codecs/twl4030.c @@ -45,8 +45,8 @@ static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = { 0xc3, /* REG_OPTION (0x2) */ 0x00, /* REG_UNKNOWN (0x3) */ 0x00, /* REG_MICBIAS_CTL (0x4) */ - 0x24, /* REG_ANAMICL (0x5) */ - 0x04, /* REG_ANAMICR (0x6) */ + 0xb0, /* REG_ANAMICL (0x5) */ + 0x10, /* REG_ANAMICR (0x6) */ 0x0a, /* REG_AVADC_CTL (0x7) */ 0x00, /* REG_ADCMICSEL (0x8) */ 0x00, /* REG_DIGMIXING (0x9) */ @@ -67,22 +67,22 @@ static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = { 0x00, /* REG_ARX2VTXPGA (0x18) */ 0x00, /* REG_ARXL1_APGA_CTL (0x19) */ 0x00, /* REG_ARXR1_APGA_CTL (0x1A) */ - 0x4b, /* REG_ARXL2_APGA_CTL (0x1B) */ - 0x4b, /* REG_ARXR2_APGA_CTL (0x1C) */ + 0x2b, /* REG_ARXL2_APGA_CTL (0x1B) */ + 0x2b, /* REG_ARXR2_APGA_CTL (0x1C) */ 0x00, /* REG_ATX2ARXPGA (0x1D) */ 0x00, /* REG_BT_IF (0x1E) */ 0x00, /* REG_BTPGA (0x1F) */ 0x00, /* REG_BTSTPGA (0x20) */ - 0x00, /* REG_EAR_CTL (0x21) */ - 0x24, /* REG_HS_SEL (0x22) */ - 0x0a, /* REG_HS_GAIN_SET (0x23) */ + 0x20, /* REG_EAR_CTL (0x21) */ + 0x00, /* REG_HS_SEL (0x22) */ + 0x05, /* REG_HS_GAIN_SET (0x23) */ 0x00, /* REG_HS_POPN_SET (0x24) */ - 0x00, /* REG_PREDL_CTL (0x25) */ - 0x00, /* REG_PREDR_CTL (0x26) */ - 0x00, /* REG_PRECKL_CTL (0x27) */ - 0x00, /* REG_PRECKR_CTL (0x28) */ - 0x00, /* REG_HFL_CTL (0x29) */ - 0x00, /* REG_HFR_CTL (0x2A) */ + 0x20, /* REG_PREDL_CTL (0x25) */ + 0x20, /* REG_PREDR_CTL (0x26) */ + 0x20, /* REG_PRECKL_CTL (0x27) */ + 0x20, /* REG_PRECKR_CTL (0x28) */ + 0x1f, /* REG_HFL_CTL (0x29) */ + 0x1f, /* REG_HFR_CTL (0x2A) */ 0x00, /* REG_ALC_CTL (0x2B) */ 0x00, /* REG_ALC_SET1 (0x2C) */ 0x00, /* REG_ALC_SET2 (0x2D) */ @@ -112,7 +112,7 @@ static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = { 0x00, /* REG_VIBRA_CTL (0x45) */ 0x00, /* REG_VIBRA_SET (0x46) */ 0x00, /* REG_VIBRA_PWM_SET (0x47) */ - 0x00, /* REG_ANAMIC_GAIN (0x48) */ + 0x24, /* REG_ANAMIC_GAIN (0x48) */ 0x00, /* REG_MISC_SET_2 (0x49) */ };
On Thu, Nov 20, 2008 at 04:49:33PM +0530, naveen krishna ch wrote:
[PATCH] Register default values for gain, path selection for various input and output devices From: chnaveenkrishna chnaveen@chnaveen.mistral.in To: Date: Today 04:49:50 pm
Something (your MUA)? Is mangling this really badly...
As I said in reply to your first mail I'd really like to see some sort of explanation as to why you are making these changes - are the defaults in the existing driver wrong? There seem to be an awful lot of changes here and there's no discussion in the patch as to what they mean.
On Thu, Nov 20, 2008 at 4:53 PM, Mark Brown broonie@sirena.org.uk wrote:
On Thu, Nov 20, 2008 at 04:49:33PM +0530, naveen krishna ch wrote:
[PATCH] Register default values for gain, path selection for various
input
and output devices From: chnaveenkrishna chnaveen@chnaveen.mistral.in To: Date: Today 04:49:50 pm
Something (your MUA)? Is mangling this really badly...
Sorry i will try avoiding this MUA issue, I was using the gmail till now.
As I said in reply to your first mail I'd really like to see some sort of explanation as to why you are making these changes - are the defaults in the existing driver wrong? There seem to be an awful lot of changes here and there's no discussion in the patch as to what they mean.
The existing driver does the default settings for only one input device (Line in) and one output device (Headset out). The CODEC supports 5 output devices and 4 input devices.
The default values given by the drivers author are according to his custom requirements, expanding them to the CODEC's ability these values can be modified.
What all this patch is doing is setting the default playback and capture volumes of various input and output devices to reasonable values.
- 0x24, /* REG_ANAMICL (0x5) */ - 0x04, /* REG_ANAMICR (0x6) */ + 0xb0, /* REG_ANAMICL (0x5) */ + 0x10, /* REG_ANAMICR (0x6) */ Author is setting default capture device as Line In. It was modified to none.
- 0x4b, /* REG_ARXL2_APGA_CTL (0x1B) */ - 0x4b, /* REG_ARXR2_APGA_CTL (0x1C) */ + 0x2b, /* REG_ARXL2_APGA_CTL (0x1B) */ + 0x2b, /* REG_ARXR2_APGA_CTL (0x1C) */ The gain controls register settings now modified for minimal play back volume.
- 0x00, /* REG_EAR_CTL (0x21) */ - 0x24, /* REG_HS_SEL (0x22) */ - 0x0a, /* REG_HS_GAIN_SET (0x23) */ + 0x20, /* REG_EAR_CTL (0x21) */ + 0x00, /* REG_HS_SEL (0x22) */ + 0x05, /* REG_HS_GAIN_SET (0x23) */
He selected the Headset as default output device it was modified to none with some gain settings.
- 0x00, /* REG_PREDL_CTL (0x25) */ - 0x00, /* REG_PREDR_CTL (0x26) */ - 0x00, /* REG_PRECKL_CTL (0x27) */ - 0x00, /* REG_PRECKR_CTL (0x28) */
+ 0x20, /* REG_PREDL_CTL (0x25) */ + 0x20, /* REG_PREDR_CTL (0x26) */ + 0x20, /* REG_PRECKL_CTL (0x27) */ + 0x20, /* REG_PRECKR_CTL (0x28) */ GVain settings for 3 outputting devices
- 0x00, /* REG_HFL_CTL (0x29) */ - 0x00, /* REG_HFR_CTL (0x2A) */ + 0x1f, /* REG_HFL_CTL (0x29) */ + 0x1f, /* REG_HFR_CTL (0x2A) */ gain settings and path selection for handsfree output
- 0x00, /* REG_ANAMIC_GAIN (0x48) */ + 0x24, /* REG_ANAMIC_GAIN (0x48) */ Main and Sub Mic gain settings.
My upcoming patches will make use of this default settings.
On Thu, Nov 20, 2008 at 05:21:11PM +0530, naveen krishna ch wrote:
On Thu, Nov 20, 2008 at 4:53 PM, Mark Brown broonie@sirena.org.uk wrote:
As I said in reply to your first mail I'd really like to see some sort of explanation as to why you are making these changes - are the defaults in the existing driver wrong? There seem to be an awful lot of changes here and there's no discussion in the patch as to what they mean.
The existing driver does the default settings for only one input device (Line in) and one output device (Headset out). The CODEC supports 5 output devices and 4 input devices.
Thanks for the detail here - this really should go in the changelog for your patch so people reviewing the history of the driver can see what's happened.
The default values given by the drivers author are according to his custom requirements, expanding them to the CODEC's ability these values can be modified.
What all this patch is doing is setting the default playback and capture volumes of various input and output devices to reasonable values.
It is perfectly normal for the default configuration of codecs to not be suitable for use on a given platform, normally the codec will have the power on defaults in silicon. Systems should use something like alsactl restore to set things up appropriately for their system during startup.
On Thu, Nov 20, 2008 at 3:51 AM, naveen krishna ch naveenkrishna.ch@gmail.com wrote:
On Thu, Nov 20, 2008 at 4:53 PM, Mark Brown broonie@sirena.org.uk wrote:
As I said in reply to your first mail I'd really like to see some sort of explanation as to why you are making these changes - are the defaults in the existing driver wrong? There seem to be an awful lot of changes here and there's no discussion in the patch as to what they mean.
The existing driver does the default settings for only one input device (Line in) and one output device (Headset out). The CODEC supports 5 output devices and 4 input devices.
The default values given by the drivers author are according to his custom requirements, expanding them to the CODEC's ability these values can be modified.
What all this patch is doing is setting the default playback and capture volumes of various input and output devices to reasonable values.
These seem like reasonable default values for features the driver previously did not use.
Couldn't verify that there are no side effects by build & run testing since the patch wouldn't apply for me.
Steve
On Thu, Nov 20, 2008 at 4:53 PM, Mark Brown broonie@sirena.org.uk wrote:
On Thu, Nov 20, 2008 at 04:49:33PM +0530, naveen krishna ch wrote:
[PATCH] Register default values for gain, path selection for various input and output devices From: chnaveenkrishna chnaveen@chnaveen.mistral.in To: Date: Today 04:49:50 pm
Something (your MUA)? Is mangling this really badly...
As I said in reply to your first mail I'd really like to see some sort of explanation as to why you are making these changes - are the defaults in the existing driver wrong? There seem to be an awful lot of changes here and there's no discussion in the patch as to what they mean.
Hi Mark,
By 'defaults' did you mean the reset values of the codec registers?
Arun
Alsa-devel mailing list Alsa-devel@alsa-project.org http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
On Thu, Nov 20, 2008 at 5:21 PM, Arun KS getarunks@gmail.com wrote:
On Thu, Nov 20, 2008 at 4:53 PM, Mark Brown broonie@sirena.org.uk wrote:
On Thu, Nov 20, 2008 at 04:49:33PM +0530, naveen krishna ch wrote:
[PATCH] Register default values for gain, path selection for various
input
and output devices From: chnaveenkrishna chnaveen@chnaveen.mistral.in To: Date: Today 04:49:50 pm
Something (your MUA)? Is mangling this really badly...
As I said in reply to your first mail I'd really like to see some sort of explanation as to why you are making these changes - are the defaults in the existing driver wrong? There seem to be an awful lot of changes here and there's no discussion in the patch as to what they mean.
Hi Mark,
By 'defaults' did you mean the reset values of the codec registers?
Not reset values but programming them to these new values will ensure audio playback or capture at minimal volume when ever an output or input device is selected.
Arun
Alsa-devel mailing list Alsa-devel@alsa-project.org http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
participants (4)
-
Arun KS -
Mark Brown -
naveen krishna ch -
Steve Sakoman