Convert APR bindings to yaml format so that we could add new bindings support.

All the dsp services bindings are now part of apr bindings instead of adding them to audio bindings.

Signed-off-by: Srinivas Kandagatla srinivas.kandagatla@linaro.org Reviewed-by: Rob Herring robh@kernel.org --- .../devicetree/bindings/soc/qcom/qcom,apr.txt | 134 ----------------- .../bindings/soc/qcom/qcom,apr.yaml | 135 ++++++++++++++++++ 2 files changed, 135 insertions(+), 134 deletions(-) delete mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,apr.txt create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,apr.yaml

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,apr.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,apr.txt deleted file mode 100644 index 2e2f6dc351c0..000000000000 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,apr.txt +++ /dev/null @@ -1,134 +0,0 @@ -Qualcomm APR (Asynchronous Packet Router) binding - -This binding describes the Qualcomm APR. APR is a IPC protocol for -communication between Application processor and QDSP. APR is mainly -used for audio/voice services on the QDSP. - -- compatible: - Usage: required - Value type: <stringlist> - Definition: must be "qcom,apr-v<VERSION-NUMBER>", example "qcom,apr-v2" - -- qcom,apr-domain - Usage: required - Value type: <u32> - Definition: Destination processor ID. - Possible values are : - 1 - APR simulator - 2 - PC - 3 - MODEM - 4 - ADSP - 5 - APPS - 6 - MODEM2 - 7 - APPS2 - -= APR SERVICES -Each subnode of the APR node represents service tied to this apr. The name -of the nodes are not important. The properties of these nodes are defined -by the individual bindings for the specific service -- All APR services MUST contain the following property: - -- reg - Usage: required - Value type: <u32> - Definition: APR Service ID - Possible values are : - 3 - DSP Core Service - 4 - Audio Front End Service. - 5 - Voice Stream Manager Service. - 6 - Voice processing manager. - 7 - Audio Stream Manager Service. - 8 - Audio Device Manager Service. - 9 - Multimode voice manager. - 10 - Core voice stream. - 11 - Core voice processor. - 12 - Ultrasound stream manager. - 13 - Listen stream manager. - -- qcom,protection-domain - Usage: optional - Value type: <stringlist> - Definition: Must list the protection domain service name and path - that the particular apr service has a dependency on. - Possible values are : - "avs/audio", "msm/adsp/audio_pd". - "kernel/elf_loader", "msm/modem/wlan_pd". - "tms/servreg", "msm/adsp/audio_pd". - "tms/servreg", "msm/modem/wlan_pd". - "tms/servreg", "msm/slpi/sensor_pd". - -= EXAMPLE -The following example represents a QDSP based sound card on a MSM8996 device -which uses apr as communication between Apps and QDSP. - - apr { - compatible = "qcom,apr-v2"; - qcom,apr-domain = <APR_DOMAIN_ADSP>; - - apr-service@3 { - compatible = "qcom,q6core"; - reg = <APR_SVC_ADSP_CORE>; - }; - - apr-service@4 { - compatible = "qcom,q6afe"; - reg = <APR_SVC_AFE>; - - dais { - #sound-dai-cells = <1>; - dai@1 { - reg = <HDMI_RX>; - }; - }; - }; - - apr-service@7 { - compatible = "qcom,q6asm"; - reg = <APR_SVC_ASM>; - ... - }; - - apr-service@8 { - compatible = "qcom,q6adm"; - reg = <APR_SVC_ADM>; - ... - }; - }; - -= EXAMPLE 2 -The following example represents a QDSP based sound card with protection domain -dependencies specified. Here some of the apr services are dependent on services -running on protection domain hosted on ADSP/SLPI remote processors while others -have no such dependency. - - apr { - compatible = "qcom,apr-v2"; - qcom,glink-channels = "apr_audio_svc"; - qcom,apr-domain = <APR_DOMAIN_ADSP>; - - apr-service@3 { - compatible = "qcom,q6core"; - reg = <APR_SVC_ADSP_CORE>; - }; - - q6afe: apr-service@4 { - compatible = "qcom,q6afe"; - reg = <APR_SVC_AFE>; - qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; - ... - }; - - q6asm: apr-service@7 { - compatible = "qcom,q6asm"; - reg = <APR_SVC_ASM>; - qcom,protection-domain = "tms/servreg", "msm/slpi/sensor_pd"; - ... - }; - - q6adm: apr-service@8 { - compatible = "qcom,q6adm"; - reg = <APR_SVC_ADM>; - qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; - ... - }; - }; diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,apr.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,apr.yaml new file mode 100644 index 000000000000..a52b955b8b39 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,apr.yaml @@ -0,0 +1,135 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/soc/qcom/qcom,apr.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm APR (Asynchronous Packet Router) binding + +maintainers: + - Srinivas Kandagatla srinivas.kandagatla@linaro.org + +description: | + This binding describes the Qualcomm APR, APR is a IPC protocol for + communication between Application processor and QDSP. APR is mainly + used for audio/voice services on the QDSP. + +properties: + compatible: + enum: + - qcom,apr-v2 + + qcom,apr-domain: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [1, 2, 3, 4, 5, 6, 7] + description: + Selects the processor domain for apr + 1 = APR simulator + 2 = PC Domain + 3 = Modem Domain + 4 = ADSP Domain + 5 = Application processor Domain + 6 = Modem2 Domain + 7 = Application Processor2 Domain + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +#APR Services +patternProperties: + "^service@[3-9a-d]$": + type: object + description: + APR node's client devices use subnodes for desired static port services. + + properties: + compatible: + enum: + - qcom,q6core + - qcom,q6asm + - qcom,q6afe + - qcom,q6adm + + reg: + minimum: 3 + maximum: 13 + description: + APR Service ID + 3 = DSP Core Service + 4 = Audio Front End Service. + 5 = Voice Stream Manager Service. + 6 = Voice processing manager. + 7 = Audio Stream Manager Service. + 8 = Audio Device Manager Service. + 9 = Multimode voice manager. + 10 = Core voice stream. + 11 = Core voice processor. + 12 = Ultrasound stream manager. + 13 = Listen stream manager. + + qcom,protection-domain: + $ref: /schemas/types.yaml#/definitions/string-array + description: protection domain service name and path for apr service + possible values are + "avs/audio", "msm/adsp/audio_pd". + "kernel/elf_loader", "msm/modem/wlan_pd". + "tms/servreg", "msm/adsp/audio_pd". + "tms/servreg", "msm/modem/wlan_pd". + "tms/servreg", "msm/slpi/sensor_pd". + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + patternProperties: + "^.*@[0-9a-f]+$": + type: object + description: + Service based devices like clock controllers or digital audio interfaces. + + additionalProperties: false + +required: + - compatible + - qcom,apr-domain + +additionalProperties: false + +examples: + - | + #include <dt-bindings/soc/qcom,apr.h> + apr { + compatible = "qcom,apr-v2"; + qcom,apr-domain = <APR_DOMAIN_ADSP>; + #address-cells = <1>; + #size-cells = <0>; + + q6core: service@3 { + compatible = "qcom,q6core"; + reg = <APR_SVC_ADSP_CORE>; + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; + }; + + q6afe: service@4 { + compatible = "qcom,q6afe"; + reg = <APR_SVC_AFE>; + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; + }; + + q6asm: service@7 { + compatible = "qcom,q6asm"; + reg = <APR_SVC_ASM>; + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; + }; + + q6adm: service@8 { + compatible = "qcom,q6adm"; + reg = <APR_SVC_ADM>; + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd"; + }; + };

APR and other packet routers like GPR are pretty much same and interact with other drivers in similar way.

Ex: GPR ports can be considered as APR services, only difference is they are allocated dynamically.

Other difference is packet layout, which should not matter with the apis abstracted. Apart from this the rest of the functionality is pretty much identical across APR and GPR.

Make the apr code more reusable by abstracting it service level, rather than device level so that we do not need to write new drivers for other new packet routers like GPR.

This patch is in preparation to add GPR support to this driver.

Signed-off-by: Srinivas Kandagatla srinivas.kandagatla@linaro.org --- drivers/soc/qcom/apr.c | 129 +++++++++++++++++++++-------------- include/linux/soc/qcom/apr.h | 12 +++- 2 files changed, 90 insertions(+), 51 deletions(-)

diff --git a/drivers/soc/qcom/apr.c b/drivers/soc/qcom/apr.c index 475a57b435b2..bfad71e540ad 100644 --- a/drivers/soc/qcom/apr.c +++ b/drivers/soc/qcom/apr.c @@ -15,13 +15,18 @@ #include <linux/rpmsg.h> #include <linux/of.h>

-struct apr { +enum { + PR_TYPE_APR = 0, +}; + +struct packet_router { struct rpmsg_endpoint *ch; struct device *dev; spinlock_t svcs_lock; spinlock_t rx_lock; struct idr svcs_idr; int dest_domain_id; + int type; struct pdr_handle *pdr; struct workqueue_struct *rxwq; struct work_struct rx_work; @@ -44,21 +49,21 @@ struct apr_rx_buf { */ int apr_send_pkt(struct apr_device *adev, struct apr_pkt *pkt) { - struct apr *apr = dev_get_drvdata(adev->dev.parent); + struct packet_router *apr = dev_get_drvdata(adev->dev.parent); struct apr_hdr *hdr; unsigned long flags; int ret;

- spin_lock_irqsave(&adev->lock, flags); + spin_lock_irqsave(&adev->svc.lock, flags);

hdr = &pkt->hdr; hdr->src_domain = APR_DOMAIN_APPS; - hdr->src_svc = adev->svc_id; + hdr->src_svc = adev->svc.id; hdr->dest_domain = adev->domain_id; - hdr->dest_svc = adev->svc_id; + hdr->dest_svc = adev->svc.id;

ret = rpmsg_trysend(apr->ch, pkt, hdr->pkt_size); - spin_unlock_irqrestore(&adev->lock, flags); + spin_unlock_irqrestore(&adev->svc.lock, flags);

return ret ? ret : hdr->pkt_size; } @@ -74,7 +79,7 @@ static void apr_dev_release(struct device *dev) static int apr_callback(struct rpmsg_device *rpdev, void *buf, int len, void *priv, u32 addr) { - struct apr *apr = dev_get_drvdata(&rpdev->dev); + struct packet_router *apr = dev_get_drvdata(&rpdev->dev); struct apr_rx_buf *abuf; unsigned long flags;

@@ -100,11 +105,11 @@ static int apr_callback(struct rpmsg_device *rpdev, void *buf, return 0; }

- -static int apr_do_rx_callback(struct apr *apr, struct apr_rx_buf *abuf) +static int apr_do_rx_callback(struct packet_router *apr, struct apr_rx_buf *abuf) { uint16_t hdr_size, msg_type, ver, svc_id; - struct apr_device *svc = NULL; + struct pkt_router_svc *svc; + struct apr_device *adev; struct apr_driver *adrv = NULL; struct apr_resp_pkt resp; struct apr_hdr *hdr; @@ -145,12 +150,15 @@ static int apr_do_rx_callback(struct apr *apr, struct apr_rx_buf *abuf) svc_id = hdr->dest_svc; spin_lock_irqsave(&apr->svcs_lock, flags); svc = idr_find(&apr->svcs_idr, svc_id); - if (svc && svc->dev.driver) - adrv = to_apr_driver(svc->dev.driver); + if (svc && svc->dev->driver) { + adev = svc_to_apr_device(svc); + adrv = to_apr_driver(adev->dev.driver); + } spin_unlock_irqrestore(&apr->svcs_lock, flags);

- if (!adrv) { - dev_err(apr->dev, "APR: service is not registered\n"); + if (!adrv || !adev) { + dev_err(apr->dev, "APR: service is not registered (%d)\n", + svc_id); return -EINVAL; }

@@ -164,20 +172,26 @@ static int apr_do_rx_callback(struct apr *apr, struct apr_rx_buf *abuf) if (resp.payload_size > 0) resp.payload = buf + hdr_size;

- adrv->callback(svc, &resp); + adrv->callback(adev, &resp);

return 0; }

static void apr_rxwq(struct work_struct *work) { - struct apr *apr = container_of(work, struct apr, rx_work); + struct packet_router *apr = container_of(work, struct packet_router, rx_work); struct apr_rx_buf *abuf, *b; unsigned long flags;

if (!list_empty(&apr->rx_list)) { list_for_each_entry_safe(abuf, b, &apr->rx_list, node) { - apr_do_rx_callback(apr, abuf); + switch (apr->type) { + case PR_TYPE_APR: + apr_do_rx_callback(apr, abuf); + break; + default: + break; + } spin_lock_irqsave(&apr->rx_lock, flags); list_del(&abuf->node); spin_unlock_irqrestore(&apr->rx_lock, flags); @@ -201,7 +215,7 @@ static int apr_device_match(struct device *dev, struct device_driver *drv)

while (id->domain_id != 0 || id->svc_id != 0) { if (id->domain_id == adev->domain_id && - id->svc_id == adev->svc_id) + id->svc_id == adev->svc.id) return 1; id++; } @@ -221,14 +235,14 @@ static void apr_device_remove(struct device *dev) { struct apr_device *adev = to_apr_device(dev); struct apr_driver *adrv; - struct apr *apr = dev_get_drvdata(adev->dev.parent); + struct packet_router *apr = dev_get_drvdata(adev->dev.parent);

if (dev->driver) { adrv = to_apr_driver(dev->driver); if (adrv->remove) adrv->remove(adev); spin_lock(&apr->svcs_lock); - idr_remove(&apr->svcs_idr, adev->svc_id); + idr_remove(&apr->svcs_idr, adev->svc.id); spin_unlock(&apr->svcs_lock); } } @@ -255,28 +269,39 @@ struct bus_type aprbus = { EXPORT_SYMBOL_GPL(aprbus);

static int apr_add_device(struct device *dev, struct device_node *np, - const struct apr_device_id *id) + u32 svc_id, u32 domain_id) { - struct apr *apr = dev_get_drvdata(dev); + struct packet_router *apr = dev_get_drvdata(dev); struct apr_device *adev = NULL; + struct pkt_router_svc *svc; int ret;

adev = kzalloc(sizeof(*adev), GFP_KERNEL); if (!adev) return -ENOMEM;

- spin_lock_init(&adev->lock); + adev->svc_id = svc_id; + svc = &adev->svc; + + svc->id = svc_id; + svc->pr = apr; + svc->priv = adev; + svc->dev = dev; + spin_lock_init(&svc->lock); + + adev->domain_id = domain_id;

- adev->svc_id = id->svc_id; - adev->domain_id = id->domain_id; - adev->version = id->svc_version; if (np) snprintf(adev->name, APR_NAME_SIZE, "%pOFn", np); - else - strscpy(adev->name, id->name, APR_NAME_SIZE);

- dev_set_name(&adev->dev, "aprsvc:%s:%x:%x", adev->name, - id->domain_id, id->svc_id); + switch (apr->type) { + case PR_TYPE_APR: + dev_set_name(&adev->dev, "aprsvc:%s:%x:%x", adev->name, + domain_id, svc_id); + break; + default: + break; + }

adev->dev.bus = &aprbus; adev->dev.parent = dev; @@ -285,8 +310,7 @@ static int apr_add_device(struct device *dev, struct device_node *np, adev->dev.driver = NULL;

spin_lock(&apr->svcs_lock); - idr_alloc(&apr->svcs_idr, adev, id->svc_id, - id->svc_id + 1, GFP_ATOMIC); + idr_alloc(&apr->svcs_idr, svc, svc_id, svc_id + 1, GFP_ATOMIC); spin_unlock(&apr->svcs_lock);

of_property_read_string_index(np, "qcom,protection-domain", @@ -306,7 +330,7 @@ static int apr_add_device(struct device *dev, struct device_node *np, static int of_apr_add_pd_lookups(struct device *dev) { const char *service_name, *service_path; - struct apr *apr = dev_get_drvdata(dev); + struct packet_router *apr = dev_get_drvdata(dev); struct device_node *node; struct pdr_service *pds; int ret; @@ -336,13 +360,14 @@ static int of_apr_add_pd_lookups(struct device *dev)

static void of_register_apr_devices(struct device *dev, const char *svc_path) { - struct apr *apr = dev_get_drvdata(dev); + struct packet_router *apr = dev_get_drvdata(dev); struct device_node *node; const char *service_path; int ret;

for_each_child_of_node(dev->of_node, node) { - struct apr_device_id id = { {0} }; + u32 svc_id; + u32 domain_id;

/* * This function is called with svc_path NULL during @@ -372,13 +397,13 @@ static void of_register_apr_devices(struct device *dev, const char *svc_path) continue; }

- if (of_property_read_u32(node, "reg", &id.svc_id)) + if (of_property_read_u32(node, "reg", &svc_id)) continue;

- id.domain_id = apr->dest_domain_id; + domain_id = apr->dest_domain_id;

- if (apr_add_device(dev, node, &id)) - dev_err(dev, "Failed to add apr %d svc\n", id.svc_id); + if (apr_add_device(dev, node, svc_id, domain_id)) + dev_err(dev, "Failed to add apr %d svc\n", svc_id); } }

@@ -398,7 +423,7 @@ static int apr_remove_device(struct device *dev, void *svc_path)

static void apr_pd_status(int state, char *svc_path, void *priv) { - struct apr *apr = (struct apr *)priv; + struct packet_router *apr = (struct packet_router *)priv;

switch (state) { case SERVREG_SERVICE_STATE_UP: @@ -413,16 +438,20 @@ static void apr_pd_status(int state, char *svc_path, void *priv) static int apr_probe(struct rpmsg_device *rpdev) { struct device *dev = &rpdev->dev; - struct apr *apr; + struct packet_router *apr; int ret;

apr = devm_kzalloc(dev, sizeof(*apr), GFP_KERNEL); if (!apr) return -ENOMEM;

- ret = of_property_read_u32(dev->of_node, "qcom,apr-domain", &apr->dest_domain_id); + ret = of_property_read_u32(dev->of_node, "qcom,domain", &apr->dest_domain_id); + if (ret) /* try deprecated apr-domain property */ + ret = of_property_read_u32(dev->of_node, "qcom,apr-domain", + &apr->dest_domain_id); + apr->type = PR_TYPE_APR; if (ret) { - dev_err(dev, "APR Domain ID not specified in DT\n"); + dev_err(dev, "Domain ID not specified in DT\n"); return ret; }

@@ -465,7 +494,7 @@ static int apr_probe(struct rpmsg_device *rpdev)

static void apr_remove(struct rpmsg_device *rpdev) { - struct apr *apr = dev_get_drvdata(&rpdev->dev); + struct packet_router *apr = dev_get_drvdata(&rpdev->dev);

pdr_handle_release(apr->pdr); device_for_each_child(&rpdev->dev, NULL, apr_remove_device); @@ -502,20 +531,20 @@ void apr_driver_unregister(struct apr_driver *drv) } EXPORT_SYMBOL_GPL(apr_driver_unregister);

-static const struct of_device_id apr_of_match[] = { +static const struct of_device_id pkt_router_of_match[] = { { .compatible = "qcom,apr"}, { .compatible = "qcom,apr-v2"}, {} }; -MODULE_DEVICE_TABLE(of, apr_of_match); +MODULE_DEVICE_TABLE(of, pkt_router_of_match);

-static struct rpmsg_driver apr_driver = { +static struct rpmsg_driver packet_router_driver = { .probe = apr_probe, .remove = apr_remove, .callback = apr_callback, .drv = { .name = "qcom,apr", - .of_match_table = apr_of_match, + .of_match_table = pkt_router_of_match, }, };

@@ -525,7 +554,7 @@ static int __init apr_init(void)

ret = bus_register(&aprbus); if (!ret) - ret = register_rpmsg_driver(&apr_driver); + ret = register_rpmsg_driver(&packet_router_driver); else bus_unregister(&aprbus);

@@ -535,7 +564,7 @@ static int __init apr_init(void) static void __exit apr_exit(void) { bus_unregister(&aprbus); - unregister_rpmsg_driver(&apr_driver); + unregister_rpmsg_driver(&packet_router_driver); }

subsys_initcall(apr_init); diff --git a/include/linux/soc/qcom/apr.h b/include/linux/soc/qcom/apr.h index 137f9f2ac4c3..7bca213a3f83 100644 --- a/include/linux/soc/qcom/apr.h +++ b/include/linux/soc/qcom/apr.h @@ -79,6 +79,15 @@ struct apr_resp_pkt { #define APR_SVC_MAJOR_VERSION(v) ((v >> 16) & 0xFF) #define APR_SVC_MINOR_VERSION(v) (v & 0xFF)

+struct packet_router; +struct pkt_router_svc { + struct device *dev; + struct packet_router *pr; + spinlock_t lock; + int id; + void *priv; +}; + struct apr_device { struct device dev; uint16_t svc_id; @@ -86,11 +95,12 @@ struct apr_device { uint32_t version; char name[APR_NAME_SIZE]; const char *service_path; - spinlock_t lock; + struct pkt_router_svc svc; struct list_head node; };

#define to_apr_device(d) container_of(d, struct apr_device, dev) +#define svc_to_apr_device(d) container_of(d, struct apr_device, svc)

struct apr_driver { int (*probe)(struct apr_device *sl);

q6afe (Audio Front End) is one of the DSP service that handles both LPASS (Low Power Audio SubSystem) Audio ports and LPASS clocks. As LPASS is a hardwware IP and commonly used by Qualcomm Audio DSP. In order to allow multiple DSP frameworks to use these bindings its best to move it out from the dsp specific bindings.

For compatibility reasons and not breaking which is already working we still maintain same compatible string "qcom,q6afe-dais"

Also as part of this change convert these LPASS dai related bindings into yaml format.

Signed-off-by: Srinivas Kandagatla srinivas.kandagatla@linaro.org Reviewed-by: Rob Herring robh@kernel.org --- .../devicetree/bindings/sound/qcom,q6afe.txt | 158 ---------------- .../sound/qcom,q6dsp-lpass-ports.yaml | 178 ++++++++++++++++++ 2 files changed, 178 insertions(+), 158 deletions(-) create mode 100644 Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-ports.yaml

diff --git a/Documentation/devicetree/bindings/sound/qcom,q6afe.txt b/Documentation/devicetree/bindings/sound/qcom,q6afe.txt index 2d6fb2ea75a0..fcf81058504c 100644 --- a/Documentation/devicetree/bindings/sound/qcom,q6afe.txt +++ b/Documentation/devicetree/bindings/sound/qcom,q6afe.txt @@ -12,92 +12,6 @@ used by all apr services. Must contain the following properties. from DSP. example "qcom,q6afe"

-= AFE DAIs (Digial Audio Interface) -"dais" subnode of the AFE node. It represents afe dais, each afe dai is a -subnode of "dais" representing board specific dai setup. -"dais" node should have following properties followed by dai children. - -- compatible: - Usage: required - Value type: <stringlist> - Definition: must be "qcom,q6afe-dais" - -- #sound-dai-cells - Usage: required - Value type: <u32> - Definition: Must be 1 - -- #address-cells - Usage: required - Value type: <u32> - Definition: Must be 1 - -- #size-cells - Usage: required - Value type: <u32> - Definition: Must be 0 - -== AFE DAI is subnode of "dais" and represent a dai, it includes board specific -configuration of each dai. Must contain the following properties. - -- reg - Usage: required - Value type: <u32> - Definition: Must be dai id - -- qcom,sd-lines - Usage: required for mi2s interface - Value type: <prop-encoded-array> - Definition: Must be list of serial data lines used by this dai. - should be one or more of the 0-3 sd lines. - - - qcom,tdm-sync-mode: - Usage: required for tdm interface - Value type: <prop-encoded-array> - Definition: Synchronization mode. - 0 - Short sync bit mode - 1 - Long sync mode - 2 - Short sync slot mode - - - qcom,tdm-sync-src: - Usage: required for tdm interface - Value type: <prop-encoded-array> - Definition: Synchronization source. - 0 - External source - 1 - Internal source - - - qcom,tdm-data-out: - Usage: required for tdm interface - Value type: <prop-encoded-array> - Definition: Data out signal to drive with other masters. - 0 - Disable - 1 - Enable - - - qcom,tdm-invert-sync: - Usage: required for tdm interface - Value type: <prop-encoded-array> - Definition: Invert the sync. - 0 - Normal - 1 - Invert - - - qcom,tdm-data-delay: - Usage: required for tdm interface - Value type: <prop-encoded-array> - Definition: Number of bit clock to delay data - with respect to sync edge. - 0 - 0 bit clock cycle - 1 - 1 bit clock cycle - 2 - 2 bit clock cycle - - - qcom,tdm-data-align: - Usage: required for tdm interface - Value type: <prop-encoded-array> - Definition: Indicate how data is packed - within the slot. For example, 32 slot width in case of - sample bit width is 24. - 0 - MSB - 1 - LSB - = AFE CLOCKSS "clocks" subnode of the AFE node. It represents q6afe clocks "clocks" node should have following properties. @@ -122,78 +36,6 @@ apr-service@4 { compatible = "qcom,q6afe"; reg = <APR_SVC_AFE>;

- dais { - compatible = "qcom,q6afe-dais"; - #sound-dai-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - - dai@1 { - reg = <HDMI_RX>; - }; - - dai@24 { - reg = <PRIMARY_TDM_RX_0>; - qcom,tdm-sync-mode = <1>: - qcom,tdm-sync-src = <1>; - qcom,tdm-data-out = <0>; - qcom,tdm-invert-sync = <1>; - qcom,tdm-data-delay = <1>; - qcom,tdm-data-align = <0>; - - }; - - dai@25 { - reg = <PRIMARY_TDM_TX_0>; - qcom,tdm-sync-mode = <1>: - qcom,tdm-sync-src = <1>; - qcom,tdm-data-out = <0>; - qcom,tdm-invert-sync = <1>; - qcom,tdm-data-delay <1>: - qcom,tdm-data-align = <0>; - }; - - dai@16 { - reg = <PRIMARY_MI2S_RX>; - qcom,sd-lines = <0 2>; - }; - - dai@17 { - reg = <PRIMARY_MI2S_TX>; - qcom,sd-lines = <1>; - }; - - dai@18 { - reg = <SECONDARY_MI2S_RX>; - qcom,sd-lines = <0 3>; - }; - - dai@19 { - reg = <SECONDARY_MI2S_TX>; - qcom,sd-lines = <1>; - }; - - dai@20 { - reg = <TERTIARY_MI2S_RX>; - qcom,sd-lines = <1 3>; - }; - - dai@21 { - reg = <TERTIARY_MI2S_TX>; - qcom,sd-lines = <0>; - }; - - dai@22 { - reg = <QUATERNARY_MI2S_RX>; - qcom,sd-lines = <0>; - }; - - dai@23 { - reg = <QUATERNARY_MI2S_TX>; - qcom,sd-lines = <1>; - }; - }; - clocks { compatible = "qcom,q6afe-clocks"; #clock-cells = <2>; diff --git a/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-ports.yaml b/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-ports.yaml new file mode 100644 index 000000000000..e6148c17419b --- /dev/null +++ b/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-ports.yaml @@ -0,0 +1,178 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/sound/qcom,q6dsp-lpass-ports.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm DSP LPASS(Low Power Audio SubSystem) Audio Ports binding + +maintainers: + - Srinivas Kandagatla srinivas.kandagatla@linaro.org + +description: | + This binding describes the Qualcomm DSP LPASS Audio ports + +properties: + compatible: + enum: + - qcom,q6afe-dais + + reg: + maxItems: 1 + + '#sound-dai-cells': + const: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +#Digital Audio Interfaces +patternProperties: + '^dai@[0-9]+$': + type: object + description: + Q6DSP Digital Audio Interfaces. + + properties: + reg: + description: + Digital Audio Interface ID + + qcom,sd-lines: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + List of serial data lines used by this dai.should be one or more of the 0-3 sd lines. + minItems: 1 + maxItems: 4 + uniqueItems: true + items: + minimum: 0 + maximum: 3 + + qcom,tdm-sync-mode: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2] + description: + TDM Synchronization mode + 0 = Short sync bit mode + 1 = Long sync mode + 2 = Short sync slot mode + + qcom,tdm-sync-src: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: + TDM Synchronization source + 0 = External source + 1 = Internal source + + qcom,tdm-data-out: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: + TDM Data out signal to drive with other masters + 0 = Disable + 1 = Enable + + qcom,tdm-invert-sync: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: + TDM Invert the sync + 0 = Normal + 1 = Invert + + qcom,tdm-data-delay: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2] + description: + TDM Number of bit clock to delay data + 0 = 0 bit clock cycle + 1 = 1 bit clock cycle + 2 = 2 bit clock cycle + + qcom,tdm-data-align: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: + Indicate how data is packed within the slot. For example, 32 slot + width in case of sample bit width is 24TDM Invert the sync. + 0 = MSB + 1 = LSB + + required: + - reg + + allOf: + - if: + properties: + reg: + contains: + # TDM DAI ID range from PRIMARY_TDM_RX_0 - QUINARY_TDM_TX_7 + items: + minimum: 24 + maximum: 103 + then: + required: + - qcom,tdm-sync-mode + - qcom,tdm-sync-src + - qcom,tdm-data-out + - qcom,tdm-invert-sync + - qcom,tdm-data-delay + - qcom,tdm-data-align + + - if: + properties: + reg: + contains: + # MI2S DAI ID range PRIMARY_MI2S_RX - QUATERNARY_MI2S_TX and + # QUINARY_MI2S_RX - QUINARY_MI2S_TX + items: + oneOf: + - minimum: 16 + maximum: 23 + - minimum: 127 + maximum: 128 + then: + required: + - qcom,sd-lines + + additionalProperties: false + +required: + - compatible + - reg + - "#sound-dai-cells" + - "#address-cells" + - "#size-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/soc/qcom,apr.h> + #include <dt-bindings/sound/qcom,q6afe.h> + apr { + #address-cells = <1>; + #size-cells = <0>; + apr-service@4 { + reg = <APR_SVC_AFE>; + #address-cells = <1>; + #size-cells = <0>; + q6afedai@1 { + compatible = "qcom,q6afe-dais"; + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + #sound-dai-cells = <1>; + + dai@22 { + reg = <QUATERNARY_MI2S_RX>; + qcom,sd-lines = <0 1 2 3>; + }; + }; + }; + };

move all LPASS audio ports defines from q6afe.h to q6dsp-lpass-ports.h as these belong to LPASS IP. Also this move helps in reusing this header across multiple audio frameworks on Qualcomm Audio DSP.

This patch is split out of the dt-bindings patch to enable easy review.

Signed-off-by: Srinivas Kandagatla srinivas.kandagatla@linaro.org Acked-by: Rob Herring robh@kernel.org --- include/dt-bindings/sound/qcom,q6afe.h | 203 +---------------- .../sound/qcom,q6dsp-lpass-ports.h | 208 ++++++++++++++++++ 2 files changed, 210 insertions(+), 201 deletions(-) create mode 100644 include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h

diff --git a/include/dt-bindings/sound/qcom,q6afe.h b/include/dt-bindings/sound/qcom,q6afe.h index 66c21ab03eef..9d5d89cfabcf 100644 --- a/include/dt-bindings/sound/qcom,q6afe.h +++ b/include/dt-bindings/sound/qcom,q6afe.h @@ -2,207 +2,8 @@ #ifndef __DT_BINDINGS_Q6_AFE_H__ #define __DT_BINDINGS_Q6_AFE_H__

-/* Audio Front End (AFE) virtual ports IDs */ -#define HDMI_RX 1 -#define SLIMBUS_0_RX 2 -#define SLIMBUS_0_TX 3 -#define SLIMBUS_1_RX 4 -#define SLIMBUS_1_TX 5 -#define SLIMBUS_2_RX 6 -#define SLIMBUS_2_TX 7 -#define SLIMBUS_3_RX 8 -#define SLIMBUS_3_TX 9 -#define SLIMBUS_4_RX 10 -#define SLIMBUS_4_TX 11 -#define SLIMBUS_5_RX 12 -#define SLIMBUS_5_TX 13 -#define SLIMBUS_6_RX 14 -#define SLIMBUS_6_TX 15 -#define PRIMARY_MI2S_RX 16 -#define PRIMARY_MI2S_TX 17 -#define SECONDARY_MI2S_RX 18 -#define SECONDARY_MI2S_TX 19 -#define TERTIARY_MI2S_RX 20 -#define TERTIARY_MI2S_TX 21 -#define QUATERNARY_MI2S_RX 22 -#define QUATERNARY_MI2S_TX 23 -#define PRIMARY_TDM_RX_0 24 -#define PRIMARY_TDM_TX_0 25 -#define PRIMARY_TDM_RX_1 26 -#define PRIMARY_TDM_TX_1 27 -#define PRIMARY_TDM_RX_2 28 -#define PRIMARY_TDM_TX_2 29 -#define PRIMARY_TDM_RX_3 30 -#define PRIMARY_TDM_TX_3 31 -#define PRIMARY_TDM_RX_4 32 -#define PRIMARY_TDM_TX_4 33 -#define PRIMARY_TDM_RX_5 34 -#define PRIMARY_TDM_TX_5 35 -#define PRIMARY_TDM_RX_6 36 -#define PRIMARY_TDM_TX_6 37 -#define PRIMARY_TDM_RX_7 38 -#define PRIMARY_TDM_TX_7 39 -#define SECONDARY_TDM_RX_0 40 -#define SECONDARY_TDM_TX_0 41 -#define SECONDARY_TDM_RX_1 42 -#define SECONDARY_TDM_TX_1 43 -#define SECONDARY_TDM_RX_2 44 -#define SECONDARY_TDM_TX_2 45 -#define SECONDARY_TDM_RX_3 46 -#define SECONDARY_TDM_TX_3 47 -#define SECONDARY_TDM_RX_4 48 -#define SECONDARY_TDM_TX_4 49 -#define SECONDARY_TDM_RX_5 50 -#define SECONDARY_TDM_TX_5 51 -#define SECONDARY_TDM_RX_6 52 -#define SECONDARY_TDM_TX_6 53 -#define SECONDARY_TDM_RX_7 54 -#define SECONDARY_TDM_TX_7 55 -#define TERTIARY_TDM_RX_0 56 -#define TERTIARY_TDM_TX_0 57 -#define TERTIARY_TDM_RX_1 58 -#define TERTIARY_TDM_TX_1 59 -#define TERTIARY_TDM_RX_2 60 -#define TERTIARY_TDM_TX_2 61 -#define TERTIARY_TDM_RX_3 62 -#define TERTIARY_TDM_TX_3 63 -#define TERTIARY_TDM_RX_4 64 -#define TERTIARY_TDM_TX_4 65 -#define TERTIARY_TDM_RX_5 66 -#define TERTIARY_TDM_TX_5 67 -#define TERTIARY_TDM_RX_6 68 -#define TERTIARY_TDM_TX_6 69 -#define TERTIARY_TDM_RX_7 70 -#define TERTIARY_TDM_TX_7 71 -#define QUATERNARY_TDM_RX_0 72 -#define QUATERNARY_TDM_TX_0 73 -#define QUATERNARY_TDM_RX_1 74 -#define QUATERNARY_TDM_TX_1 75 -#define QUATERNARY_TDM_RX_2 76 -#define QUATERNARY_TDM_TX_2 77 -#define QUATERNARY_TDM_RX_3 78 -#define QUATERNARY_TDM_TX_3 79 -#define QUATERNARY_TDM_RX_4 80 -#define QUATERNARY_TDM_TX_4 81 -#define QUATERNARY_TDM_RX_5 82 -#define QUATERNARY_TDM_TX_5 83 -#define QUATERNARY_TDM_RX_6 84 -#define QUATERNARY_TDM_TX_6 85 -#define QUATERNARY_TDM_RX_7 86 -#define QUATERNARY_TDM_TX_7 87 -#define QUINARY_TDM_RX_0 88 -#define QUINARY_TDM_TX_0 89 -#define QUINARY_TDM_RX_1 90 -#define QUINARY_TDM_TX_1 91 -#define QUINARY_TDM_RX_2 92 -#define QUINARY_TDM_TX_2 93 -#define QUINARY_TDM_RX_3 94 -#define QUINARY_TDM_TX_3 95 -#define QUINARY_TDM_RX_4 96 -#define QUINARY_TDM_TX_4 97 -#define QUINARY_TDM_RX_5 98 -#define QUINARY_TDM_TX_5 99 -#define QUINARY_TDM_RX_6 100 -#define QUINARY_TDM_TX_6 101 -#define QUINARY_TDM_RX_7 102 -#define QUINARY_TDM_TX_7 103 -#define DISPLAY_PORT_RX 104 -#define WSA_CODEC_DMA_RX_0 105 -#define WSA_CODEC_DMA_TX_0 106 -#define WSA_CODEC_DMA_RX_1 107 -#define WSA_CODEC_DMA_TX_1 108 -#define WSA_CODEC_DMA_TX_2 109 -#define VA_CODEC_DMA_TX_0 110 -#define VA_CODEC_DMA_TX_1 111 -#define VA_CODEC_DMA_TX_2 112 -#define RX_CODEC_DMA_RX_0 113 -#define TX_CODEC_DMA_TX_0 114 -#define RX_CODEC_DMA_RX_1 115 -#define TX_CODEC_DMA_TX_1 116 -#define RX_CODEC_DMA_RX_2 117 -#define TX_CODEC_DMA_TX_2 118 -#define RX_CODEC_DMA_RX_3 119 -#define TX_CODEC_DMA_TX_3 120 -#define RX_CODEC_DMA_RX_4 121 -#define TX_CODEC_DMA_TX_4 122 -#define RX_CODEC_DMA_RX_5 123 -#define TX_CODEC_DMA_TX_5 124 -#define RX_CODEC_DMA_RX_6 125 -#define RX_CODEC_DMA_RX_7 126 -#define QUINARY_MI2S_RX 127 -#define QUINARY_MI2S_TX 128 +/* This file exists due to backward compatibility reasons, Please do not DELETE! */

-#define LPASS_CLK_ID_PRI_MI2S_IBIT 1 -#define LPASS_CLK_ID_PRI_MI2S_EBIT 2 -#define LPASS_CLK_ID_SEC_MI2S_IBIT 3 -#define LPASS_CLK_ID_SEC_MI2S_EBIT 4 -#define LPASS_CLK_ID_TER_MI2S_IBIT 5 -#define LPASS_CLK_ID_TER_MI2S_EBIT 6 -#define LPASS_CLK_ID_QUAD_MI2S_IBIT 7 -#define LPASS_CLK_ID_QUAD_MI2S_EBIT 8 -#define LPASS_CLK_ID_SPEAKER_I2S_IBIT 9 -#define LPASS_CLK_ID_SPEAKER_I2S_EBIT 10 -#define LPASS_CLK_ID_SPEAKER_I2S_OSR 11 -#define LPASS_CLK_ID_QUI_MI2S_IBIT 12 -#define LPASS_CLK_ID_QUI_MI2S_EBIT 13 -#define LPASS_CLK_ID_SEN_MI2S_IBIT 14 -#define LPASS_CLK_ID_SEN_MI2S_EBIT 15 -#define LPASS_CLK_ID_INT0_MI2S_IBIT 16 -#define LPASS_CLK_ID_INT1_MI2S_IBIT 17 -#define LPASS_CLK_ID_INT2_MI2S_IBIT 18 -#define LPASS_CLK_ID_INT3_MI2S_IBIT 19 -#define LPASS_CLK_ID_INT4_MI2S_IBIT 20 -#define LPASS_CLK_ID_INT5_MI2S_IBIT 21 -#define LPASS_CLK_ID_INT6_MI2S_IBIT 22 -#define LPASS_CLK_ID_QUI_MI2S_OSR 23 -#define LPASS_CLK_ID_PRI_PCM_IBIT 24 -#define LPASS_CLK_ID_PRI_PCM_EBIT 25 -#define LPASS_CLK_ID_SEC_PCM_IBIT 26 -#define LPASS_CLK_ID_SEC_PCM_EBIT 27 -#define LPASS_CLK_ID_TER_PCM_IBIT 28 -#define LPASS_CLK_ID_TER_PCM_EBIT 29 -#define LPASS_CLK_ID_QUAD_PCM_IBIT 30 -#define LPASS_CLK_ID_QUAD_PCM_EBIT 31 -#define LPASS_CLK_ID_QUIN_PCM_IBIT 32 -#define LPASS_CLK_ID_QUIN_PCM_EBIT 33 -#define LPASS_CLK_ID_QUI_PCM_OSR 34 -#define LPASS_CLK_ID_PRI_TDM_IBIT 35 -#define LPASS_CLK_ID_PRI_TDM_EBIT 36 -#define LPASS_CLK_ID_SEC_TDM_IBIT 37 -#define LPASS_CLK_ID_SEC_TDM_EBIT 38 -#define LPASS_CLK_ID_TER_TDM_IBIT 39 -#define LPASS_CLK_ID_TER_TDM_EBIT 40 -#define LPASS_CLK_ID_QUAD_TDM_IBIT 41 -#define LPASS_CLK_ID_QUAD_TDM_EBIT 42 -#define LPASS_CLK_ID_QUIN_TDM_IBIT 43 -#define LPASS_CLK_ID_QUIN_TDM_EBIT 44 -#define LPASS_CLK_ID_QUIN_TDM_OSR 45 -#define LPASS_CLK_ID_MCLK_1 46 -#define LPASS_CLK_ID_MCLK_2 47 -#define LPASS_CLK_ID_MCLK_3 48 -#define LPASS_CLK_ID_MCLK_4 49 -#define LPASS_CLK_ID_INTERNAL_DIGITAL_CODEC_CORE 50 -#define LPASS_CLK_ID_INT_MCLK_0 51 -#define LPASS_CLK_ID_INT_MCLK_1 52 -#define LPASS_CLK_ID_MCLK_5 53 -#define LPASS_CLK_ID_WSA_CORE_MCLK 54 -#define LPASS_CLK_ID_WSA_CORE_NPL_MCLK 55 -#define LPASS_CLK_ID_VA_CORE_MCLK 56 -#define LPASS_CLK_ID_TX_CORE_MCLK 57 -#define LPASS_CLK_ID_TX_CORE_NPL_MCLK 58 -#define LPASS_CLK_ID_RX_CORE_MCLK 59 -#define LPASS_CLK_ID_RX_CORE_NPL_MCLK 60 -#define LPASS_CLK_ID_VA_CORE_2X_MCLK 61 - -#define LPASS_HW_AVTIMER_VOTE 101 -#define LPASS_HW_MACRO_VOTE 102 -#define LPASS_HW_DCODEC_VOTE 103 - -#define Q6AFE_MAX_CLK_ID 104 - -#define LPASS_CLK_ATTRIBUTE_INVALID 0x0 -#define LPASS_CLK_ATTRIBUTE_COUPLE_NO 0x1 -#define LPASS_CLK_ATTRIBUTE_COUPLE_DIVIDEND 0x2 -#define LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR 0x3 +#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>

#endif /* __DT_BINDINGS_Q6_AFE_H__ */ diff --git a/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h b/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h new file mode 100644 index 000000000000..0d3276c8fc11 --- /dev/null +++ b/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h @@ -0,0 +1,208 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __DT_BINDINGS_Q6_AUDIO_PORTS_H__ +#define __DT_BINDINGS_Q6_AUDIO_PORTS_H__ + +/* LPASS Audio virtual ports IDs */ +#define HDMI_RX 1 +#define SLIMBUS_0_RX 2 +#define SLIMBUS_0_TX 3 +#define SLIMBUS_1_RX 4 +#define SLIMBUS_1_TX 5 +#define SLIMBUS_2_RX 6 +#define SLIMBUS_2_TX 7 +#define SLIMBUS_3_RX 8 +#define SLIMBUS_3_TX 9 +#define SLIMBUS_4_RX 10 +#define SLIMBUS_4_TX 11 +#define SLIMBUS_5_RX 12 +#define SLIMBUS_5_TX 13 +#define SLIMBUS_6_RX 14 +#define SLIMBUS_6_TX 15 +#define PRIMARY_MI2S_RX 16 +#define PRIMARY_MI2S_TX 17 +#define SECONDARY_MI2S_RX 18 +#define SECONDARY_MI2S_TX 19 +#define TERTIARY_MI2S_RX 20 +#define TERTIARY_MI2S_TX 21 +#define QUATERNARY_MI2S_RX 22 +#define QUATERNARY_MI2S_TX 23 +#define PRIMARY_TDM_RX_0 24 +#define PRIMARY_TDM_TX_0 25 +#define PRIMARY_TDM_RX_1 26 +#define PRIMARY_TDM_TX_1 27 +#define PRIMARY_TDM_RX_2 28 +#define PRIMARY_TDM_TX_2 29 +#define PRIMARY_TDM_RX_3 30 +#define PRIMARY_TDM_TX_3 31 +#define PRIMARY_TDM_RX_4 32 +#define PRIMARY_TDM_TX_4 33 +#define PRIMARY_TDM_RX_5 34 +#define PRIMARY_TDM_TX_5 35 +#define PRIMARY_TDM_RX_6 36 +#define PRIMARY_TDM_TX_6 37 +#define PRIMARY_TDM_RX_7 38 +#define PRIMARY_TDM_TX_7 39 +#define SECONDARY_TDM_RX_0 40 +#define SECONDARY_TDM_TX_0 41 +#define SECONDARY_TDM_RX_1 42 +#define SECONDARY_TDM_TX_1 43 +#define SECONDARY_TDM_RX_2 44 +#define SECONDARY_TDM_TX_2 45 +#define SECONDARY_TDM_RX_3 46 +#define SECONDARY_TDM_TX_3 47 +#define SECONDARY_TDM_RX_4 48 +#define SECONDARY_TDM_TX_4 49 +#define SECONDARY_TDM_RX_5 50 +#define SECONDARY_TDM_TX_5 51 +#define SECONDARY_TDM_RX_6 52 +#define SECONDARY_TDM_TX_6 53 +#define SECONDARY_TDM_RX_7 54 +#define SECONDARY_TDM_TX_7 55 +#define TERTIARY_TDM_RX_0 56 +#define TERTIARY_TDM_TX_0 57 +#define TERTIARY_TDM_RX_1 58 +#define TERTIARY_TDM_TX_1 59 +#define TERTIARY_TDM_RX_2 60 +#define TERTIARY_TDM_TX_2 61 +#define TERTIARY_TDM_RX_3 62 +#define TERTIARY_TDM_TX_3 63 +#define TERTIARY_TDM_RX_4 64 +#define TERTIARY_TDM_TX_4 65 +#define TERTIARY_TDM_RX_5 66 +#define TERTIARY_TDM_TX_5 67 +#define TERTIARY_TDM_RX_6 68 +#define TERTIARY_TDM_TX_6 69 +#define TERTIARY_TDM_RX_7 70 +#define TERTIARY_TDM_TX_7 71 +#define QUATERNARY_TDM_RX_0 72 +#define QUATERNARY_TDM_TX_0 73 +#define QUATERNARY_TDM_RX_1 74 +#define QUATERNARY_TDM_TX_1 75 +#define QUATERNARY_TDM_RX_2 76 +#define QUATERNARY_TDM_TX_2 77 +#define QUATERNARY_TDM_RX_3 78 +#define QUATERNARY_TDM_TX_3 79 +#define QUATERNARY_TDM_RX_4 80 +#define QUATERNARY_TDM_TX_4 81 +#define QUATERNARY_TDM_RX_5 82 +#define QUATERNARY_TDM_TX_5 83 +#define QUATERNARY_TDM_RX_6 84 +#define QUATERNARY_TDM_TX_6 85 +#define QUATERNARY_TDM_RX_7 86 +#define QUATERNARY_TDM_TX_7 87 +#define QUINARY_TDM_RX_0 88 +#define QUINARY_TDM_TX_0 89 +#define QUINARY_TDM_RX_1 90 +#define QUINARY_TDM_TX_1 91 +#define QUINARY_TDM_RX_2 92 +#define QUINARY_TDM_TX_2 93 +#define QUINARY_TDM_RX_3 94 +#define QUINARY_TDM_TX_3 95 +#define QUINARY_TDM_RX_4 96 +#define QUINARY_TDM_TX_4 97 +#define QUINARY_TDM_RX_5 98 +#define QUINARY_TDM_TX_5 99 +#define QUINARY_TDM_RX_6 100 +#define QUINARY_TDM_TX_6 101 +#define QUINARY_TDM_RX_7 102 +#define QUINARY_TDM_TX_7 103 +#define DISPLAY_PORT_RX 104 +#define WSA_CODEC_DMA_RX_0 105 +#define WSA_CODEC_DMA_TX_0 106 +#define WSA_CODEC_DMA_RX_1 107 +#define WSA_CODEC_DMA_TX_1 108 +#define WSA_CODEC_DMA_TX_2 109 +#define VA_CODEC_DMA_TX_0 110 +#define VA_CODEC_DMA_TX_1 111 +#define VA_CODEC_DMA_TX_2 112 +#define RX_CODEC_DMA_RX_0 113 +#define TX_CODEC_DMA_TX_0 114 +#define RX_CODEC_DMA_RX_1 115 +#define TX_CODEC_DMA_TX_1 116 +#define RX_CODEC_DMA_RX_2 117 +#define TX_CODEC_DMA_TX_2 118 +#define RX_CODEC_DMA_RX_3 119 +#define TX_CODEC_DMA_TX_3 120 +#define RX_CODEC_DMA_RX_4 121 +#define TX_CODEC_DMA_TX_4 122 +#define RX_CODEC_DMA_RX_5 123 +#define TX_CODEC_DMA_TX_5 124 +#define RX_CODEC_DMA_RX_6 125 +#define RX_CODEC_DMA_RX_7 126 +#define QUINARY_MI2S_RX 127 +#define QUINARY_MI2S_TX 128 + +#define LPASS_CLK_ID_PRI_MI2S_IBIT 1 +#define LPASS_CLK_ID_PRI_MI2S_EBIT 2 +#define LPASS_CLK_ID_SEC_MI2S_IBIT 3 +#define LPASS_CLK_ID_SEC_MI2S_EBIT 4 +#define LPASS_CLK_ID_TER_MI2S_IBIT 5 +#define LPASS_CLK_ID_TER_MI2S_EBIT 6 +#define LPASS_CLK_ID_QUAD_MI2S_IBIT 7 +#define LPASS_CLK_ID_QUAD_MI2S_EBIT 8 +#define LPASS_CLK_ID_SPEAKER_I2S_IBIT 9 +#define LPASS_CLK_ID_SPEAKER_I2S_EBIT 10 +#define LPASS_CLK_ID_SPEAKER_I2S_OSR 11 +#define LPASS_CLK_ID_QUI_MI2S_IBIT 12 +#define LPASS_CLK_ID_QUI_MI2S_EBIT 13 +#define LPASS_CLK_ID_SEN_MI2S_IBIT 14 +#define LPASS_CLK_ID_SEN_MI2S_EBIT 15 +#define LPASS_CLK_ID_INT0_MI2S_IBIT 16 +#define LPASS_CLK_ID_INT1_MI2S_IBIT 17 +#define LPASS_CLK_ID_INT2_MI2S_IBIT 18 +#define LPASS_CLK_ID_INT3_MI2S_IBIT 19 +#define LPASS_CLK_ID_INT4_MI2S_IBIT 20 +#define LPASS_CLK_ID_INT5_MI2S_IBIT 21 +#define LPASS_CLK_ID_INT6_MI2S_IBIT 22 +#define LPASS_CLK_ID_QUI_MI2S_OSR 23 +#define LPASS_CLK_ID_PRI_PCM_IBIT 24 +#define LPASS_CLK_ID_PRI_PCM_EBIT 25 +#define LPASS_CLK_ID_SEC_PCM_IBIT 26 +#define LPASS_CLK_ID_SEC_PCM_EBIT 27 +#define LPASS_CLK_ID_TER_PCM_IBIT 28 +#define LPASS_CLK_ID_TER_PCM_EBIT 29 +#define LPASS_CLK_ID_QUAD_PCM_IBIT 30 +#define LPASS_CLK_ID_QUAD_PCM_EBIT 31 +#define LPASS_CLK_ID_QUIN_PCM_IBIT 32 +#define LPASS_CLK_ID_QUIN_PCM_EBIT 33 +#define LPASS_CLK_ID_QUI_PCM_OSR 34 +#define LPASS_CLK_ID_PRI_TDM_IBIT 35 +#define LPASS_CLK_ID_PRI_TDM_EBIT 36 +#define LPASS_CLK_ID_SEC_TDM_IBIT 37 +#define LPASS_CLK_ID_SEC_TDM_EBIT 38 +#define LPASS_CLK_ID_TER_TDM_IBIT 39 +#define LPASS_CLK_ID_TER_TDM_EBIT 40 +#define LPASS_CLK_ID_QUAD_TDM_IBIT 41 +#define LPASS_CLK_ID_QUAD_TDM_EBIT 42 +#define LPASS_CLK_ID_QUIN_TDM_IBIT 43 +#define LPASS_CLK_ID_QUIN_TDM_EBIT 44 +#define LPASS_CLK_ID_QUIN_TDM_OSR 45 +#define LPASS_CLK_ID_MCLK_1 46 +#define LPASS_CLK_ID_MCLK_2 47 +#define LPASS_CLK_ID_MCLK_3 48 +#define LPASS_CLK_ID_MCLK_4 49 +#define LPASS_CLK_ID_INTERNAL_DIGITAL_CODEC_CORE 50 +#define LPASS_CLK_ID_INT_MCLK_0 51 +#define LPASS_CLK_ID_INT_MCLK_1 52 +#define LPASS_CLK_ID_MCLK_5 53 +#define LPASS_CLK_ID_WSA_CORE_MCLK 54 +#define LPASS_CLK_ID_WSA_CORE_NPL_MCLK 55 +#define LPASS_CLK_ID_VA_CORE_MCLK 56 +#define LPASS_CLK_ID_TX_CORE_MCLK 57 +#define LPASS_CLK_ID_TX_CORE_NPL_MCLK 58 +#define LPASS_CLK_ID_RX_CORE_MCLK 59 +#define LPASS_CLK_ID_RX_CORE_NPL_MCLK 60 +#define LPASS_CLK_ID_VA_CORE_2X_MCLK 61 + +#define LPASS_HW_AVTIMER_VOTE 101 +#define LPASS_HW_MACRO_VOTE 102 +#define LPASS_HW_DCODEC_VOTE 103 + +#define Q6AFE_MAX_CLK_ID 104 + +#define LPASS_CLK_ATTRIBUTE_INVALID 0x0 +#define LPASS_CLK_ATTRIBUTE_COUPLE_NO 0x1 +#define LPASS_CLK_ATTRIBUTE_COUPLE_DIVIDEND 0x2 +#define LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR 0x3 + +#endif /* __DT_BINDINGS_Q6_AUDIO_PORTS_H__ */

Move common parts of q6afe-clocks to q6dsp-lpass-clocks so that we could reuse most of the driver for new Q6DSP audio frameworks.

This is to make the code reuseable for new Q6DSP AudioReach framework.

Signed-off-by: Srinivas Kandagatla srinivas.kandagatla@linaro.org --- sound/soc/qcom/qdsp6/Makefile | 2 +- sound/soc/qcom/qdsp6/q6afe-clocks.c | 187 ++-------------------- sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c | 186 +++++++++++++++++++++ sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.h | 30 ++++ 4 files changed, 232 insertions(+), 173 deletions(-) create mode 100644 sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c create mode 100644 sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.h

diff --git a/sound/soc/qcom/qdsp6/Makefile b/sound/soc/qcom/qdsp6/Makefile index 11e8705bbc5c..a4191d395557 100644 --- a/sound/soc/qcom/qdsp6/Makefile +++ b/sound/soc/qcom/qdsp6/Makefile @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only -snd-q6dsp-common-objs := q6dsp-common.o q6dsp-lpass-ports.o +snd-q6dsp-common-objs := q6dsp-common.o q6dsp-lpass-ports.o q6dsp-lpass-clocks.o

obj-$(CONFIG_SND_SOC_QDSP6_COMMON) += snd-q6dsp-common.o obj-$(CONFIG_SND_SOC_QDSP6_CORE) += q6core.o diff --git a/sound/soc/qcom/qdsp6/q6afe-clocks.c b/sound/soc/qcom/qdsp6/q6afe-clocks.c index 9431656283cd..1ccab64ff00b 100644 --- a/sound/soc/qcom/qdsp6/q6afe-clocks.c +++ b/sound/soc/qcom/qdsp6/q6afe-clocks.c @@ -7,115 +7,18 @@ #include <linux/module.h> #include <linux/device.h> #include <linux/platform_device.h> -#include <linux/of.h> -#include <linux/slab.h> +#include "q6dsp-lpass-clocks.h" #include "q6afe.h"

#define Q6AFE_CLK(id) { \ .clk_id = id, \ - .afe_clk_id = Q6AFE_##id, \ + .q6dsp_clk_id = Q6AFE_##id, \ .name = #id, \ .rate = 19200000, \ }

-#define Q6AFE_VOTE_CLK(id, blkid, n) { \ - .clk_id = id, \ - .afe_clk_id = blkid, \ - .name = n, \ - } - -struct q6afe_clk_init { - int clk_id; - int afe_clk_id; - char *name; - int rate; -}; - -struct q6afe_clk { - struct device *dev; - int afe_clk_id; - int attributes; - int rate; - uint32_t handle; - struct clk_hw hw; -}; - -#define to_q6afe_clk(_hw) container_of(_hw, struct q6afe_clk, hw) - -struct q6afe_cc { - struct device *dev; - struct q6afe_clk *clks[Q6AFE_MAX_CLK_ID]; -}; - -static int clk_q6afe_prepare(struct clk_hw *hw) -{ - struct q6afe_clk *clk = to_q6afe_clk(hw); - - return q6afe_set_lpass_clock(clk->dev, clk->afe_clk_id, clk->attributes, - Q6AFE_LPASS_CLK_ROOT_DEFAULT, clk->rate); -} - -static void clk_q6afe_unprepare(struct clk_hw *hw) -{ - struct q6afe_clk *clk = to_q6afe_clk(hw); - - q6afe_set_lpass_clock(clk->dev, clk->afe_clk_id, clk->attributes, - Q6AFE_LPASS_CLK_ROOT_DEFAULT, 0); -} - -static int clk_q6afe_set_rate(struct clk_hw *hw, unsigned long rate, - unsigned long parent_rate) -{ - struct q6afe_clk *clk = to_q6afe_clk(hw); - - clk->rate = rate; - - return 0; -} - -static unsigned long clk_q6afe_recalc_rate(struct clk_hw *hw, - unsigned long parent_rate) -{ - struct q6afe_clk *clk = to_q6afe_clk(hw); - - return clk->rate; -} - -static long clk_q6afe_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) -{ - return rate; -} - -static const struct clk_ops clk_q6afe_ops = { - .prepare = clk_q6afe_prepare, - .unprepare = clk_q6afe_unprepare, - .set_rate = clk_q6afe_set_rate, - .round_rate = clk_q6afe_round_rate, - .recalc_rate = clk_q6afe_recalc_rate, -}; - -static int clk_vote_q6afe_block(struct clk_hw *hw) -{ - struct q6afe_clk *clk = to_q6afe_clk(hw); - - return q6afe_vote_lpass_core_hw(clk->dev, clk->afe_clk_id, - clk_hw_get_name(&clk->hw), &clk->handle); -}

-static void clk_unvote_q6afe_block(struct clk_hw *hw) -{ - struct q6afe_clk *clk = to_q6afe_clk(hw); - - q6afe_unvote_lpass_core_hw(clk->dev, clk->afe_clk_id, clk->handle); -} - -static const struct clk_ops clk_vote_q6afe_ops = { - .prepare = clk_vote_q6afe_block, - .unprepare = clk_unvote_q6afe_block, -}; - -static const struct q6afe_clk_init q6afe_clks[] = { +static const struct q6dsp_clk_init q6afe_clks[] = { Q6AFE_CLK(LPASS_CLK_ID_PRI_MI2S_IBIT), Q6AFE_CLK(LPASS_CLK_ID_PRI_MI2S_EBIT), Q6AFE_CLK(LPASS_CLK_ID_SEC_MI2S_IBIT), @@ -176,88 +79,28 @@ static const struct q6afe_clk_init q6afe_clks[] = { Q6AFE_CLK(LPASS_CLK_ID_RX_CORE_MCLK), Q6AFE_CLK(LPASS_CLK_ID_RX_CORE_NPL_MCLK), Q6AFE_CLK(LPASS_CLK_ID_VA_CORE_2X_MCLK), - Q6AFE_VOTE_CLK(LPASS_HW_AVTIMER_VOTE, + Q6DSP_VOTE_CLK(LPASS_HW_AVTIMER_VOTE, Q6AFE_LPASS_CORE_AVTIMER_BLOCK, "LPASS_AVTIMER_MACRO"), - Q6AFE_VOTE_CLK(LPASS_HW_MACRO_VOTE, + Q6DSP_VOTE_CLK(LPASS_HW_MACRO_VOTE, Q6AFE_LPASS_CORE_HW_MACRO_BLOCK, "LPASS_HW_MACRO"), - Q6AFE_VOTE_CLK(LPASS_HW_DCODEC_VOTE, + Q6DSP_VOTE_CLK(LPASS_HW_DCODEC_VOTE, Q6AFE_LPASS_CORE_HW_DCODEC_BLOCK, "LPASS_HW_DCODEC"), };

-static struct clk_hw *q6afe_of_clk_hw_get(struct of_phandle_args *clkspec, - void *data) -{ - struct q6afe_cc *cc = data; - unsigned int idx = clkspec->args[0]; - unsigned int attr = clkspec->args[1]; - - if (idx >= Q6AFE_MAX_CLK_ID || attr > LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR) { - dev_err(cc->dev, "Invalid clk specifier (%d, %d)\n", idx, attr); - return ERR_PTR(-EINVAL); - } - - if (cc->clks[idx]) { - cc->clks[idx]->attributes = attr; - return &cc->clks[idx]->hw; - } - - return ERR_PTR(-ENOENT); -} - -static int q6afe_clock_dev_probe(struct platform_device *pdev) -{ - struct q6afe_cc *cc; - struct device *dev = &pdev->dev; - int i, ret; - - cc = devm_kzalloc(dev, sizeof(*cc), GFP_KERNEL); - if (!cc) - return -ENOMEM; - - cc->dev = dev; - for (i = 0; i < ARRAY_SIZE(q6afe_clks); i++) { - unsigned int id = q6afe_clks[i].clk_id; - struct clk_init_data init = { - .name = q6afe_clks[i].name, - }; - struct q6afe_clk *clk; - - clk = devm_kzalloc(dev, sizeof(*clk), GFP_KERNEL); - if (!clk) - return -ENOMEM; - - clk->dev = dev; - clk->afe_clk_id = q6afe_clks[i].afe_clk_id; - clk->rate = q6afe_clks[i].rate; - clk->hw.init = &init; - - if (clk->rate) - init.ops = &clk_q6afe_ops; - else - init.ops = &clk_vote_q6afe_ops; - - cc->clks[id] = clk; - - ret = devm_clk_hw_register(dev, &clk->hw); - if (ret) - return ret; - } - - ret = devm_of_clk_add_hw_provider(dev, q6afe_of_clk_hw_get, cc); - if (ret) - return ret; - - dev_set_drvdata(dev, cc); - - return 0; -} +static const struct q6dsp_clk_desc q6dsp_clk_q6afe __maybe_unused = { + .clks = q6afe_clks, + .num_clks = ARRAY_SIZE(q6afe_clks), + .lpass_set_clk = q6afe_set_lpass_clock, + .lpass_vote_clk = q6afe_vote_lpass_core_hw, + .lpass_unvote_clk = q6afe_unvote_lpass_core_hw, +};

#ifdef CONFIG_OF static const struct of_device_id q6afe_clock_device_id[] = { - { .compatible = "qcom,q6afe-clocks" }, + { .compatible = "qcom,q6afe-clocks", .data = &q6dsp_clk_q6afe }, {}, }; MODULE_DEVICE_TABLE(of, q6afe_clock_device_id); @@ -268,7 +111,7 @@ static struct platform_driver q6afe_clock_platform_driver = { .name = "q6afe-clock", .of_match_table = of_match_ptr(q6afe_clock_device_id), }, - .probe = q6afe_clock_dev_probe, + .probe = q6dsp_clock_dev_probe, }; module_platform_driver(q6afe_clock_platform_driver);

diff --git a/sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c b/sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c new file mode 100644 index 000000000000..4613867d1133 --- /dev/null +++ b/sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c @@ -0,0 +1,186 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2020, Linaro Limited + +#include <linux/err.h> +#include <linux/init.h> +#include <linux/clk-provider.h> +#include <linux/module.h> +#include <linux/device.h> +#include <linux/platform_device.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/slab.h> +#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h> +#include "q6dsp-lpass-clocks.h" + +#define Q6DSP_MAX_CLK_ID 104 +#define Q6DSP_LPASS_CLK_ROOT_DEFAULT 0 + + +struct q6dsp_clk { + struct device *dev; + int q6dsp_clk_id; + int attributes; + int rate; + uint32_t handle; + struct clk_hw hw; +}; + +#define to_q6dsp_clk(_hw) container_of(_hw, struct q6dsp_clk, hw) + +struct q6dsp_cc { + struct device *dev; + struct q6dsp_clk *clks[Q6DSP_MAX_CLK_ID]; + const struct q6dsp_clk_desc *desc; +}; + +static int clk_q6dsp_prepare(struct clk_hw *hw) +{ + struct q6dsp_clk *clk = to_q6dsp_clk(hw); + struct q6dsp_cc *cc = dev_get_drvdata(clk->dev); + + return cc->desc->lpass_set_clk(clk->dev, clk->q6dsp_clk_id, clk->attributes, + Q6DSP_LPASS_CLK_ROOT_DEFAULT, clk->rate); +} + +static void clk_q6dsp_unprepare(struct clk_hw *hw) +{ + struct q6dsp_clk *clk = to_q6dsp_clk(hw); + struct q6dsp_cc *cc = dev_get_drvdata(clk->dev); + + cc->desc->lpass_set_clk(clk->dev, clk->q6dsp_clk_id, clk->attributes, + Q6DSP_LPASS_CLK_ROOT_DEFAULT, 0); +} + +static int clk_q6dsp_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + struct q6dsp_clk *clk = to_q6dsp_clk(hw); + + clk->rate = rate; + + return 0; +} + +static unsigned long clk_q6dsp_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct q6dsp_clk *clk = to_q6dsp_clk(hw); + + return clk->rate; +} + +static long clk_q6dsp_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *parent_rate) +{ + return rate; +} + +static const struct clk_ops clk_q6dsp_ops = { + .prepare = clk_q6dsp_prepare, + .unprepare = clk_q6dsp_unprepare, + .set_rate = clk_q6dsp_set_rate, + .round_rate = clk_q6dsp_round_rate, + .recalc_rate = clk_q6dsp_recalc_rate, +}; + +static int clk_vote_q6dsp_block(struct clk_hw *hw) +{ + struct q6dsp_clk *clk = to_q6dsp_clk(hw); + struct q6dsp_cc *cc = dev_get_drvdata(clk->dev); + + return cc->desc->lpass_vote_clk(clk->dev, clk->q6dsp_clk_id, + clk_hw_get_name(&clk->hw), &clk->handle); +} + +static void clk_unvote_q6dsp_block(struct clk_hw *hw) +{ + struct q6dsp_clk *clk = to_q6dsp_clk(hw); + struct q6dsp_cc *cc = dev_get_drvdata(clk->dev); + + cc->desc->lpass_unvote_clk(clk->dev, clk->q6dsp_clk_id, clk->handle); +} + +static const struct clk_ops clk_vote_q6dsp_ops = { + .prepare = clk_vote_q6dsp_block, + .unprepare = clk_unvote_q6dsp_block, +}; + + +static struct clk_hw *q6dsp_of_clk_hw_get(struct of_phandle_args *clkspec, + void *data) +{ + struct q6dsp_cc *cc = data; + unsigned int idx = clkspec->args[0]; + unsigned int attr = clkspec->args[1]; + + if (idx >= Q6DSP_MAX_CLK_ID || attr > LPASS_CLK_ATTRIBUTE_COUPLE_DIVISOR) { + dev_err(cc->dev, "Invalid clk specifier (%d, %d)\n", idx, attr); + return ERR_PTR(-EINVAL); + } + + if (cc->clks[idx]) { + cc->clks[idx]->attributes = attr; + return &cc->clks[idx]->hw; + } + + return ERR_PTR(-ENOENT); +} + +int q6dsp_clock_dev_probe(struct platform_device *pdev) +{ + struct q6dsp_cc *cc; + struct device *dev = &pdev->dev; + const struct q6dsp_clk_init *q6dsp_clks; + const struct q6dsp_clk_desc *desc; + int i, ret; + + cc = devm_kzalloc(dev, sizeof(*cc), GFP_KERNEL); + if (!cc) + return -ENOMEM; + + desc = of_device_get_match_data(&pdev->dev); + if (!desc) + return -EINVAL; + + cc->desc = desc; + cc->dev = dev; + q6dsp_clks = desc->clks; + + for (i = 0; i < desc->num_clks; i++) { + unsigned int id = q6dsp_clks[i].clk_id; + struct clk_init_data init = { + .name = q6dsp_clks[i].name, + }; + struct q6dsp_clk *clk; + + clk = devm_kzalloc(dev, sizeof(*clk), GFP_KERNEL); + if (!clk) + return -ENOMEM; + + clk->dev = dev; + clk->q6dsp_clk_id = q6dsp_clks[i].q6dsp_clk_id; + clk->rate = q6dsp_clks[i].rate; + clk->hw.init = &init; + + if (clk->rate) + init.ops = &clk_q6dsp_ops; + else + init.ops = &clk_vote_q6dsp_ops; + + cc->clks[id] = clk; + + ret = devm_clk_hw_register(dev, &clk->hw); + if (ret) + return ret; + } + + ret = devm_of_clk_add_hw_provider(dev, q6dsp_of_clk_hw_get, cc); + if (ret) + return ret; + + dev_set_drvdata(dev, cc); + + return 0; +} +EXPORT_SYMBOL_GPL(q6dsp_clock_dev_probe); diff --git a/sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.h b/sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.h new file mode 100644 index 000000000000..3770d81f2bd6 --- /dev/null +++ b/sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.h @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef __Q6DSP_AUDIO_CLOCKS_H__ +#define __Q6DSP_AUDIO_CLOCKS_H__ + +struct q6dsp_clk_init { + int clk_id; + int q6dsp_clk_id; + char *name; + int rate; +}; + +#define Q6DSP_VOTE_CLK(id, blkid, n) { \ + .clk_id = id, \ + .q6dsp_clk_id = blkid, \ + .name = n, \ + } + +struct q6dsp_clk_desc { + const struct q6dsp_clk_init *clks; + size_t num_clks; + int (*lpass_set_clk)(struct device *dev, int clk_id, int attr, + int root_clk, unsigned int freq); + int (*lpass_vote_clk)(struct device *dev, uint32_t hid, const char *n, uint32_t *h); + int (*lpass_unvote_clk)(struct device *dev, uint32_t hid, uint32_t h); +}; + +int q6dsp_clock_dev_probe(struct platform_device *pdev); + +#endif /* __Q6DSP_AUDIO_CLOCKS_H__ */

On AudioReach audio Framework access to LPASS ports is via Q6PRM (Proxy Resource Manager) service, so add a dedicated lpass-clock compatible string for this.

Signed-off-by: Srinivas Kandagatla srinivas.kandagatla@linaro.org Reviewed-by: Rob Herring robh@kernel.org --- .../sound/qcom,q6dsp-lpass-clocks.yaml | 21 +++++++++++++++++++ 1 file changed, 21 insertions(+)

diff --git a/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-clocks.yaml b/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-clocks.yaml index c686164732aa..f83f00737a2f 100644 --- a/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-clocks.yaml +++ b/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-clocks.yaml @@ -16,6 +16,7 @@ properties: compatible: enum: - qcom,q6afe-clocks + - qcom,q6prm-lpass-clocks

reg: maxItems: 1 @@ -54,3 +55,23 @@ examples: }; }; }; + + - | + #include <dt-bindings/soc/qcom,gpr.h> + gpr { + compatible = "qcom,gpr"; + qcom,domain = <GPR_DOMAIN_ID_ADSP>; + #address-cells = <1>; + #size-cells = <0>; + service@2 { + reg = <GPR_PRM_MODULE_IID>; + compatible = "qcom,q6prm"; + #address-cells = <1>; + #size-cells = <0>; + clock-controller@2 { + compatible = "qcom,q6prm-lpass-clocks"; + reg = <2>; + #clock-cells = <2>; + }; + }; + };

Add support to q6apm (Audio Process Manager) component which is core Audioreach service running in the DSP.

Signed-off-by: Srinivas Kandagatla srinivas.kandagatla@linaro.org --- sound/soc/qcom/qdsp6/audioreach.c | 299 +++++++++++++++ sound/soc/qcom/qdsp6/audioreach.h | 29 ++ sound/soc/qcom/qdsp6/q6apm.c | 606 ++++++++++++++++++++++++++++++ sound/soc/qcom/qdsp6/q6apm.h | 152 ++++++++ 4 files changed, 1086 insertions(+) create mode 100644 sound/soc/qcom/qdsp6/q6apm.c create mode 100644 sound/soc/qcom/qdsp6/q6apm.h

diff --git a/sound/soc/qcom/qdsp6/audioreach.c b/sound/soc/qcom/qdsp6/audioreach.c index 249840cd5bf8..93ff6afb5e2a 100644 --- a/sound/soc/qcom/qdsp6/audioreach.c +++ b/sound/soc/qcom/qdsp6/audioreach.c @@ -5,6 +5,7 @@ #include <linux/slab.h> #include <linux/soc/qcom/apr.h> #include <dt-bindings/soc/qcom,gpr.h> +#include "q6apm.h" #include "audioreach.h"

/* SubGraph Config */ @@ -268,3 +269,301 @@ void *audioreach_alloc_apm_cmd_pkt(int pkt_size, uint32_t opcode, uint32_t token true); } EXPORT_SYMBOL_GPL(audioreach_alloc_apm_cmd_pkt); + +static void apm_populate_container_config(struct apm_container_obj *cfg, + struct audioreach_container *cont) +{ + + /* Container Config */ + cfg->container_cfg.container_id = cont->container_id; + cfg->container_cfg.num_prop = 4; + + /* Capability list */ + cfg->cap_data.prop_id = APM_CONTAINER_PROP_ID_CAPABILITY_LIST; + cfg->cap_data.prop_size = APM_CONTAINER_PROP_ID_CAPABILITY_SIZE; + cfg->num_capability_id = 1; + cfg->capability_id = cont->capability_id; + + /* Graph Position */ + cfg->pos_data.prop_id = APM_CONTAINER_PROP_ID_GRAPH_POS; + cfg->pos_data.prop_size = sizeof(struct apm_cont_prop_id_graph_pos); + cfg->pos.graph_pos = cont->graph_pos; + + /* Stack size */ + cfg->stack_data.prop_id = APM_CONTAINER_PROP_ID_STACK_SIZE; + cfg->stack_data.prop_size = sizeof(struct apm_cont_prop_id_stack_size); + cfg->stack.stack_size = cont->stack_size; + + /* Proc domain */ + cfg->domain_data.prop_id = APM_CONTAINER_PROP_ID_PROC_DOMAIN; + cfg->domain_data.prop_size = sizeof(struct apm_cont_prop_id_domain); + cfg->domain.proc_domain = cont->proc_domain; +} + +static void apm_populate_sub_graph_config(struct apm_sub_graph_data *cfg, + struct audioreach_sub_graph *sg) +{ + cfg->sub_graph_cfg.sub_graph_id = sg->sub_graph_id; + cfg->sub_graph_cfg.num_sub_graph_prop = APM_SUB_GRAPH_CFG_NPROP; + + /* Perf Mode */ + cfg->perf_data.prop_id = APM_SUB_GRAPH_PROP_ID_PERF_MODE; + cfg->perf_data.prop_size = APM_SG_PROP_ID_PERF_MODE_SIZE; + cfg->perf.perf_mode = sg->perf_mode; + + /* Direction */ + cfg->dir_data.prop_id = APM_SUB_GRAPH_PROP_ID_DIRECTION; + cfg->dir_data.prop_size = APM_SG_PROP_ID_DIR_SIZE; + cfg->dir.direction = sg->direction; + + /* Scenario ID */ + cfg->sid_data.prop_id = APM_SUB_GRAPH_PROP_ID_SCENARIO_ID; + cfg->sid_data.prop_size = APM_SG_PROP_ID_SID_SIZE; + cfg->sid.scenario_id = sg->scenario_id; +} + +static void apm_populate_connection_obj(struct apm_module_conn_obj *obj, + struct audioreach_module *module) +{ + obj->src_mod_inst_id = module->src_mod_inst_id; + obj->src_mod_op_port_id = module->src_mod_op_port_id; + obj->dst_mod_inst_id = module->instance_id; + obj->dst_mod_ip_port_id = module->in_port; +} + +static void apm_populate_module_prop_obj(struct apm_mod_prop_obj *obj, + struct audioreach_module *module) +{ + + obj->instance_id = module->instance_id; + obj->num_props = 1; + obj->prop_data_1.prop_id = APM_MODULE_PROP_ID_PORT_INFO; + obj->prop_data_1.prop_size = APM_MODULE_PROP_ID_PORT_INFO_SZ; + obj->prop_id_port.max_ip_port = module->max_ip_port; + obj->prop_id_port.max_op_port = module->max_op_port; +} + +struct audioreach_module *audioreach_get_container_last_module( + struct audioreach_container *container) +{ + struct audioreach_module *module; + + list_for_each_entry(module, &container->modules_list, node) { + if (module->dst_mod_inst_id == 0) + return module; + } + + return NULL; +} +EXPORT_SYMBOL_GPL(audioreach_get_container_last_module); + +static bool is_module_in_container(struct audioreach_container *container, int module_iid) +{ + struct audioreach_module *module; + + list_for_each_entry(module, &container->modules_list, node) { + if (module->instance_id == module_iid) + return true; + } + + return false; +} + +struct audioreach_module *audioreach_get_container_first_module( + struct audioreach_container *container) +{ + struct audioreach_module *module; + + /* get the first module from both connected or un-connected containers */ + list_for_each_entry(module, &container->modules_list, node) { + if (module->src_mod_inst_id == 0 || + !is_module_in_container(container, module->src_mod_inst_id)) + return module; + } + return NULL; +} +EXPORT_SYMBOL_GPL(audioreach_get_container_first_module); + +struct audioreach_module *audioreach_get_container_next_module( + struct audioreach_container *container, + struct audioreach_module *module) +{ + int nmodule_iid = module->dst_mod_inst_id; + struct audioreach_module *nmodule; + + list_for_each_entry(nmodule, &container->modules_list, node) { + if (nmodule->instance_id == nmodule_iid) + return nmodule; + } + + return NULL; +} +EXPORT_SYMBOL_GPL(audioreach_get_container_next_module); + +static void apm_populate_module_list_obj(struct apm_mod_list_obj *obj, + struct audioreach_container *container, + int sub_graph_id) +{ + struct audioreach_module *module; + int i; + + obj->sub_graph_id = sub_graph_id; + obj->container_id = container->container_id; + obj->num_modules = container->num_modules; + i = 0; + list_for_each_container_module(module, container) { + obj->mod_cfg[i].module_id = module->module_id; + obj->mod_cfg[i].instance_id = module->instance_id; + i++; + } +} + +static void audioreach_populate_graph(struct apm_graph_open_params *open, + struct list_head *sg_list, + int num_sub_graphs) +{ + struct apm_mod_conn_list_params *mc_data = open->mod_conn_list_data; + struct apm_module_list_params *ml_data = open->mod_list_data; + struct apm_prop_list_params *mp_data = open->mod_prop_data; + struct apm_container_params *c_data = open->cont_data; + struct apm_sub_graph_params *sg_data = open->sg_data; + int ncontainer = 0, nmodule = 0, nconn = 0; + struct apm_mod_prop_obj *module_prop_obj; + struct audioreach_container *container; + struct apm_module_conn_obj *conn_obj; + struct audioreach_module *module; + struct audioreach_sub_graph *sg; + struct apm_container_obj *cobj; + struct apm_mod_list_obj *mlobj; + int i = 0; + + mlobj = &ml_data->mod_list_obj[0]; + + list_for_each_entry(sg, sg_list, node) { + struct apm_sub_graph_data *sg_cfg = &sg_data->sg_cfg[i++]; + + apm_populate_sub_graph_config(sg_cfg, sg); + + list_for_each_entry(container, &sg->container_list, node) { + cobj = &c_data->cont_obj[ncontainer]; + + apm_populate_container_config(cobj, container); + apm_populate_module_list_obj(mlobj, container, sg->sub_graph_id); + + list_for_each_container_module(module, container) { + uint32_t src_mod_inst_id; + + src_mod_inst_id = module->src_mod_inst_id; + + module_prop_obj = &mp_data->mod_prop_obj[nmodule]; + apm_populate_module_prop_obj(module_prop_obj, module); + + if (src_mod_inst_id /*&& dst_mod_inst_id*/) { + conn_obj = &mc_data->conn_obj[nconn]; + apm_populate_connection_obj(conn_obj, module); + nconn++; + } + + nmodule++; + } + mlobj = (void *) mlobj + APM_MOD_LIST_OBJ_PSIZE(container->num_modules); + + ncontainer++; + } + } +} + +void *audioreach_alloc_graph_pkt(struct q6apm *apm, struct list_head *sg_list, int graph_id) +{ + void *p; + int payload_size, sg_sz, cont_sz, ml_sz, mp_sz, mc_sz; + struct apm_module_param_data *param_data; + struct audioreach_container *container; + struct apm_graph_open_params params; + struct audioreach_sub_graph *sgs; + struct audioreach_module *module; + int num_modules_per_list; + int num_connections = 0; + int num_containers = 0; + int num_sub_graphs = 0; + int num_modules = 0; + int num_modules_list; + struct gpr_pkt *pkt; + + list_for_each_entry(sgs, sg_list, node) { + num_sub_graphs++; + list_for_each_entry(container, &sgs->container_list, node) { + num_containers++; + num_modules += container->num_modules; + list_for_each_container_module(module, container) { + if (module->src_mod_inst_id) + num_connections++; + } + } + } + + num_modules_list = num_containers; + num_modules_per_list = num_modules/num_containers; + sg_sz = APM_SUB_GRAPH_PSIZE(num_sub_graphs); + cont_sz = APM_CONTAINER_PSIZE(num_containers); + ml_sz = APM_MOD_LIST_PSIZE(num_modules_list, num_modules_per_list); + mp_sz = APM_MOD_PROP_PSIZE(num_modules); + mc_sz = APM_MOD_CONN_PSIZE(num_connections); + + payload_size = sg_sz + cont_sz + ml_sz + mp_sz + mc_sz; + pkt = audioreach_alloc_apm_cmd_pkt(payload_size, APM_CMD_GRAPH_OPEN, 0); + if (IS_ERR(pkt)) + return pkt; + + p = (void *)pkt + GPR_HDR_SIZE + APM_CMD_HDR_SIZE; + + /* SubGraph */ + params.sg_data = p; + param_data = &params.sg_data->param_data; + param_data->module_instance_id = APM_MODULE_INSTANCE_ID; + param_data->param_id = APM_PARAM_ID_SUB_GRAPH_CONFIG; + param_data->param_size = sg_sz - APM_MODULE_PARAM_DATA_SIZE; + params.sg_data->num_sub_graphs = num_sub_graphs; + p += sg_sz; + + /* Container */ + params.cont_data = p; + param_data = &params.cont_data->param_data; + param_data->module_instance_id = APM_MODULE_INSTANCE_ID; + param_data->param_id = APM_PARAM_ID_CONTAINER_CONFIG; + param_data->param_size = cont_sz - APM_MODULE_PARAM_DATA_SIZE; + params.cont_data->num_containers = num_containers; + p += cont_sz; + + /* Module List*/ + params.mod_list_data = p; + param_data = &params.mod_list_data->param_data; + param_data->module_instance_id = APM_MODULE_INSTANCE_ID; + param_data->param_id = APM_PARAM_ID_MODULE_LIST; + param_data->param_size = ml_sz - APM_MODULE_PARAM_DATA_SIZE; + params.mod_list_data->num_modules_list = num_sub_graphs; + p += ml_sz; + + /* Module Properties */ + params.mod_prop_data = p; + param_data = &params.mod_prop_data->param_data; + param_data->module_instance_id = APM_MODULE_INSTANCE_ID; + param_data->param_id = APM_PARAM_ID_MODULE_PROP; + param_data->param_size = mp_sz - APM_MODULE_PARAM_DATA_SIZE; + params.mod_prop_data->num_modules_prop_cfg = num_modules; + p += mp_sz; + + /* Module Connections */ + params.mod_conn_list_data = p; + param_data = &params.mod_conn_list_data->param_data; + param_data->module_instance_id = APM_MODULE_INSTANCE_ID; + param_data->param_id = APM_PARAM_ID_MODULE_CONN; + param_data->param_size = mc_sz - APM_MODULE_PARAM_DATA_SIZE; + params.mod_conn_list_data->num_connections = num_connections; + p += mc_sz; + + audioreach_populate_graph(&params, sg_list, num_sub_graphs); + + return pkt; +} +EXPORT_SYMBOL_GPL(audioreach_alloc_graph_pkt); diff --git a/sound/soc/qcom/qdsp6/audioreach.h b/sound/soc/qcom/qdsp6/audioreach.h index 556443155416..980dd4925b01 100644 --- a/sound/soc/qcom/qdsp6/audioreach.h +++ b/sound/soc/qcom/qdsp6/audioreach.h @@ -5,6 +5,8 @@ #include <linux/types.h> #include <linux/soc/qcom/apr.h> #include <sound/soc.h> +struct q6apm; +struct q6apm_graph;

/* Module IDs */ #define MODULE_ID_WR_SHARED_MEM_EP 0x07001000 @@ -654,6 +656,20 @@ struct audioreach_module { struct snd_soc_dapm_widget *widget; };

+struct audioreach_module_config { + int direction; + u32 sample_rate; + u16 bit_width; + u16 bits_per_sample; + + u16 data_format; + u16 num_channels; + u16 active_channels_mask; + u32 sd_line_mask; + int fmt; + u8 channel_map[AR_PCM_MAX_NUM_CHANNEL]; +}; + /* Packet Allocation routines */ void *audioreach_alloc_apm_cmd_pkt(int pkt_size, uint32_t opcode, uint32_t token); @@ -665,4 +681,17 @@ void *audioreach_alloc_apm_pkt(int pkt_size, uint32_t opcode, uint32_t token, void *audioreach_alloc_pkt(int payload_size, uint32_t opcode, uint32_t token, uint32_t src_port, uint32_t dest_port); +void *audioreach_alloc_graph_pkt(struct q6apm *apm, + struct list_head *sg_list, + int graph_id); +struct audioreach_module *audioreach_get_container_last_module( + struct audioreach_container *container); +struct audioreach_module *audioreach_get_container_first_module( + struct audioreach_container *container); +struct audioreach_module *audioreach_get_container_next_module( + struct audioreach_container *container, + struct audioreach_module *module); +#define list_for_each_container_module(mod, cont) \ + for (mod = audioreach_get_container_first_module(cont); mod != NULL; \ + mod = audioreach_get_container_next_module(cont, mod)) #endif /* __AUDIOREACH_H__ */ diff --git a/sound/soc/qcom/qdsp6/q6apm.c b/sound/soc/qcom/qdsp6/q6apm.c new file mode 100644 index 000000000000..a4955d3c8828 --- /dev/null +++ b/sound/soc/qcom/qdsp6/q6apm.c @@ -0,0 +1,606 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2020, Linaro Limited + +#include <dt-bindings/soc/qcom,gpr.h> +#include <linux/delay.h> +#include <linux/jiffies.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_platform.h> +#include <linux/sched.h> +#include <linux/slab.h> +#include <linux/soc/qcom/apr.h> +#include <linux/wait.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/pcm.h> +#include "audioreach.h" +#include "q6apm.h" + +/* Graph Management */ +struct apm_graph_mgmt_cmd { + struct apm_module_param_data param_data; + uint32_t num_sub_graphs; + uint32_t sub_graph_id_list[]; +} __packed; + +#define APM_GRAPH_MGMT_PSIZE(n) ALIGN(sizeof(struct apm_graph_mgmt_cmd) + \ + n * sizeof(uint32_t), 8) + +int q6apm_send_cmd_sync(struct q6apm *apm, struct gpr_pkt *pkt, uint32_t rsp_opcode) +{ + gpr_device_t *gdev = apm->gdev; + + return audioreach_send_cmd_sync(&gdev->dev, gdev, &apm->result, &apm->lock, + NULL, &apm->wait, pkt, rsp_opcode); +} + +static struct audioreach_graph *q6apm_get_audioreach_graph(struct q6apm *apm, uint32_t graph_id) +{ + struct audioreach_graph_info *info; + struct audioreach_graph *graph; + + mutex_lock(&apm->lock); + graph = idr_find(&apm->graph_idr, graph_id); + mutex_unlock(&apm->lock); + + if (graph) { + kref_get(&graph->refcount); + return graph; + } + + info = idr_find(&apm->graph_info_idr, graph_id); + + if (!info) + return ERR_PTR(-ENODEV); + + graph = kzalloc(sizeof(*graph), GFP_KERNEL); + if (!graph) + return ERR_PTR(-ENOMEM); + + graph->apm = apm; + graph->info = info; + graph->id = graph_id; + + graph->graph = audioreach_alloc_graph_pkt(apm, &info->sg_list, graph_id); + if (IS_ERR(graph->graph)) { + kfree(graph); + return ERR_PTR(-ENOMEM); + } + + mutex_lock(&apm->lock); + idr_alloc(&apm->graph_idr, graph, graph_id, graph_id + 1, GFP_KERNEL); + mutex_unlock(&apm->lock); + + kref_init(&graph->refcount); + + q6apm_send_cmd_sync(apm, graph->graph, 0); + + return graph; +} + +static int audioreach_graph_mgmt_cmd(struct audioreach_graph *graph, uint32_t opcode) +{ + struct audioreach_graph_info *info = graph->info; + int num_sub_graphs = info->num_sub_graphs; + struct apm_module_param_data *param_data; + struct apm_graph_mgmt_cmd *mgmt_cmd; + struct audioreach_sub_graph *sg; + struct q6apm *apm = graph->apm; + int i = 0, rc, payload_size; + struct gpr_pkt *pkt; + + payload_size = APM_GRAPH_MGMT_PSIZE(num_sub_graphs); + + pkt = audioreach_alloc_apm_cmd_pkt(payload_size, opcode, 0); + if (IS_ERR(pkt)) + return -ENOMEM; + + mgmt_cmd = (void *)pkt + GPR_HDR_SIZE + APM_CMD_HDR_SIZE; + + mgmt_cmd->num_sub_graphs = num_sub_graphs; + + param_data = &mgmt_cmd->param_data; + param_data->module_instance_id = APM_MODULE_INSTANCE_ID; + param_data->param_id = APM_PARAM_ID_SUB_GRAPH_LIST; + param_data->param_size = payload_size - APM_MODULE_PARAM_DATA_SIZE; + + list_for_each_entry(sg, &info->sg_list, node) + mgmt_cmd->sub_graph_id_list[i++] = sg->sub_graph_id; + + rc = q6apm_send_cmd_sync(apm, pkt, 0); + + kfree(pkt); + + return rc; +} + +static void q6apm_put_audioreach_graph(struct kref *ref) +{ + struct audioreach_graph *graph; + struct q6apm *apm; + + graph = container_of(ref, struct audioreach_graph, refcount); + apm = graph->apm; + + audioreach_graph_mgmt_cmd(graph, APM_CMD_GRAPH_CLOSE); + + mutex_lock(&apm->lock); + graph = idr_remove(&apm->graph_idr, graph->id); + mutex_unlock(&apm->lock); + + kfree(graph->graph); + kfree(graph); +} + +static bool q6apm_get_apm_state(struct q6apm *apm) +{ + struct gpr_pkt *pkt; + + pkt = audioreach_alloc_apm_cmd_pkt(0, APM_CMD_GET_SPF_STATE, 0); + if (IS_ERR(pkt)) + return -ENOMEM; + + q6apm_send_cmd_sync(apm, pkt, APM_CMD_RSP_GET_SPF_STATE); + + kfree(pkt); + + return !apm->state ? false : true; +} + +static struct audioreach_module *__q6apm_find_module_by_mid(struct q6apm *apm, + struct audioreach_graph_info *info, + uint32_t mid) +{ + struct audioreach_container *container; + struct audioreach_sub_graph *sgs; + struct audioreach_module *module; + + list_for_each_entry(sgs, &info->sg_list, node) { + list_for_each_entry(container, &sgs->container_list, node) { + list_for_each_entry(module, &container->modules_list, node) { + if (mid == module->module_id) + return module; + } + } + } + + return NULL; +} + +static struct audioreach_module *q6apm_graph_get_last_module(struct q6apm *apm, u32 sgid) +{ + struct audioreach_container *container; + struct audioreach_module *module; + struct audioreach_sub_graph *sg; + + mutex_lock(&apm->lock); + sg = idr_find(&apm->sub_graphs_idr, sgid); + mutex_unlock(&apm->lock); + if (!sg) + return NULL; + + container = list_last_entry(&sg->container_list, struct audioreach_container, node); + module = audioreach_get_container_last_module(container); + + return module; +} + +static struct audioreach_module *q6apm_graph_get_first_module(struct q6apm *apm, u32 sgid) +{ + struct audioreach_container *container; + struct audioreach_module *module; + struct audioreach_sub_graph *sg; + + mutex_lock(&apm->lock); + sg = idr_find(&apm->sub_graphs_idr, sgid); + mutex_unlock(&apm->lock); + if (!sg) + return NULL; + + container = list_first_entry(&sg->container_list, struct audioreach_container, node); + module = audioreach_get_container_first_module(container); + + return module; +} + +bool q6apm_is_sub_graphs_connected(struct q6apm *apm, u32 src_sgid, u32 dst_sgid) +{ + struct audioreach_module *module; + u32 iid; + + module = q6apm_graph_get_last_module(apm, src_sgid); + if (!module) + return false; + + iid = module->instance_id; + module = q6apm_graph_get_first_module(apm, dst_sgid); + if (!module) + return false; + + if (module->src_mod_inst_id == iid) + return true; + + return false; +} + +int q6apm_connect_sub_graphs(struct q6apm *apm, u32 src_sgid, u32 dst_sgid, bool connect) +{ + struct audioreach_module *module; + u32 iid; + + if (connect) { + module = q6apm_graph_get_last_module(apm, src_sgid); + if (!module) + return -ENODEV; + + iid = module->instance_id; + } else { + iid = 0; + } + + module = q6apm_graph_get_first_module(apm, dst_sgid); + if (!module) + return -ENODEV; + + /* set src module in dst subgraph first module */ + module->src_mod_inst_id = iid; + + return 0; +} + +int q6apm_graph_get_rx_shmem_module_iid(struct q6apm_graph *graph) +{ + struct audioreach_module *module; + + module = q6apm_find_module_by_mid(graph, MODULE_ID_WR_SHARED_MEM_EP); + if (!module) + return -ENODEV; + + return module->instance_id; + +} +EXPORT_SYMBOL_GPL(q6apm_graph_get_rx_shmem_module_iid); + +static int graph_callback(struct gpr_resp_pkt *data, void *priv, int op) +{ + struct data_cmd_rsp_rd_sh_mem_ep_data_buffer_done_v2 *rd_done; + struct data_cmd_rsp_wr_sh_mem_ep_data_buffer_done_v2 *done; + struct apm_cmd_rsp_shared_mem_map_regions *rsp; + struct gpr_ibasic_rsp_result_t *result; + struct q6apm_graph *graph = priv; + struct gpr_hdr *hdr = &data->hdr; + struct device *dev = graph->dev; + uint32_t client_event; + int ret = -EINVAL; + phys_addr_t phys; + int token; + + result = data->payload; + + switch (hdr->opcode) { + case DATA_CMD_RSP_WR_SH_MEM_EP_DATA_BUFFER_DONE_V2: + client_event = APM_CLIENT_EVENT_DATA_WRITE_DONE; + mutex_lock(&graph->lock); + token = hdr->token & APM_WRITE_TOKEN_MASK; + + done = data->payload; + phys = graph->rx_data.buf[token].phys; + + if (lower_32_bits(phys) != done->buf_addr_lsw || + upper_32_bits(phys) != done->buf_addr_msw) { + dev_err(dev, "WR BUFF Unexpected addr %08x-%08x\n", + done->buf_addr_lsw, done->buf_addr_msw); + ret = -EINVAL; + } else { + ret = 0; + graph->result.opcode = hdr->opcode; + graph->result.status = done->status; + } + mutex_unlock(&graph->lock); + if (graph->cb) + graph->cb(client_event, hdr->token, data->payload, + graph->priv); + + break; + case APM_CMD_RSP_SHARED_MEM_MAP_REGIONS: + graph->result.opcode = hdr->opcode; + graph->result.status = 0; + rsp = data->payload; + + if (hdr->token == SNDRV_PCM_STREAM_PLAYBACK) + graph->rx_data.mem_map_handle = rsp->mem_map_handle; + else + graph->tx_data.mem_map_handle = rsp->mem_map_handle; + + wake_up(&graph->cmd_wait); + ret = 0; + break; + case DATA_CMD_RSP_RD_SH_MEM_EP_DATA_BUFFER_V2: + client_event = APM_CLIENT_EVENT_DATA_READ_DONE; + mutex_lock(&graph->lock); + rd_done = data->payload; + phys = graph->tx_data.buf[hdr->token].phys; + if (upper_32_bits(phys) != rd_done->buf_addr_msw || + lower_32_bits(phys) != rd_done->buf_addr_lsw) { + dev_err(dev, "RD BUFF Unexpected addr %08x-%08x\n", + rd_done->buf_addr_lsw, rd_done->buf_addr_msw); + ret = -EINVAL; + } else { + ret = 0; + } + mutex_unlock(&graph->lock); + wake_up(&graph->cmd_wait); + + if (graph->cb) + graph->cb(client_event, hdr->token, data->payload, + graph->priv); + break; + case DATA_CMD_WR_SH_MEM_EP_EOS_RENDERED: + break; + case GPR_BASIC_RSP_RESULT: + switch (result->opcode) { + case APM_CMD_SHARED_MEM_UNMAP_REGIONS: + graph->result.opcode = result->opcode; + graph->result.status = 0; + if (hdr->token == SNDRV_PCM_STREAM_PLAYBACK) + graph->rx_data.mem_map_handle = 0; + else + graph->tx_data.mem_map_handle = 0; + + wake_up(&graph->cmd_wait); + ret = 0; + break; + case APM_CMD_SHARED_MEM_MAP_REGIONS: + case DATA_CMD_WR_SH_MEM_EP_MEDIA_FORMAT: + case APM_CMD_SET_CFG: + graph->result.opcode = result->opcode; + graph->result.status = result->status; + if (result->status) { + dev_err(dev, "Error (%d) Processing 0x%08x cmd\n", + result->status, result->opcode); + ret = -EINVAL; + } else { + ret = 0; + } + wake_up(&graph->cmd_wait); + break; + default: + break; + } + break; + default: + break; + } + + return ret; +} + +struct q6apm_graph *q6apm_graph_open(struct device *dev, q6apm_cb cb, + void *priv, int graph_id) +{ + struct q6apm *apm = dev_get_drvdata(dev->parent); + struct audioreach_graph *ar_graph; + struct q6apm_graph *graph; + int ret; + + ar_graph = q6apm_get_audioreach_graph(apm, graph_id); + if (IS_ERR(ar_graph)) { + dev_err(dev, "No graph found with id %d\n", graph_id); + return ERR_CAST(ar_graph); + } + + graph = kzalloc(sizeof(*graph), GFP_KERNEL); + if (!graph) { + ret = -ENOMEM; + goto err; + } + + graph->apm = apm; + graph->priv = priv; + graph->cb = cb; + graph->info = ar_graph->info; + graph->ar_graph = ar_graph; + graph->id = ar_graph->id; + graph->dev = dev; + + mutex_init(&graph->lock); + init_waitqueue_head(&graph->cmd_wait); + + graph->port = gpr_alloc_port(apm->gdev, dev, graph_callback, graph); + if (!graph->port) { + kfree(graph); + ret = -ENOMEM; + goto err; + } + + return graph; +err: + kref_put(&ar_graph->refcount, q6apm_put_audioreach_graph); + return ERR_PTR(ret); +} +EXPORT_SYMBOL_GPL(q6apm_graph_open); + +int q6apm_graph_close(struct q6apm_graph *graph) +{ + struct audioreach_graph *ar_graph = graph->ar_graph; + + gpr_free_port(graph->port); + kref_put(&ar_graph->refcount, q6apm_put_audioreach_graph); + kfree(graph); + + return 0; +} +EXPORT_SYMBOL_GPL(q6apm_graph_close); + +int q6apm_graph_prepare(struct q6apm_graph *graph) +{ + return audioreach_graph_mgmt_cmd(graph->ar_graph, APM_CMD_GRAPH_PREPARE); +} +EXPORT_SYMBOL_GPL(q6apm_graph_prepare); + +int q6apm_graph_start(struct q6apm_graph *graph) +{ + struct audioreach_graph *ar_graph = graph->ar_graph; + int ret = 0; + + if (ar_graph->start_count == 0) + ret = audioreach_graph_mgmt_cmd(ar_graph, APM_CMD_GRAPH_START); + + ar_graph->start_count++; + + return ret; +} +EXPORT_SYMBOL_GPL(q6apm_graph_start); + +int q6apm_graph_stop(struct q6apm_graph *graph) +{ + struct audioreach_graph *ar_graph = graph->ar_graph; + + if (--ar_graph->start_count > 0) + return 0; + + return audioreach_graph_mgmt_cmd(ar_graph, APM_CMD_GRAPH_STOP); +} +EXPORT_SYMBOL_GPL(q6apm_graph_stop); + +int q6apm_graph_flush(struct q6apm_graph *graph) +{ + return audioreach_graph_mgmt_cmd(graph->ar_graph, APM_CMD_GRAPH_FLUSH); +} +EXPORT_SYMBOL_GPL(q6apm_graph_flush); + +static int q6apm_audio_probe(struct snd_soc_component *component) +{ + return audioreach_tplg_init(component); +} + +static void q6apm_audio_remove(struct snd_soc_component *component) +{ + /* remove topology */ + snd_soc_tplg_component_remove(component); +} + +#define APM_AUDIO_DRV_NAME "q6apm-audio" + +static const struct snd_soc_component_driver q6apm_audio_component = { + .name = APM_AUDIO_DRV_NAME, + .probe = q6apm_audio_probe, + .remove = q6apm_audio_remove, +}; + +static int apm_probe(gpr_device_t *gdev) +{ + struct device *dev = &gdev->dev; + struct q6apm *apm; + int ret; + + apm = devm_kzalloc(dev, sizeof(*apm), GFP_KERNEL); + if (!apm) + return -ENOMEM; + + dev_set_drvdata(dev, apm); + + mutex_init(&apm->lock); + apm->dev = dev; + apm->gdev = gdev; + init_waitqueue_head(&apm->wait); + + idr_init(&apm->graph_idr); + idr_init(&apm->graph_info_idr); + idr_init(&apm->sub_graphs_idr); + idr_init(&apm->containers_idr); + + idr_init(&apm->modules_idr); + + q6apm_get_apm_state(apm); + + ret = devm_snd_soc_register_component(dev, &q6apm_audio_component, NULL, 0); + if (ret < 0) { + dev_err(dev, "failed to get register q6apm: %d\n", ret); + return ret; + } + + return of_platform_populate(dev->of_node, NULL, NULL, dev); +} + +struct audioreach_module *q6apm_find_module_by_mid(struct q6apm_graph *graph, uint32_t mid) +{ + struct audioreach_graph_info *info = graph->info; + struct q6apm *apm = graph->apm; + + return __q6apm_find_module_by_mid(apm, info, mid); + +} + +static int apm_callback(struct gpr_resp_pkt *data, void *priv, int op) +{ + gpr_device_t *gdev = priv; + struct q6apm *apm = dev_get_drvdata(&gdev->dev); + struct device *dev = &gdev->dev; + struct gpr_ibasic_rsp_result_t *result; + struct gpr_hdr *hdr = &data->hdr; + int ret = -EINVAL; + + result = data->payload; + + switch (hdr->opcode) { + case APM_CMD_RSP_GET_SPF_STATE: + apm->result.opcode = hdr->opcode; + apm->result.status = 0; + /* First word of result it state */ + apm->state = result->opcode; + wake_up(&apm->wait); + break; + case GPR_BASIC_RSP_RESULT: + switch (result->opcode) { + case APM_CMD_GRAPH_START: + case APM_CMD_GRAPH_OPEN: + case APM_CMD_GRAPH_PREPARE: + case APM_CMD_GRAPH_CLOSE: + case APM_CMD_GRAPH_FLUSH: + case APM_CMD_GRAPH_STOP: + case APM_CMD_SET_CFG: + apm->result.opcode = result->opcode; + apm->result.status = result->status; + if (result->status) { + dev_err(dev, "Error (%d) Processing 0x%08x cmd\n", + result->status, result->opcode); + ret = -EINVAL; + } else { + ret = 0; + } + wake_up(&apm->wait); + break; + default: + break; + } + break; + default: + break; + } + + return ret; +} + +#ifdef CONFIG_OF +static const struct of_device_id apm_device_id[] = { + { .compatible = "qcom,q6apm" }, + {}, +}; +MODULE_DEVICE_TABLE(of, apm_device_id); +#endif + +static gpr_driver_t apm_driver = { + .probe = apm_probe, + .gpr_callback = apm_callback, + .driver = { + .name = "qcom-apm", + .of_match_table = of_match_ptr(apm_device_id), + }, +}; + +module_gpr_driver(apm_driver); +MODULE_DESCRIPTION("Audio Process Manager"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/qcom/qdsp6/q6apm.h b/sound/soc/qcom/qdsp6/q6apm.h new file mode 100644 index 000000000000..54eadadf712c --- /dev/null +++ b/sound/soc/qcom/qdsp6/q6apm.h @@ -0,0 +1,152 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __Q6APM_H__ +#define __Q6APM_H__ +#include <linux/types.h> +#include <linux/slab.h> +#include <linux/wait.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/sched.h> +#include <linux/of.h> +#include <linux/delay.h> +#include <sound/soc.h> +#include <linux/of_platform.h> +#include <linux/jiffies.h> +#include <linux/soc/qcom/apr.h> +#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h> +#include "audioreach.h" + +#define APM_PORT_MAX 127 +#define APM_PORT_MAX_AUDIO_CHAN_CNT 8 +#define PCM_CHANNEL_NULL 0 +#define PCM_CHANNEL_FL 1 /* Front left channel. */ +#define PCM_CHANNEL_FR 2 /* Front right channel. */ +#define PCM_CHANNEL_FC 3 /* Front center channel. */ +#define PCM_CHANNEL_LS 4 /* Left surround channel. */ +#define PCM_CHANNEL_RS 5 /* Right surround channel. */ +#define PCM_CHANNEL_LFE 6 /* Low frequency effect channel. */ +#define PCM_CHANNEL_CS 7 /* Center surround channel; Rear center ch */ +#define PCM_CHANNEL_LB 8 /* Left back channel; Rear left channel. */ +#define PCM_CHANNEL_RB 9 /* Right back channel; Rear right channel. */ +#define PCM_CHANNELS 10 /* Top surround channel. */ + +#define APM_TIMESTAMP_FLAG 0x80000000 +#define FORMAT_LINEAR_PCM 0x0000 +/* APM client callback events */ +#define APM_CMD_EOS 0x0003 +#define APM_CLIENT_EVENT_CMD_EOS_DONE 0x1003 +#define APM_CMD_CLOSE 0x0004 +#define APM_CLIENT_EVENT_CMD_CLOSE_DONE 0x1004 +#define APM_CLIENT_EVENT_CMD_RUN_DONE 0x1008 +#define APM_CLIENT_EVENT_DATA_WRITE_DONE 0x1009 +#define APM_CLIENT_EVENT_DATA_READ_DONE 0x100a +#define APM_WRITE_TOKEN_MASK GENMASK(15, 0) +#define APM_WRITE_TOKEN_LEN_MASK GENMASK(31, 16) +#define APM_WRITE_TOKEN_LEN_SHIFT 16 + +#define APM_MAX_SESSIONS 8 + +struct q6apm { + struct device *dev; + gpr_port_t *port; + gpr_device_t *gdev; + /* For Graph OPEN/START/STOP/CLOSE operations */ + wait_queue_head_t wait; + struct gpr_ibasic_rsp_result_t result; + + struct mutex cmd_lock; + struct mutex lock; + uint32_t state; + + struct idr graph_idr; + struct idr graph_info_idr; + struct idr sub_graphs_idr; + struct idr containers_idr; + struct idr modules_idr; +}; + +struct audio_buffer { + phys_addr_t phys; + uint32_t size; /* size of buffer */ +}; + +struct audioreach_graph_data { + struct audio_buffer *buf; + uint32_t num_periods; + uint32_t dsp_buf; + uint32_t mem_map_handle; +}; + +struct audioreach_graph { + struct audioreach_graph_info *info; + uint32_t id; + int state; + int start_count; + /* Cached Graph data */ + void *graph; + struct kref refcount; + struct q6apm *apm; +}; + +typedef void (*q6apm_cb) (uint32_t opcode, uint32_t token, + void *payload, void *priv); +struct q6apm_graph { + void *priv; + q6apm_cb cb; + uint32_t id; + struct device *dev; + struct q6apm *apm; + gpr_port_t *port; + struct audioreach_graph_data rx_data; + struct audioreach_graph_data tx_data; + struct gpr_ibasic_rsp_result_t result; + wait_queue_head_t cmd_wait; + struct mutex lock; + struct audioreach_graph *ar_graph; + struct audioreach_graph_info *info; +}; + +/* Graph Operations */ +struct q6apm_graph *q6apm_graph_open(struct device *dev, q6apm_cb cb, + void *priv, int graph_id); +int q6apm_graph_close(struct q6apm_graph *graph); +int q6apm_graph_prepare(struct q6apm_graph *graph); +int q6apm_graph_start(struct q6apm_graph *graph); +int q6apm_graph_stop(struct q6apm_graph *graph); +int q6apm_graph_flush(struct q6apm_graph *graph); + +/* Media Format */ +int q6apm_graph_media_format_pcm(struct q6apm_graph *graph, + struct audioreach_module_config *cfg); + +int q6apm_graph_media_format_shmem(struct q6apm_graph *graph, + struct audioreach_module_config *cfg); + +/* read/write related */ +int q6apm_send_eos_nowait(struct q6apm_graph *graph); +int q6apm_read(struct q6apm_graph *graph); +int q6apm_write_async(struct q6apm_graph *graph, uint32_t len, uint32_t msw_ts, + uint32_t lsw_ts, uint32_t wflags); + +/* Memory Map related */ +int q6apm_map_memory_regions(struct q6apm_graph *graph, + unsigned int dir, phys_addr_t phys, + size_t period_sz, unsigned int periods); +int q6apm_unmap_memory_regions(struct q6apm_graph *graph, + unsigned int dir); +/* Helpers */ +int q6apm_send_cmd_sync(struct q6apm *apm, struct gpr_pkt *pkt, + uint32_t rsp_opcode); + +/* Callback for graph specific */ +struct audioreach_module *q6apm_find_module_by_mid(struct q6apm_graph *graph, + uint32_t mid); + +void q6apm_set_fe_dai_ops(struct snd_soc_dai_driver *dai_drv); +int q6apm_connect_sub_graphs(struct q6apm *apm, u32 src_sgid, u32 dst_sgid, + bool connect); +bool q6apm_is_sub_graphs_connected(struct q6apm *apm, u32 src_sgid, + u32 dst_sgid); +int q6apm_graph_get_rx_shmem_module_iid(struct q6apm_graph *graph); + +#endif /* __APM_GRAPH_ */

Add ASoC topology support in audioreach

Signed-off-by: Srinivas Kandagatla srinivas.kandagatla@linaro.org --- include/uapi/sound/snd_ar_tokens.h | 208 ++++++ sound/soc/qcom/Kconfig | 1 + sound/soc/qcom/qdsp6/Makefile | 2 +- sound/soc/qcom/qdsp6/topology.c | 1119 ++++++++++++++++++++++++++++ 4 files changed, 1329 insertions(+), 1 deletion(-) create mode 100644 include/uapi/sound/snd_ar_tokens.h create mode 100644 sound/soc/qcom/qdsp6/topology.c

diff --git a/include/uapi/sound/snd_ar_tokens.h b/include/uapi/sound/snd_ar_tokens.h new file mode 100644 index 000000000000..440c0725660b --- /dev/null +++ b/include/uapi/sound/snd_ar_tokens.h @@ -0,0 +1,208 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ + +#ifndef __SND_AR_TOKENS_H__ +#define __SND_AR_TOKENS_H__ + +#define APM_SUB_GRAPH_PERF_MODE_LOW_POWER 0x1 +#define APM_SUB_GRAPH_PERF_MODE_LOW_LATENCY 0x2 + +#define APM_SUB_GRAPH_DIRECTION_TX 0x1 +#define APM_SUB_GRAPH_DIRECTION_RX 0x2 + +/** Scenario ID Audio Playback */ +#define APM_SUB_GRAPH_SID_AUDIO_PLAYBACK 0x1 +/* Scenario ID Audio Record */ +#define APM_SUB_GRAPH_SID_AUDIO_RECORD 0x2 +/* Scenario ID Voice call. */ +#define APM_SUB_GRAPH_SID_VOICE_CALL 0x3 + +/* container capability ID Pre/Post Processing (PP) */ +#define APM_CONTAINER_CAP_ID_PP 0x1 +/* container capability ID Compression/Decompression (CD) */ +#define APM_CONTAINER_CAP_ID_CD 0x2 +/* container capability ID End Point(EP) */ +#define APM_CONTAINER_CAP_ID_EP 0x3 +/* container capability ID Offload (OLC) */ +#define APM_CONTAINER_CAP_ID_OLC 0x4 + +/* container graph position Stream */ +#define APM_CONT_GRAPH_POS_STREAM 0x1 +/* container graph position Per Stream Per Device*/ +#define APM_CONT_GRAPH_POS_PER_STR_PER_DEV 0x2 +/* container graph position Stream-Device */ +#define APM_CONT_GRAPH_POS_STR_DEV 0x3 +/* container graph position Global Device */ +#define APM_CONT_GRAPH_POS_GLOBAL_DEV 0x4 + +#define APM_PROC_DOMAIN_ID_MDSP 0x1 +#define APM_PROC_DOMAIN_ID_ADSP 0x2 +#define APM_PROC_DOMAIN_ID_SDSP 0x4 +#define APM_PROC_DOMAIN_ID_CDSP 0x5 + +#define PCM_INTERLEAVED 1 +#define PCM_DEINTERLEAVED_PACKED 2 +#define PCM_DEINTERLEAVED_UNPACKED 3 +#define AR_I2S_WS_SRC_EXTERNAL 0 +#define AR_I2S_WS_SRC_INTERNAL 1 + +enum ar_event_types { + AR_EVENT_NONE = 0, + AR_PGA_DAPM_EVENT +}; + +/* + * Kcontrol IDs + */ +#define SND_SOC_AR_TPLG_FE_BE_GRAPH_CTL_MIX 256 +#define SND_SOC_AR_TPLG_VOL_CTL 257 + +/** + * %AR_TKN_U32_SUB_GRAPH_INSTANCE_ID: Sub Graph Instance Id + * + * %AR_TKN_U32_SUB_GRAPH_PERF_MODE: Performance mode of subgraph + * APM_SUB_GRAPH_PERF_MODE_LOW_POWER = 1, + * APM_SUB_GRAPH_PERF_MODE_LOW_LATENCY = 2 + * + * %AR_TKN_U32_SUB_GRAPH_DIRECTION: Direction of subgraph + * APM_SUB_GRAPH_DIRECTION_TX = 1, + * APM_SUB_GRAPH_DIRECTION_RX = 2 + * + * %AR_TKN_U32_SUB_GRAPH_SCENARIO_ID: Scenario ID for subgraph + * APM_SUB_GRAPH_SID_AUDIO_PLAYBACK = 1, + * APM_SUB_GRAPH_SID_AUDIO_RECORD = 2, + * APM_SUB_GRAPH_SID_VOICE_CALL = 3 + * + * %AR_TKN_U32_CONTAINER_INSTANCE_ID: Container Instance ID + * + * %AR_TKN_U32_CONTAINER_CAPABILITY_ID: Container capability ID + * APM_CONTAINER_CAP_ID_PP = 1, + * APM_CONTAINER_CAP_ID_CD = 2, + * APM_CONTAINER_CAP_ID_EP = 3, + * APM_CONTAINER_CAP_ID_OLC = 4 + * + * %AR_TKN_U32_CONTAINER_STACK_SIZE: Stack size in the container. + * + * %AR_TKN_U32_CONTAINER_GRAPH_POS: Graph Position + * APM_CONT_GRAPH_POS_STREAM = 1, + * APM_CONT_GRAPH_POS_PER_STR_PER_DEV = 2, + * APM_CONT_GRAPH_POS_STR_DEV = 3, + * APM_CONT_GRAPH_POS_GLOBAL_DEV = 4 + * + * %AR_TKN_U32_CONTAINER_PROC_DOMAIN: Processor domain of container + * APM_PROC_DOMAIN_ID_MDSP = 1, + * APM_PROC_DOMAIN_ID_ADSP = 2, + * APM_PROC_DOMAIN_ID_SDSP = 4, + * APM_PROC_DOMAIN_ID_CDSP = 5 + * + * %AR_TKN_U32_MODULE_ID: Module ID + * + * %AR_TKN_U32_MODULE_INSTANCE_ID: Module Instance ID. + * + * %AR_TKN_U32_MODULE_MAX_IP_PORTS: Module maximum input ports + * + * %AR_TKN_U32_MODULE_MAX_OP_PORTS: Module maximum output ports. + * + * %AR_TKN_U32_MODULE_IN_PORTS: Number of in ports + * + * %AR_TKN_U32_MODULE_OUT_PORTS: Number of out ports. + * + * %AR_TKN_U32_MODULE_SRC_OP_PORT_ID: Source module output port ID + * + * %AR_TKN_U32_MODULE_DST_IN_PORT_ID: Destination module input port ID + * + * %AR_TKN_U32_MODULE_HW_IF_IDX: Interface index types for I2S/LPAIF + * + * %AR_TKN_U32_MODULE_HW_IF_TYPE: Interface type + * LPAIF = 0, + * LPAIF_RXTX = 1, + * LPAIF_WSA = 2, + * LPAIF_VA = 3, + * LPAIF_AXI = 4 + * + * %AR_TKN_U32_MODULE_FMT_INTERLEAVE: PCM Interleaving + * PCM_INTERLEAVED = 1, + * PCM_DEINTERLEAVED_PACKED = 2, + * PCM_DEINTERLEAVED_UNPACKED = 3 + * + * %AR_TKN_U32_MODULE_FMT_DATA: data format + * FIXED POINT = 1, + * IEC60958 PACKETIZED = 3, + * IEC60958 PACKETIZED NON LINEAR = 8, + * COMPR OVER PCM PACKETIZED = 7, + * IEC61937 PACKETIZED = 2, + * GENERIC COMPRESSED = 5 + * + * %AR_TKN_U32_MODULE_FMT_SAMPLE_RATE: sample rate + * + * %AR_TKN_U32_MODULE_FMT_BIT_DEPTH: bit depth + * + * %AR_TKN_U32_MODULE_SD_LINE_IDX: I2S serial data line idx + * I2S_SD0 = 1, + * I2S_SD1 = 2, + * I2S_SD2 = 3, + * I2S_SD3 = 4, + * I2S_QUAD01 = 5, + * I2S_QUAD23 = 6, + * I2S_6CHS = 7, + * I2S_8CHS = 8 + * + * %AR_TKN_U32_MODULE_WS_SRC: Word Select Source + * AR_I2S_WS_SRC_EXTERNAL = 0, + * AR_I2S_WS_SRC_INTERNAL = 1, + * + * %AR_TKN_U32_MODULE_FRAME_SZ_FACTOR: Frame size factor + * + * %AR_TKN_U32_MODULE_LOG_CODE: Log Module Code + * + * %AR_TKN_U32_MODULE_LOG_TAP_POINT_ID: logging tap point of this module + * + * %AR_TKN_U32_MODULE_LOG_MODE: logging mode + * LOG_WAIT = 0, + * LOG_IMMEDIATELY = 1 + * + * %AR_TKN_DAI_INDEX: dai index + * + */ + +/* DAI Tokens */ +#define AR_TKN_DAI_INDEX 1 +/* SUB GRAPH Tokens */ +#define AR_TKN_U32_SUB_GRAPH_INSTANCE_ID 2 +#define AR_TKN_U32_SUB_GRAPH_PERF_MODE 3 +#define AR_TKN_U32_SUB_GRAPH_DIRECTION 4 +#define AR_TKN_U32_SUB_GRAPH_SCENARIO_ID 5 + +/* Container Tokens */ +#define AR_TKN_U32_CONTAINER_INSTANCE_ID 100 +#define AR_TKN_U32_CONTAINER_CAPABILITY_ID 101 +#define AR_TKN_U32_CONTAINER_STACK_SIZE 102 +#define AR_TKN_U32_CONTAINER_GRAPH_POS 103 +#define AR_TKN_U32_CONTAINER_PROC_DOMAIN 104 + +/* Module Tokens */ +#define AR_TKN_U32_MODULE_ID 200 +#define AR_TKN_U32_MODULE_INSTANCE_ID 201 +#define AR_TKN_U32_MODULE_MAX_IP_PORTS 202 +#define AR_TKN_U32_MODULE_MAX_OP_PORTS 203 +#define AR_TKN_U32_MODULE_IN_PORTS 204 +#define AR_TKN_U32_MODULE_OUT_PORTS 205 +#define AR_TKN_U32_MODULE_SRC_OP_PORT_ID 206 +#define AR_TKN_U32_MODULE_DST_IN_PORT_ID 207 +#define AR_TKN_U32_MODULE_SRC_INSTANCE_ID 208 +#define AR_TKN_U32_MODULE_DST_INSTANCE_ID 209 + + +#define AR_TKN_U32_MODULE_HW_IF_IDX 250 +#define AR_TKN_U32_MODULE_HW_IF_TYPE 251 +#define AR_TKN_U32_MODULE_FMT_INTERLEAVE 252 +#define AR_TKN_U32_MODULE_FMT_DATA 253 +#define AR_TKN_U32_MODULE_FMT_SAMPLE_RATE 254 +#define AR_TKN_U32_MODULE_FMT_BIT_DEPTH 255 +#define AR_TKN_U32_MODULE_SD_LINE_IDX 256 +#define AR_TKN_U32_MODULE_WS_SRC 257 +#define AR_TKN_U32_MODULE_FRAME_SZ_FACTOR 258 +#define AR_TKN_U32_MODULE_LOG_CODE 259 +#define AR_TKN_U32_MODULE_LOG_TAP_POINT_ID 260 +#define AR_TKN_U32_MODULE_LOG_MODE 261 + +#endif /* __SND_AR_TOKENS_H__ */ diff --git a/sound/soc/qcom/Kconfig b/sound/soc/qcom/Kconfig index 5a693f83fd6c..66d8436ab0a8 100644 --- a/sound/soc/qcom/Kconfig +++ b/sound/soc/qcom/Kconfig @@ -100,6 +100,7 @@ config SND_SOC_QDSP6 select SND_SOC_QDSP6_ROUTING select SND_SOC_QDSP6_ASM select SND_SOC_QDSP6_ASM_DAI + select SND_SOC_TOPOLOGY select SND_SOC_QDSP6_APM help To add support for MSM QDSP6 Soc Audio. diff --git a/sound/soc/qcom/qdsp6/Makefile b/sound/soc/qcom/qdsp6/Makefile index 1a0803d97eec..766b824f6597 100644 --- a/sound/soc/qcom/qdsp6/Makefile +++ b/sound/soc/qcom/qdsp6/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only snd-q6dsp-common-objs := q6dsp-common.o q6dsp-lpass-ports.o q6dsp-lpass-clocks.o -snd-q6apm-objs := q6apm.o audioreach.o +snd-q6apm-objs := q6apm.o audioreach.o topology.o

obj-$(CONFIG_SND_SOC_QDSP6_COMMON) += snd-q6dsp-common.o obj-$(CONFIG_SND_SOC_QDSP6_CORE) += q6core.o diff --git a/sound/soc/qcom/qdsp6/topology.c b/sound/soc/qcom/qdsp6/topology.c new file mode 100644 index 000000000000..5c49d579e5fa --- /dev/null +++ b/sound/soc/qcom/qdsp6/topology.c @@ -0,0 +1,1119 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2020, Linaro Limited + +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/pcm.h> +#include <sound/control.h> +#include <sound/asound.h> +#include <linux/firmware.h> +#include <sound/soc-topology.h> +#include <sound/soc-dpcm.h> +#include <uapi/sound/snd_ar_tokens.h> +#include <linux/kernel.h> +#include <linux/wait.h> +#include "q6apm.h" +#include "audioreach.h" + +struct snd_ar_control { + u32 sgid; /* Sub Graph ID */ + struct snd_soc_component *scomp; +}; + +static struct audioreach_graph_info *audioreach_tplg_alloc_graph_info(struct q6apm *apm, + uint32_t graph_id, + bool *found) +{ + struct audioreach_graph_info *info; + int ret; + + mutex_lock(&apm->lock); + info = idr_find(&apm->graph_info_idr, graph_id); + mutex_unlock(&apm->lock); + + if (info) { + *found = true; + return info; + } + + *found = false; + info = kzalloc(sizeof(*info), GFP_KERNEL); + if (!info) + return ERR_PTR(-ENOMEM); + + + INIT_LIST_HEAD(&info->sg_list); + + mutex_lock(&apm->lock); + ret = idr_alloc(&apm->graph_info_idr, info, graph_id, graph_id + 1, GFP_KERNEL); + mutex_unlock(&apm->lock); + + if (ret < 0) { + dev_err(apm->dev, "Failed to allocate Graph ID (%x)\n", graph_id); + kfree(info); + return ERR_PTR(ret); + } + + info->id = ret; + + return info; +} + +static void audioreach_tplg_add_sub_graph(struct audioreach_sub_graph *sg, + struct audioreach_graph_info *info) +{ + list_add_tail(&sg->node, &info->sg_list); + sg->info = info; + info->num_sub_graphs++; +} + +static struct audioreach_sub_graph *audioreach_tplg_alloc_sub_graph(struct q6apm *apm, + uint32_t sub_graph_id, + bool *found) +{ + struct audioreach_sub_graph *sg; + int ret; + + if (!sub_graph_id) + return ERR_PTR(-EINVAL); + + /* Find if there is already a matching sub-graph */ + mutex_lock(&apm->lock); + sg = idr_find(&apm->sub_graphs_idr, sub_graph_id); + mutex_unlock(&apm->lock); + + + if (sg) { + *found = true; + return sg; + } + + *found = false; + sg = kzalloc(sizeof(*sg), GFP_KERNEL); + if (!sg) + return ERR_PTR(-ENOMEM); + + INIT_LIST_HEAD(&sg->container_list); + + mutex_lock(&apm->lock); + ret = idr_alloc(&apm->sub_graphs_idr, sg, sub_graph_id, sub_graph_id + 1, GFP_KERNEL); + mutex_unlock(&apm->lock); + + if (ret < 0) { + dev_err(apm->dev, + "Failed to allocate Sub-Graph Instance ID (%x)\n", + sub_graph_id); + kfree(sg); + return ERR_PTR(ret); + } + + sg->sub_graph_id = ret; + + return sg; +} + +static struct audioreach_container *audioreach_tplg_alloc_container(struct q6apm *apm, + struct audioreach_sub_graph *sg, + uint32_t container_id, + bool *found) +{ + struct audioreach_container *cont; + int ret; + + if (!container_id) + return ERR_PTR(-EINVAL); + + mutex_lock(&apm->lock); + cont = idr_find(&apm->containers_idr, container_id); + mutex_unlock(&apm->lock); + + if (cont) { + *found = true; + return cont; + } + *found = false; + + cont = kzalloc(sizeof(*cont), GFP_KERNEL); + if (!cont) + return ERR_PTR(-ENOMEM); + + INIT_LIST_HEAD(&cont->modules_list); + + mutex_lock(&apm->lock); + ret = idr_alloc(&apm->containers_idr, cont, container_id, container_id + 1, GFP_KERNEL); + mutex_unlock(&apm->lock); + + if (ret < 0) { + dev_err(apm->dev, + "Failed to allocate Container Instance ID (%x)\n", + container_id); + kfree(cont); + return ERR_PTR(ret); + } + + cont->container_id = ret; + cont->sub_graph = sg; + /* add to container list */ + list_add_tail(&cont->node, &sg->container_list); + sg->num_containers++; + + return cont; +} + +static struct audioreach_module *audioreach_tplg_alloc_module(struct q6apm *apm, + struct audioreach_container *cont, + struct snd_soc_dapm_widget *w, + uint32_t module_id, bool *found) +{ + struct audioreach_module *mod; + int ret; + + mutex_lock(&apm->lock); + mod = idr_find(&apm->modules_idr, module_id); + mutex_unlock(&apm->lock); + + if (mod) { + *found = true; + return mod; + } + *found = false; + mod = kzalloc(sizeof(*mod), GFP_KERNEL); + if (!mod) + return ERR_PTR(-ENOMEM); + + mutex_lock(&apm->lock); + if (!module_id) { /* alloc module id dynamically */ + ret = idr_alloc_cyclic(&apm->modules_idr, mod, + AR_MODULE_DYNAMIC_INSTANCE_ID_START, + AR_MODULE_DYNAMIC_INSTANCE_ID_END, GFP_KERNEL); + } else { + ret = idr_alloc(&apm->modules_idr, mod, module_id, module_id + 1, GFP_KERNEL); + } + mutex_unlock(&apm->lock); + + if (ret < 0) { + dev_err(apm->dev, + "Failed to allocate Module Instance ID (%x)\n", module_id); + kfree(mod); + return ERR_PTR(ret); + } + + mod->instance_id = ret; + dev_err(apm->dev, "Module Instance ID (0x%08x) allocated\n", ret); + /* add to module list */ + list_add_tail(&mod->node, &cont->modules_list); + mod->container = cont; + mod->widget = w; + cont->num_modules++; + + return mod; +} + +static struct snd_soc_tplg_vendor_array *audioreach_get_sg_array( + struct snd_soc_tplg_private *private) +{ + struct snd_soc_tplg_vendor_array *sg_array = NULL; + bool found = false; + int sz; + + for (sz = 0; !found && (sz < le32_to_cpu(private->size)); ) { + struct snd_soc_tplg_vendor_value_elem *sg_elem; + int tkn_count = 0; + + sg_array = (struct snd_soc_tplg_vendor_array *)((u8 *)private->array + sz); + sg_elem = sg_array->value; + sz = sz + le32_to_cpu(sg_array->size); + while (!found && tkn_count <= (le32_to_cpu(sg_array->num_elems) - 1)) { + switch (le32_to_cpu(sg_elem->token)) { + case AR_TKN_U32_SUB_GRAPH_INSTANCE_ID: + found = true; + break; + default: + break; + } + tkn_count++; + sg_elem++; + } + } + + if (found) + return sg_array; + + return NULL; +} + +static struct snd_soc_tplg_vendor_array *audioreach_get_cont_array( + struct snd_soc_tplg_private *private) +{ + struct snd_soc_tplg_vendor_array *cont_array = NULL; + bool found = false; + int sz; + + for (sz = 0; !found && (sz < le32_to_cpu(private->size)); ) { + struct snd_soc_tplg_vendor_value_elem *cont_elem; + int tkn_count = 0; + + cont_array = (struct snd_soc_tplg_vendor_array *)((u8 *)private->array + sz); + cont_elem = cont_array->value; + sz = sz + le32_to_cpu(cont_array->size); + while (!found && tkn_count <= (le32_to_cpu(cont_array->num_elems) - 1)) { + switch (le32_to_cpu(cont_elem->token)) { + case AR_TKN_U32_CONTAINER_INSTANCE_ID: + found = true; + break; + default: + break; + } + tkn_count++; + cont_elem++; + } + } + + if (found) + return cont_array; + + return NULL; +} + +static struct snd_soc_tplg_vendor_array *audioreach_get_module_array( + struct snd_soc_tplg_private *private) +{ + struct snd_soc_tplg_vendor_array *mod_array = NULL; + bool found = false; + int sz = 0; + + for (sz = 0; !found && (sz < le32_to_cpu(private->size)); ) { + struct snd_soc_tplg_vendor_value_elem *mod_elem; + int tkn_count = 0; + + mod_array = (struct snd_soc_tplg_vendor_array *)((u8 *)private->array + sz); + mod_elem = mod_array->value; + sz = sz + le32_to_cpu(mod_array->size); + while (!found && tkn_count <= (le32_to_cpu(mod_array->num_elems) - 1)) { + switch (le32_to_cpu(mod_elem->token)) { + case AR_TKN_U32_MODULE_INSTANCE_ID: + found = true; + break; + default: + break; + } + tkn_count++; + mod_elem++; + } + } + + if (found) + return mod_array; + + return NULL; +} + +static struct audioreach_sub_graph *audioreach_parse_sg_tokens(struct q6apm *apm, + struct snd_soc_tplg_private *private) +{ + struct snd_soc_tplg_vendor_value_elem *sg_elem; + struct snd_soc_tplg_vendor_array *sg_array; + struct audioreach_graph_info *info = NULL; + int graph_id, sub_graph_id, tkn_count = 0; + struct audioreach_sub_graph *sg; + bool found; + + sg_array = audioreach_get_sg_array(private); + sg_elem = sg_array->value; + + while (tkn_count <= (le32_to_cpu(sg_array->num_elems) - 1)) { + switch (le32_to_cpu(sg_elem->token)) { + case AR_TKN_U32_SUB_GRAPH_INSTANCE_ID: + sub_graph_id = le32_to_cpu(sg_elem->value); + sg = audioreach_tplg_alloc_sub_graph(apm, sub_graph_id, &found); + if (IS_ERR(sg)) { + return sg; + } else if (found) { + /* Already parsed data for this sub-graph */ + return sg; + } + dev_err(apm->dev, "%s: New subgraph id : 0x%08x\n", __func__, + sub_graph_id); + break; + case AR_TKN_DAI_INDEX: + /* Sub graph is associated with predefined graph */ + graph_id = le32_to_cpu(sg_elem->value); + info = audioreach_tplg_alloc_graph_info(apm, graph_id, &found); + if (IS_ERR(info)) + return ERR_CAST(info); + break; + case AR_TKN_U32_SUB_GRAPH_PERF_MODE: + sg->perf_mode = le32_to_cpu(sg_elem->value); + break; + case AR_TKN_U32_SUB_GRAPH_DIRECTION: + sg->direction = le32_to_cpu(sg_elem->value); + break; + case AR_TKN_U32_SUB_GRAPH_SCENARIO_ID: + sg->scenario_id = le32_to_cpu(sg_elem->value); + break; + default: + dev_err(apm->dev, "Not a valid token %d for graph\n", + sg_elem->token); + break; + + } + tkn_count++; + sg_elem++; + } + + /* Sub graph is associated with predefined graph */ + if (info) { + dev_err(apm->dev, "%s: adding subgraph id : 0x%08x -> %d\n", __func__, + sub_graph_id, graph_id); + + audioreach_tplg_add_sub_graph(sg, info); + } + + return sg; +} + +static struct audioreach_container *audioreach_parse_cont_tokens(struct q6apm *apm, + struct audioreach_sub_graph *sg, + struct snd_soc_tplg_private *private) +{ + struct snd_soc_tplg_vendor_value_elem *cont_elem; + struct snd_soc_tplg_vendor_array *cont_array; + struct audioreach_container *cont; + int container_id, tkn_count = 0; + bool found = false; + + cont_array = audioreach_get_cont_array(private); + cont_elem = cont_array->value; + + while (tkn_count <= (le32_to_cpu(cont_array->num_elems) - 1)) { + switch (le32_to_cpu(cont_elem->token)) { + case AR_TKN_U32_CONTAINER_INSTANCE_ID: + container_id = le32_to_cpu(cont_elem->value); + cont = audioreach_tplg_alloc_container(apm, sg, container_id, &found); + if (IS_ERR(cont)) + return ERR_PTR(-ENOMEM); + else if (found) /* Already parsed container data */ + return cont; + + break; + case AR_TKN_U32_CONTAINER_CAPABILITY_ID: + cont->capability_id = le32_to_cpu(cont_elem->value); + break; + case AR_TKN_U32_CONTAINER_STACK_SIZE: + cont->stack_size = le32_to_cpu(cont_elem->value); + break; + case AR_TKN_U32_CONTAINER_GRAPH_POS: + cont->graph_pos = le32_to_cpu(cont_elem->value); + break; + case AR_TKN_U32_CONTAINER_PROC_DOMAIN: + cont->proc_domain = le32_to_cpu(cont_elem->value); + break; + default: + dev_err(apm->dev, "Not a valid token %d for graph\n", + cont_elem->token); + break; + + } + tkn_count++; + cont_elem++; + } + + return cont; +} + +static struct audioreach_module *audioreach_parse_common_tokens(struct q6apm *apm, + struct audioreach_container *cont, + struct snd_soc_tplg_private *private, + struct snd_soc_dapm_widget *w) +{ + uint32_t max_ip_port = 0, max_op_port = 0, in_port = 0, out_port = 0; + uint32_t src_mod_inst_id = 0, src_mod_op_port_id = 0; + uint32_t dst_mod_inst_id = 0, dst_mod_ip_port_id = 0; + int module_id = 0, instance_id = 0, tkn_count = 0; + struct snd_soc_tplg_vendor_value_elem *mod_elem; + struct snd_soc_tplg_vendor_array *mod_array; + struct audioreach_module *mod = NULL; + bool found; + + mod_array = audioreach_get_module_array(private); + mod_elem = mod_array->value; + + while (tkn_count <= (le32_to_cpu(mod_array->num_elems) - 1)) { + switch (le32_to_cpu(mod_elem->token)) { + /* common module info */ + case AR_TKN_U32_MODULE_ID: + module_id = le32_to_cpu(mod_elem->value); + break; + case AR_TKN_U32_MODULE_INSTANCE_ID: + instance_id = le32_to_cpu(mod_elem->value); + mod = audioreach_tplg_alloc_module(apm, cont, w, + instance_id, &found); + if (IS_ERR(mod)) { + return ERR_PTR(-ENOMEM); + } else if (found) { + dev_err(apm->dev, "Duplicate Module Instance ID 0x%08x found\n", + instance_id); + return ERR_PTR(-EINVAL); + } + + break; + case AR_TKN_U32_MODULE_MAX_IP_PORTS: + max_ip_port = le32_to_cpu(mod_elem->value); + break; + case AR_TKN_U32_MODULE_MAX_OP_PORTS: + max_op_port = le32_to_cpu(mod_elem->value); + break; + case AR_TKN_U32_MODULE_IN_PORTS: + in_port = le32_to_cpu(mod_elem->value); + break; + case AR_TKN_U32_MODULE_OUT_PORTS: + out_port = le32_to_cpu(mod_elem->value); + break; + case AR_TKN_U32_MODULE_SRC_OP_PORT_ID: + src_mod_op_port_id = le32_to_cpu(mod_elem->value); + break; + case AR_TKN_U32_MODULE_SRC_INSTANCE_ID: + src_mod_inst_id = le32_to_cpu(mod_elem->value); + break; + case AR_TKN_U32_MODULE_DST_INSTANCE_ID: + dst_mod_inst_id = le32_to_cpu(mod_elem->value); + break; + case AR_TKN_U32_MODULE_DST_IN_PORT_ID: + dst_mod_ip_port_id = le32_to_cpu(mod_elem->value); + + default: + break; + + } + tkn_count++; + mod_elem++; + } + + if (mod) { + mod->module_id = module_id; + mod->max_ip_port = max_ip_port; + mod->max_op_port = max_op_port; + mod->in_port = in_port; + mod->out_port = out_port; + mod->src_mod_inst_id = src_mod_inst_id; + mod->src_mod_op_port_id = src_mod_op_port_id; + mod->dst_mod_inst_id = dst_mod_inst_id; + mod->dst_mod_ip_port_id = dst_mod_ip_port_id; + } + + return mod; +} + +static int audioreach_widget_load_module_common(struct snd_soc_component *component, + int index, struct snd_soc_dapm_widget *w, + struct snd_soc_tplg_dapm_widget *tplg_w) +{ + struct q6apm *apm = dev_get_drvdata(component->dev); + struct audioreach_container *cont; + struct audioreach_sub_graph *sg; + struct audioreach_module *mod; + struct snd_soc_dobj *dobj; + + sg = audioreach_parse_sg_tokens(apm, &tplg_w->priv); + if (IS_ERR(sg)) + return PTR_ERR(sg); + + cont = audioreach_parse_cont_tokens(apm, sg, &tplg_w->priv); + if (IS_ERR(cont)) + return PTR_ERR(cont); + + mod = audioreach_parse_common_tokens(apm, cont, &tplg_w->priv, w); + if (IS_ERR(mod)) + return PTR_ERR(mod); + + dobj = &w->dobj; + dobj->private = mod; + + return 0; +} + +static int audioreach_widget_load_enc_dec_cnv(struct snd_soc_component *component, + int index, struct snd_soc_dapm_widget *w, + struct snd_soc_tplg_dapm_widget *tplg_w) +{ + struct snd_soc_tplg_vendor_value_elem *mod_elem; + struct snd_soc_tplg_vendor_array *mod_array; + struct audioreach_module *mod; + struct snd_soc_dobj *dobj; + int tkn_count = 0; + int ret; + + ret = audioreach_widget_load_module_common(component, index, w, tplg_w); + if (ret) + return ret; + + dobj = &w->dobj; + mod = dobj->private; + mod_array = audioreach_get_module_array(&tplg_w->priv); + mod_elem = mod_array->value; + + while (tkn_count <= (le32_to_cpu(mod_array->num_elems) - 1)) { + switch (le32_to_cpu(mod_elem->token)) { + case AR_TKN_U32_MODULE_FMT_INTERLEAVE: + mod->interleave_type = le32_to_cpu(mod_elem->value); + break; + case AR_TKN_U32_MODULE_FMT_SAMPLE_RATE: + mod->rate = le32_to_cpu(mod_elem->value); + break; + case AR_TKN_U32_MODULE_FMT_BIT_DEPTH: + mod->bit_depth = le32_to_cpu(mod_elem->value); + break; + default: + break; + } + tkn_count++; + mod_elem++; + } + + return 0; +} + +static int audioreach_widget_log_module_load(struct audioreach_module *mod, + struct snd_soc_tplg_vendor_array *mod_array) +{ + struct snd_soc_tplg_vendor_value_elem *mod_elem; + int tkn_count = 0; + + mod_elem = mod_array->value; + + while (tkn_count <= (le32_to_cpu(mod_array->num_elems) - 1)) { + switch (le32_to_cpu(mod_elem->token)) { + + case AR_TKN_U32_MODULE_LOG_CODE: + mod->log_code = le32_to_cpu(mod_elem->value); + break; + case AR_TKN_U32_MODULE_LOG_TAP_POINT_ID: + mod->log_tap_point_id = le32_to_cpu(mod_elem->value); + break; + case AR_TKN_U32_MODULE_LOG_MODE: + mod->log_mode = le32_to_cpu(mod_elem->value); + break; + default: + break; + } + tkn_count++; + mod_elem++; + } + + return 0; +} + +static int audioreach_widget_dma_module_load(struct audioreach_module *mod, + struct snd_soc_tplg_vendor_array *mod_array) +{ + struct snd_soc_tplg_vendor_value_elem *mod_elem; + int tkn_count = 0; + + mod_elem = mod_array->value; + + while (tkn_count <= (le32_to_cpu(mod_array->num_elems) - 1)) { + switch (le32_to_cpu(mod_elem->token)) { + case AR_TKN_U32_MODULE_HW_IF_IDX: + mod->hw_interface_idx = le32_to_cpu(mod_elem->value); + break; + case AR_TKN_U32_MODULE_FMT_DATA: + mod->data_format = le32_to_cpu(mod_elem->value); + break; + case AR_TKN_U32_MODULE_HW_IF_TYPE: + mod->hw_interface_type = le32_to_cpu(mod_elem->value); + break; + default: + break; + } + tkn_count++; + mod_elem++; + } + + return 0; +} + +static int audioreach_widget_i2s_module_load(struct audioreach_module *mod, + struct snd_soc_tplg_vendor_array *mod_array) +{ + struct snd_soc_tplg_vendor_value_elem *mod_elem; + int tkn_count = 0; + + mod_elem = mod_array->value; + + while (tkn_count <= (le32_to_cpu(mod_array->num_elems) - 1)) { + switch (le32_to_cpu(mod_elem->token)) { + case AR_TKN_U32_MODULE_HW_IF_IDX: + mod->hw_interface_idx = le32_to_cpu(mod_elem->value); + break; + case AR_TKN_U32_MODULE_FMT_DATA: + mod->data_format = le32_to_cpu(mod_elem->value); + break; + case AR_TKN_U32_MODULE_HW_IF_TYPE: + mod->hw_interface_type = le32_to_cpu(mod_elem->value); + break; + case AR_TKN_U32_MODULE_SD_LINE_IDX: + mod->sd_line_idx = le32_to_cpu(mod_elem->value); + break; + case AR_TKN_U32_MODULE_WS_SRC: + mod->ws_src = le32_to_cpu(mod_elem->value); + break; + default: + break; + } + tkn_count++; + mod_elem++; + } + + return 0; +} + +static int audioreach_widget_load_buffer(struct snd_soc_component *component, + int index, struct snd_soc_dapm_widget *w, + struct snd_soc_tplg_dapm_widget *tplg_w) +{ + struct snd_soc_tplg_vendor_array *mod_array; + struct audioreach_module *mod; + struct snd_soc_dobj *dobj; + int ret; + + ret = audioreach_widget_load_module_common(component, index, w, tplg_w); + if (ret) + return ret; + + dobj = &w->dobj; + mod = dobj->private; + + mod_array = audioreach_get_module_array(&tplg_w->priv); + + switch (mod->module_id) { + case MODULE_ID_CODEC_DMA_SINK: + case MODULE_ID_CODEC_DMA_SOURCE: + audioreach_widget_dma_module_load(mod, mod_array); + break; + case MODULE_ID_DATA_LOGGING: + audioreach_widget_log_module_load(mod, mod_array); + break; + case MODULE_ID_I2S_SINK: + case MODULE_ID_I2S_SOURCE: + audioreach_widget_i2s_module_load(mod, mod_array); + break; + } + + return 0; +} + +static int audioreach_widget_load_mixer(struct snd_soc_component *component, + int index, struct snd_soc_dapm_widget *w, + struct snd_soc_tplg_dapm_widget *tplg_w) +{ + struct snd_soc_tplg_vendor_value_elem *w_elem; + struct snd_soc_tplg_vendor_array *w_array; + struct snd_ar_control *scontrol; + struct snd_soc_dobj *dobj; + int tkn_count = 0; + + w_array = &tplg_w->priv.array[0]; + + scontrol = kzalloc(sizeof(*scontrol), GFP_KERNEL); + if (!scontrol) + return -ENOMEM; + + scontrol->scomp = component; + dobj = &w->dobj; + dobj->private = scontrol; + + w_elem = w_array->value; + while (tkn_count <= (le32_to_cpu(w_array->num_elems) - 1)) { + switch (le32_to_cpu(w_elem->token)) { + case AR_TKN_U32_SUB_GRAPH_INSTANCE_ID: + scontrol->sgid = le32_to_cpu(w_elem->value); + break; + default: /* ignore other tokens */ + break; + } + tkn_count++; + w_elem++; + } + + return 0; +} + +static int audioreach_pga_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) + +{ + struct snd_soc_dapm_context *dapm = w->dapm; + struct snd_soc_component *c = snd_soc_dapm_to_component(dapm); + struct audioreach_module *mod = w->dobj.private; + struct q6apm *apm = dev_get_drvdata(c->dev); + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + /* apply gain after power up of widget */ + audioreach_gain_set_vol_ctrl(apm, mod, mod->gain); + break; + default: + break; + } + + return 0; +} + +static const struct snd_soc_tplg_widget_events audioreach_widget_ops[] = { + { AR_PGA_DAPM_EVENT, audioreach_pga_event }, +}; + +static int audioreach_widget_load_pga(struct snd_soc_component *component, + int index, struct snd_soc_dapm_widget *w, + struct snd_soc_tplg_dapm_widget *tplg_w) +{ + struct audioreach_module *mod; + struct snd_soc_dobj *dobj; + int ret; + + ret = audioreach_widget_load_module_common(component, index, w, tplg_w); + if (ret) + return ret; + + dobj = &w->dobj; + mod = dobj->private; + mod->gain = VOL_CTRL_DEFAULT_GAIN; + + ret = snd_soc_tplg_widget_bind_event(w, audioreach_widget_ops, + ARRAY_SIZE(audioreach_widget_ops), + le16_to_cpu(tplg_w->event_type)); + if (ret) { + dev_err(component->dev, "matching event handlers NOT found for %d\n", + le16_to_cpu(tplg_w->event_type)); + return -EINVAL; + } + + return 0; +} + +static int audioreach_widget_ready(struct snd_soc_component *component, + int index, struct snd_soc_dapm_widget *w, + struct snd_soc_tplg_dapm_widget *tplg_w) +{ + switch (w->id) { + case snd_soc_dapm_aif_in: + case snd_soc_dapm_aif_out: + audioreach_widget_load_buffer(component, index, w, tplg_w); + break; + case snd_soc_dapm_decoder: + case snd_soc_dapm_encoder: + case snd_soc_dapm_src: + audioreach_widget_load_enc_dec_cnv(component, index, w, tplg_w); + break; + case snd_soc_dapm_buffer: + audioreach_widget_load_buffer(component, index, w, tplg_w); + break; + case snd_soc_dapm_mixer: + return audioreach_widget_load_mixer(component, index, w, tplg_w); + case snd_soc_dapm_pga: + return audioreach_widget_load_pga(component, index, w, tplg_w); + case snd_soc_dapm_dai_link: + case snd_soc_dapm_scheduler: + case snd_soc_dapm_out_drv: + default: + dev_err(component->dev, "Widget type (0x%x) not yet supported\n", w->id); + break; + } + + return 0; +} + + +static int audioreach_widget_unload(struct snd_soc_component *scomp, + struct snd_soc_dobj *dobj) +{ + struct snd_soc_dapm_widget *w = container_of(dobj, struct snd_soc_dapm_widget, dobj); + struct q6apm *apm = dev_get_drvdata(scomp->dev); + struct audioreach_container *cont; + struct audioreach_module *mod; + + mod = dobj->private; + cont = mod->container; + + if (w->id == snd_soc_dapm_mixer) { + /* virtual widget */ + kfree(dobj->private); + return 0; + } + + mutex_lock(&apm->lock); + idr_remove(&apm->modules_idr, mod->instance_id); + cont->num_modules--; + + list_del(&mod->node); + kfree(mod); + + if (list_empty(&cont->modules_list)) { /* remove container */ + struct audioreach_sub_graph *sg = cont->sub_graph; + + idr_remove(&apm->containers_idr, cont->container_id); + list_del(&cont->node); + sg->num_containers--; + kfree(cont); + if (list_empty(&sg->container_list)) { /* remove sg */ + struct audioreach_graph_info *info = sg->info; + + idr_remove(&apm->sub_graphs_idr, sg->sub_graph_id); + list_del(&sg->node); + info->num_sub_graphs--; + kfree(sg); + if (list_empty(&info->sg_list)) { /* remove graph info */ + idr_remove(&apm->graph_info_idr, info->id); + kfree(info); + } + } + } + + mutex_unlock(&apm->lock); + + return 0; +} + +static struct audioreach_module *audioreach_find_widget(struct snd_soc_component *comp, + const char *name) +{ + struct q6apm *apm = dev_get_drvdata(comp->dev); + struct audioreach_module *module; + int id; + + idr_for_each_entry(&apm->modules_idr, module, id) { + if (!strcmp(name, module->widget->name)) + return module; + } + + return NULL; +} + +static int audioreach_route_load(struct snd_soc_component *scomp, int index, + struct snd_soc_dapm_route *route) +{ + struct audioreach_module *src, *sink; + + src = audioreach_find_widget(scomp, route->source); + sink = audioreach_find_widget(scomp, route->sink); + + if (src && sink) { + src->dst_mod_inst_id = sink->instance_id; + sink->src_mod_inst_id = src->instance_id; + } + + return 0; +} + +static int audioreach_route_unload(struct snd_soc_component *scomp, + struct snd_soc_dobj *dobj) +{ + return 0; +} + +static void audioreach_tplg_complete(struct snd_soc_component *component) +{ + /* TBD */ +} + +/* DAI link - used for any driver specific init */ +static int audioreach_link_load(struct snd_soc_component *component, int index, + struct snd_soc_dai_link *link, + struct snd_soc_tplg_link_config *cfg) +{ + link->nonatomic = true; + link->dynamic = true; + link->platforms->name = NULL; + link->platforms->of_node = of_get_compatible_child(component->dev->of_node, + "qcom,q6apm-dais"); + return 0; +} + +static int audioreach_get_audio_mixer(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct soc_mixer_control *mc = (struct soc_mixer_control *)kcontrol->private_value; + struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_dapm(kcontrol); + struct snd_soc_dapm_widget *dw = snd_soc_dapm_kcontrol_widget(kcontrol); + struct snd_soc_component *c = snd_soc_dapm_to_component(dapm); + struct snd_ar_control *dapm_scontrol = dw->dobj.private; + struct snd_ar_control *scontrol = mc->dobj.private; + struct q6apm *data = dev_get_drvdata(c->dev); + bool connected; + + connected = q6apm_is_sub_graphs_connected(data, scontrol->sgid, dapm_scontrol->sgid); + if (connected) + ucontrol->value.integer.value[0] = 1; + else + ucontrol->value.integer.value[0] = 0; + + return 0; +} + +static int audioreach_put_audio_mixer(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct soc_mixer_control *mc = (struct soc_mixer_control *)kcontrol->private_value; + struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_dapm(kcontrol); + struct snd_soc_dapm_widget *dw = snd_soc_dapm_kcontrol_widget(kcontrol); + struct snd_soc_component *c = snd_soc_dapm_to_component(dapm); + struct snd_ar_control *dapm_scontrol = dw->dobj.private; + struct snd_ar_control *scontrol = mc->dobj.private; + struct q6apm *data = dev_get_drvdata(c->dev); + + if (ucontrol->value.integer.value[0]) { + q6apm_connect_sub_graphs(data, scontrol->sgid, dapm_scontrol->sgid, true); + snd_soc_dapm_mixer_update_power(dapm, kcontrol, 1, NULL); + } else { + q6apm_connect_sub_graphs(data, scontrol->sgid, dapm_scontrol->sgid, false); + snd_soc_dapm_mixer_update_power(dapm, kcontrol, 0, NULL); + } + return 0; +} + +static int audioreach_get_vol_ctrl_audio_mixer(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_dapm_widget *dw = snd_soc_dapm_kcontrol_widget(kcontrol); + struct audioreach_module *mod = dw->dobj.private; + + ucontrol->value.integer.value[0] = mod->gain; + + return 0; +} + +static int audioreach_put_vol_ctrl_audio_mixer(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_dapm_widget *dw = snd_soc_dapm_kcontrol_widget(kcontrol); + struct audioreach_module *mod = dw->dobj.private; + + mod->gain = ucontrol->value.integer.value[0]; + + return 1; +} + +static int audioreach_control_load_mix(struct snd_soc_component *scomp, + struct snd_ar_control *scontrol, + struct snd_kcontrol_new *kc, + struct snd_soc_tplg_ctl_hdr *hdr) +{ + struct snd_soc_tplg_vendor_value_elem *c_elem; + struct snd_soc_tplg_vendor_array *c_array; + struct snd_soc_tplg_mixer_control *mc; + int tkn_count = 0; + + mc = container_of(hdr, struct snd_soc_tplg_mixer_control, hdr); + c_array = (struct snd_soc_tplg_vendor_array *)mc->priv.data; + + c_elem = c_array->value; + + while (tkn_count <= (le32_to_cpu(c_array->num_elems) - 1)) { + switch (le32_to_cpu(c_elem->token)) { + case AR_TKN_U32_SUB_GRAPH_INSTANCE_ID: + scontrol->sgid = le32_to_cpu(c_elem->value); + break; + default: + /* Ignore other tokens */ + break; + + } + c_elem++; + tkn_count++; + } + + return 0; +} + +static int audioreach_control_load(struct snd_soc_component *scomp, int index, + struct snd_kcontrol_new *kc, + struct snd_soc_tplg_ctl_hdr *hdr) +{ + struct snd_ar_control *scontrol; + struct soc_mixer_control *sm; + struct snd_soc_dobj *dobj; + int ret = 0; + + scontrol = kzalloc(sizeof(*scontrol), GFP_KERNEL); + if (!scontrol) + return -ENOMEM; + + scontrol->scomp = scomp; + + switch (le32_to_cpu(hdr->ops.get)) { + case SND_SOC_AR_TPLG_FE_BE_GRAPH_CTL_MIX: + sm = (struct soc_mixer_control *)kc->private_value; + dobj = &sm->dobj; + ret = audioreach_control_load_mix(scomp, scontrol, kc, hdr); + break; + case SND_SOC_AR_TPLG_VOL_CTL: + sm = (struct soc_mixer_control *)kc->private_value; + dobj = &sm->dobj; + break; + default: + dev_warn(scomp->dev, "control type not supported %d:%d:%d\n", + hdr->ops.get, hdr->ops.put, hdr->ops.info); + kfree(scontrol); + return -EINVAL; + } + + dobj->private = scontrol; + return ret; +} + +static int audioreach_control_unload(struct snd_soc_component *scomp, + struct snd_soc_dobj *dobj) +{ + struct snd_ar_control *scontrol = dobj->private; + + kfree(scontrol); + + return 0; +} + +static const struct snd_soc_tplg_kcontrol_ops audioreach_io_ops[] = { + {SND_SOC_AR_TPLG_FE_BE_GRAPH_CTL_MIX, audioreach_get_audio_mixer, + audioreach_put_audio_mixer, snd_soc_info_volsw}, + {SND_SOC_AR_TPLG_VOL_CTL, audioreach_get_vol_ctrl_audio_mixer, + audioreach_put_vol_ctrl_audio_mixer, snd_soc_info_volsw}, +}; + +static struct snd_soc_tplg_ops audioreach_tplg_ops = { + .io_ops = audioreach_io_ops, + .io_ops_count = ARRAY_SIZE(audioreach_io_ops), + + .control_load = audioreach_control_load, + .control_unload = audioreach_control_unload, + + .widget_ready = audioreach_widget_ready, + .widget_unload = audioreach_widget_unload, + + .complete = audioreach_tplg_complete, + .link_load = audioreach_link_load, + + .dapm_route_load = audioreach_route_load, + .dapm_route_unload = audioreach_route_unload, +}; + +int audioreach_tplg_init(struct snd_soc_component *component) +{ + struct device *dev = component->dev; + const struct firmware *fw; + int ret; + + ret = request_firmware(&fw, "audioreach.bin", dev); + if (ret < 0) { + dev_err(dev, "tplg fw audioreach.bin load failed with %d\n", ret); + return ret; + } + + ret = snd_soc_tplg_component_load(component, &audioreach_tplg_ops, fw); + if (ret < 0) { + dev_err(dev, "tplg component load failed%d\n", ret); + ret = -EINVAL; + } + + release_firmware(fw); + return ret; +} +EXPORT_SYMBOL_GPL(audioreach_tplg_init);

Add support to pcm dais in Audio Process Manager.

Signed-off-by: Srinivas Kandagatla srinivas.kandagatla@linaro.org --- sound/soc/qcom/Kconfig | 5 + sound/soc/qcom/qdsp6/Makefile | 1 + sound/soc/qcom/qdsp6/q6apm-dai.c | 415 +++++++++++++++++++++++++++++++ 3 files changed, 421 insertions(+) create mode 100644 sound/soc/qcom/qdsp6/q6apm-dai.c

diff --git a/sound/soc/qcom/Kconfig b/sound/soc/qcom/Kconfig index 66d8436ab0a8..2e5625b93b38 100644 --- a/sound/soc/qcom/Kconfig +++ b/sound/soc/qcom/Kconfig @@ -84,8 +84,13 @@ config SND_SOC_QDSP6_ASM_DAI select SND_SOC_COMPRESS tristate

+config SND_SOC_QDSP6_APM_DAI + tristate + select SND_SOC_COMPRESS + config SND_SOC_QDSP6_APM tristate + select SND_SOC_QDSP6_APM_DAI

config SND_SOC_QDSP6 tristate "SoC ALSA audio driver for QDSP6" diff --git a/sound/soc/qcom/qdsp6/Makefile b/sound/soc/qcom/qdsp6/Makefile index 766b824f6597..a4ec7c4d0e48 100644 --- a/sound/soc/qcom/qdsp6/Makefile +++ b/sound/soc/qcom/qdsp6/Makefile @@ -13,3 +13,4 @@ obj-$(CONFIG_SND_SOC_QDSP6_ASM) += q6asm.o obj-$(CONFIG_SND_SOC_QDSP6_ASM_DAI) += q6asm-dai.o

obj-$(CONFIG_SND_SOC_QDSP6_APM) += snd-q6apm.o +obj-$(CONFIG_SND_SOC_QDSP6_APM_DAI) += q6apm-dai.o diff --git a/sound/soc/qcom/qdsp6/q6apm-dai.c b/sound/soc/qcom/qdsp6/q6apm-dai.c new file mode 100644 index 000000000000..ae9b8ae571eb --- /dev/null +++ b/sound/soc/qcom/qdsp6/q6apm-dai.c @@ -0,0 +1,415 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2021, Linaro Limited + +#include <linux/init.h> +#include <linux/err.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/pcm.h> +#include <asm/dma.h> +#include <linux/dma-mapping.h> +#include <linux/of_device.h> +#include <sound/pcm_params.h> +#include "q6apm.h" + +#define DRV_NAME "q6apm-dai" + +#define PLAYBACK_MIN_NUM_PERIODS 2 +#define PLAYBACK_MAX_NUM_PERIODS 8 +#define PLAYBACK_MAX_PERIOD_SIZE 65536 +#define PLAYBACK_MIN_PERIOD_SIZE 128 +#define CAPTURE_MIN_NUM_PERIODS 2 +#define CAPTURE_MAX_NUM_PERIODS 8 +#define CAPTURE_MAX_PERIOD_SIZE 4096 +#define CAPTURE_MIN_PERIOD_SIZE 320 +#define BUFFER_BYTES_MAX (PLAYBACK_MAX_NUM_PERIODS * PLAYBACK_MAX_PERIOD_SIZE) +#define BUFFER_BYTES_MIN (PLAYBACK_MIN_NUM_PERIODS * PLAYBACK_MIN_PERIOD_SIZE) +#define SID_MASK_DEFAULT 0xF + +enum stream_state { + Q6APM_STREAM_IDLE = 0, + Q6APM_STREAM_STOPPED, + Q6APM_STREAM_RUNNING, +}; + +struct q6apm_dai_rtd { + struct snd_pcm_substream *substream; + struct snd_compr_stream *cstream; + struct snd_compr_params codec_param; + struct snd_dma_buffer dma_buffer; + phys_addr_t phys; + unsigned int pcm_size; + unsigned int pcm_count; + unsigned int pos; /* Buffer position */ + unsigned int periods; + unsigned int bytes_sent; + unsigned int bytes_received; + unsigned int copied_total; + uint16_t bits_per_sample; + uint16_t source; /* Encoding source bit mask */ + uint16_t session_id; + enum stream_state state; + struct q6apm_graph *graph; +}; + +struct q6apm_dai_data { + long long sid; +}; + +static struct snd_pcm_hardware q6apm_dai_hardware_capture = { + .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_BLOCK_TRANSFER | + SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME), + .formats = (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE), + .rates = SNDRV_PCM_RATE_8000_48000, + .rate_min = 8000, + .rate_max = 48000, + .channels_min = 2, + .channels_max = 4, + .buffer_bytes_max = CAPTURE_MAX_NUM_PERIODS * CAPTURE_MAX_PERIOD_SIZE, + .period_bytes_min = CAPTURE_MIN_PERIOD_SIZE, + .period_bytes_max = CAPTURE_MAX_PERIOD_SIZE, + .periods_min = CAPTURE_MIN_NUM_PERIODS, + .periods_max = CAPTURE_MAX_NUM_PERIODS, + .fifo_size = 0, +}; + +static struct snd_pcm_hardware q6apm_dai_hardware_playback = { + .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_BLOCK_TRANSFER | + SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME), + .formats = (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE), + .rates = SNDRV_PCM_RATE_8000_192000, + .rate_min = 8000, + .rate_max = 192000, + .channels_min = 2, + .channels_max = 8, + .buffer_bytes_max = (PLAYBACK_MAX_NUM_PERIODS * PLAYBACK_MAX_PERIOD_SIZE), + .period_bytes_min = PLAYBACK_MIN_PERIOD_SIZE, + .period_bytes_max = PLAYBACK_MAX_PERIOD_SIZE, + .periods_min = PLAYBACK_MIN_NUM_PERIODS, + .periods_max = PLAYBACK_MAX_NUM_PERIODS, + .fifo_size = 0, +}; + +static void event_handler(uint32_t opcode, uint32_t token, uint32_t *payload, void *priv) +{ + struct q6apm_dai_rtd *prtd = priv; + struct snd_pcm_substream *substream = prtd->substream; + + switch (opcode) { + case APM_CLIENT_EVENT_CMD_EOS_DONE: + prtd->state = Q6APM_STREAM_STOPPED; + break; + case APM_CLIENT_EVENT_DATA_WRITE_DONE: + prtd->pos += prtd->pcm_count; + snd_pcm_period_elapsed(substream); + if (prtd->state == Q6APM_STREAM_RUNNING) + q6apm_write_async(prtd->graph, prtd->pcm_count, 0, 0, 0); + + break; + case APM_CLIENT_EVENT_DATA_READ_DONE: + prtd->pos += prtd->pcm_count; + snd_pcm_period_elapsed(substream); + if (prtd->state == Q6APM_STREAM_RUNNING) + q6apm_read(prtd->graph); + + break; + default: + break; + } +} + +static int q6apm_dai_prepare(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct q6apm_dai_rtd *prtd = runtime->private_data; + struct audioreach_module_config cfg; + struct device *dev = component->dev; + struct q6apm_dai_data *pdata; + int ret; + + pdata = snd_soc_component_get_drvdata(component); + if (!pdata) + return -EINVAL; + + if (!prtd || !prtd->graph) { + dev_err(dev, "%s: private data null or audio client freed\n", __func__); + return -EINVAL; + } + + cfg.direction = substream->stream; + cfg.sample_rate = runtime->rate; + cfg.num_channels = runtime->channels; + cfg.bit_width = prtd->bits_per_sample; + + prtd->pcm_count = snd_pcm_lib_period_bytes(substream); + prtd->pos = 0; + /* rate and channels are sent to audio driver */ + ret = q6apm_graph_media_format_shmem(prtd->graph, &cfg); + if (ret < 0) { + dev_err(dev, "%s: q6apm_open_write failed\n", __func__); + return ret; + } + + ret = q6apm_graph_media_format_pcm(prtd->graph, &cfg); + if (ret < 0) + dev_err(dev, "%s: CMD Format block failed\n", __func__); + + ret = q6apm_map_memory_regions(prtd->graph, substream->stream, prtd->phys, + (prtd->pcm_size / prtd->periods), prtd->periods); + + if (ret < 0) { + dev_err(dev, "Audio Start: Buffer Allocation failed rc = %d\n", ret); + return -ENOMEM; + } + + ret = q6apm_graph_prepare(prtd->graph); + if (ret) { + dev_err(dev, "Failed to prepare Graph %d\n", ret); + return ret; + } + + ret = q6apm_graph_start(prtd->graph); + if (ret) { + dev_err(dev, "Failed to Start Graph %d\n", ret); + return ret; + } + + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { + int i; + /* Queue the buffers for Capture ONLY after graph is started */ + for (i = 0; i < runtime->periods; i++) + q6apm_read(prtd->graph); + + } + + prtd->state = Q6APM_STREAM_RUNNING; + + return 0; +} + +static int q6apm_dai_trigger(struct snd_soc_component *component, + struct snd_pcm_substream *substream, int cmd) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct q6apm_dai_rtd *prtd = runtime->private_data; + int ret = 0; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + /* start writing buffers for playback only as we already queued capture buffers */ + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + ret = q6apm_write_async(prtd->graph, prtd->pcm_count, 0, 0, 0); + break; + case SNDRV_PCM_TRIGGER_STOP: + /* TODO support be handled via SoftPause Module */ + prtd->state = Q6APM_STREAM_STOPPED; + break; + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + break; + default: + ret = -EINVAL; + break; + } + + return ret; +} + +static int q6apm_dai_open(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct snd_soc_pcm_runtime *soc_prtd = substream->private_data; + struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(soc_prtd, 0); + struct device *dev = component->dev; + struct q6apm_dai_data *pdata; + struct q6apm_dai_rtd *prtd; + int graph_id, ret; + + graph_id = cpu_dai->driver->id; + + pdata = snd_soc_component_get_drvdata(component); + if (!pdata) { + dev_err(dev, "Drv data not found ..\n"); + return -EINVAL; + } + + prtd = kzalloc(sizeof(*prtd), GFP_KERNEL); + if (prtd == NULL) + return -ENOMEM; + + prtd->substream = substream; + prtd->graph = q6apm_graph_open(dev, (q6apm_cb)event_handler, prtd, graph_id); + if (IS_ERR(prtd->graph)) { + dev_err(dev, "%s: Could not allocate memory\n", __func__); + ret = PTR_ERR(prtd->graph); + goto err; + } + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + runtime->hw = q6apm_dai_hardware_playback; + else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) + runtime->hw = q6apm_dai_hardware_capture; + + /* Ensure that buffer size is a multiple of period size */ + ret = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); + if (ret < 0) { + dev_err(dev, "snd_pcm_hw_constraint_integer failed\n"); + goto err; + } + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + ret = snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, + BUFFER_BYTES_MIN, BUFFER_BYTES_MAX); + if (ret < 0) { + dev_err(dev, "constraint for buffer bytes min max ret = %d\n", ret); + goto err; + } + } + + ret = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 32); + if (ret < 0) { + dev_err(dev, "constraint for period bytes step ret = %d\n", ret); + goto err; + } + + ret = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 32); + if (ret < 0) { + dev_err(dev, "constraint for buffer bytes step ret = %d\n", ret); + goto err; + } + + runtime->private_data = prtd; + runtime->dma_bytes = BUFFER_BYTES_MAX; + if (pdata->sid < 0) + prtd->phys = substream->dma_buffer.addr; + else + prtd->phys = substream->dma_buffer.addr | (pdata->sid << 32); + + return 0; +err: + kfree(prtd); + + return ret; +} + +static int q6apm_dai_close(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct q6apm_dai_rtd *prtd = runtime->private_data; + + q6apm_graph_stop(prtd->graph); + q6apm_unmap_memory_regions(prtd->graph, substream->stream); + q6apm_graph_close(prtd->graph); + prtd->graph = NULL; + kfree(prtd); + runtime->private_data = NULL; + + return 0; +} + +static snd_pcm_uframes_t q6apm_dai_pointer(struct snd_soc_component *component, + struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct q6apm_dai_rtd *prtd = runtime->private_data; + + if (prtd->pos == prtd->pcm_size) + prtd->pos = 0; + + return bytes_to_frames(runtime, prtd->pos); +} + +static int q6apm_dai_hw_params(struct snd_soc_component *component, + struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct q6apm_dai_rtd *prtd = runtime->private_data; + + prtd->pcm_size = params_buffer_bytes(params); + prtd->periods = params_periods(params); + + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + prtd->bits_per_sample = 16; + break; + case SNDRV_PCM_FORMAT_S24_LE: + prtd->bits_per_sample = 24; + break; + default: + return -EINVAL; + } + + return 0; +} + +static int q6apm_dai_pcm_new(struct snd_soc_component *component, struct snd_soc_pcm_runtime *rtd) +{ + int size = BUFFER_BYTES_MAX; + + return snd_pcm_set_fixed_buffer_all(rtd->pcm, SNDRV_DMA_TYPE_DEV, component->dev, size); +} + +static const struct snd_soc_component_driver q6apm_fe_dai_component = { + .name = DRV_NAME, + .open = q6apm_dai_open, + .close = q6apm_dai_close, + .prepare = q6apm_dai_prepare, + .pcm_construct = q6apm_dai_pcm_new, + .hw_params = q6apm_dai_hw_params, + .pointer = q6apm_dai_pointer, + .trigger = q6apm_dai_trigger, +}; + +static int q6apm_dai_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct device_node *node = dev->of_node; + struct q6apm_dai_data *pdata; + struct of_phandle_args args; + int rc; + + pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return -ENOMEM; + + rc = of_parse_phandle_with_fixed_args(node, "iommus", 1, 0, &args); + if (rc < 0) + pdata->sid = -1; + else + pdata->sid = args.args[0] & SID_MASK_DEFAULT; + + dev_set_drvdata(dev, pdata); + + return devm_snd_soc_register_component(dev, &q6apm_fe_dai_component, NULL, 0); +} + +#ifdef CONFIG_OF +static const struct of_device_id q6apm_dai_device_id[] = { + { .compatible = "qcom,q6apm-dais" }, + {}, +}; +MODULE_DEVICE_TABLE(of, q6apm_dai_device_id); +#endif + +static struct platform_driver q6apm_dai_platform_driver = { + .driver = { + .name = "q6apm-dai", + .of_match_table = of_match_ptr(q6apm_dai_device_id), + }, + .probe = q6apm_dai_probe, +}; +module_platform_driver(q6apm_dai_platform_driver); + +MODULE_DESCRIPTION("Q6APM dai driver"); +MODULE_LICENSE("GPL");

Add support to q6prm (Proxy Resource Manager) module used for clock resources

Signed-off-by: Srinivas Kandagatla srinivas.kandagatla@linaro.org --- sound/soc/qcom/Kconfig | 4 + sound/soc/qcom/qdsp6/Makefile | 1 + sound/soc/qcom/qdsp6/q6prm.c | 202 ++++++++++++++++++++++++++++++++++ sound/soc/qcom/qdsp6/q6prm.h | 78 +++++++++++++ 4 files changed, 285 insertions(+) create mode 100644 sound/soc/qcom/qdsp6/q6prm.c create mode 100644 sound/soc/qcom/qdsp6/q6prm.h

diff --git a/sound/soc/qcom/Kconfig b/sound/soc/qcom/Kconfig index d1132c4174db..465a2a603401 100644 --- a/sound/soc/qcom/Kconfig +++ b/sound/soc/qcom/Kconfig @@ -96,6 +96,9 @@ config SND_SOC_QDSP6_APM select SND_SOC_QDSP6_APM_DAI select SND_SOC_QDSP6_APM_LPASS_DAI

+config SND_SOC_QDSP6_PRM + tristate + config SND_SOC_QDSP6 tristate "SoC ALSA audio driver for QDSP6" depends on QCOM_APR @@ -111,6 +114,7 @@ config SND_SOC_QDSP6 select SND_SOC_QDSP6_ASM_DAI select SND_SOC_TOPOLOGY select SND_SOC_QDSP6_APM + select SND_SOC_QDSP6_PRM help To add support for MSM QDSP6 Soc Audio. This will enable sound soc platform specific diff --git a/sound/soc/qcom/qdsp6/Makefile b/sound/soc/qcom/qdsp6/Makefile index bdcbfdfa9bd0..c932f8e24b32 100644 --- a/sound/soc/qcom/qdsp6/Makefile +++ b/sound/soc/qcom/qdsp6/Makefile @@ -15,3 +15,4 @@ obj-$(CONFIG_SND_SOC_QDSP6_ASM_DAI) += q6asm-dai.o obj-$(CONFIG_SND_SOC_QDSP6_APM) += snd-q6apm.o obj-$(CONFIG_SND_SOC_QDSP6_APM_DAI) += q6apm-dai.o obj-$(CONFIG_SND_SOC_QDSP6_APM_LPASS_DAI) += q6apm-lpass-dais.o +obj-$(CONFIG_SND_SOC_QDSP6_PRM) += q6prm.o diff --git a/sound/soc/qcom/qdsp6/q6prm.c b/sound/soc/qcom/qdsp6/q6prm.c new file mode 100644 index 000000000000..746324cf5fad --- /dev/null +++ b/sound/soc/qcom/qdsp6/q6prm.c @@ -0,0 +1,202 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2021, Linaro Limited + +#include <linux/slab.h> +#include <linux/wait.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/delay.h> +#include <linux/of_platform.h> +#include <linux/jiffies.h> +#include <linux/soc/qcom/apr.h> +#include <dt-bindings/soc/qcom,gpr.h> +#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h> +#include "q6prm.h" +#include "audioreach.h" + +struct q6prm { + struct device *dev; + gpr_device_t *gdev; + wait_queue_head_t wait; + struct gpr_ibasic_rsp_result_t result; + struct mutex lock; +}; + +#define PRM_CMD_REQUEST_HW_RSC 0x0100100F +#define PRM_CMD_RSP_REQUEST_HW_RSC 0x02001002 +#define PRM_CMD_RELEASE_HW_RSC 0x01001010 +#define PRM_CMD_RSP_RELEASE_HW_RSC 0x02001003 +#define PARAM_ID_RSC_HW_CORE 0x08001032 +#define PARAM_ID_RSC_LPASS_CORE 0x0800102B +#define PARAM_ID_RSC_AUDIO_HW_CLK 0x0800102C + +struct prm_cmd_request_hw_core { + struct apm_module_param_data param_data; + uint32_t hw_clk_id; +} __packed; + +struct prm_cmd_request_rsc { + struct apm_module_param_data param_data; + uint32_t num_clk_id; + struct audio_hw_clk_cfg clock_id; +} __packed; + +static int q6prm_send_cmd_sync(struct q6prm *prm, struct gpr_pkt *pkt, uint32_t rsp_opcode) +{ + return audioreach_send_cmd_sync(prm->dev, prm->gdev, &prm->result, &prm->lock, + NULL, &prm->wait, pkt, rsp_opcode); +} + +static int q6prm_set_hw_core_req(struct device *dev, uint32_t hw_block_id, bool enable) +{ + struct q6prm *prm = dev_get_drvdata(dev->parent); + struct apm_module_param_data *param_data; + struct prm_cmd_request_hw_core *req; + gpr_device_t *gdev = prm->gdev; + uint32_t opcode, rsp_opcode; + struct gpr_pkt *pkt; + int rc; + + if (enable) { + opcode = PRM_CMD_REQUEST_HW_RSC; + rsp_opcode = PRM_CMD_RSP_REQUEST_HW_RSC; + } else { + opcode = PRM_CMD_RELEASE_HW_RSC; + rsp_opcode = PRM_CMD_RSP_RELEASE_HW_RSC; + } + + pkt = audioreach_alloc_cmd_pkt(sizeof(*req), opcode, 0, gdev->svc.id, GPR_PRM_MODULE_IID); + if (IS_ERR(pkt)) + return -ENOMEM; + + req = (void *)pkt + GPR_HDR_SIZE + APM_CMD_HDR_SIZE; + + param_data = &req->param_data; + + param_data->module_instance_id = GPR_PRM_MODULE_IID; + param_data->error_code = 0; + param_data->param_id = PARAM_ID_RSC_HW_CORE; + param_data->param_size = sizeof(*req) - APM_MODULE_PARAM_DATA_SIZE; + + req->hw_clk_id = hw_block_id; + + rc = q6prm_send_cmd_sync(prm, pkt, rsp_opcode); + + kfree(pkt); + + return rc; +} + +int q6prm_vote_lpass_core_hw(struct device *dev, uint32_t hw_block_id, + const char *client_name, uint32_t *client_handle) +{ + return q6prm_set_hw_core_req(dev, hw_block_id, true); + +} +EXPORT_SYMBOL_GPL(q6prm_vote_lpass_core_hw); + +int q6prm_unvote_lpass_core_hw(struct device *dev, uint32_t hw_block_id, uint32_t client_handle) +{ + return q6prm_set_hw_core_req(dev, hw_block_id, false); +} +EXPORT_SYMBOL_GPL(q6prm_unvote_lpass_core_hw); + +int q6prm_set_lpass_clock(struct device *dev, int clk_id, int clk_attr, int clk_root, + unsigned int freq) +{ + struct q6prm *prm = dev_get_drvdata(dev->parent); + struct apm_module_param_data *param_data; + struct prm_cmd_request_rsc *req; + gpr_device_t *gdev = prm->gdev; + struct gpr_pkt *pkt; + int rc; + + pkt = audioreach_alloc_cmd_pkt(sizeof(*req), PRM_CMD_REQUEST_HW_RSC, 0, gdev->svc.id, + GPR_PRM_MODULE_IID); + if (IS_ERR(pkt)) + return -ENOMEM; + + req = (void *)pkt + GPR_HDR_SIZE + APM_CMD_HDR_SIZE; + + param_data = &req->param_data; + + param_data->module_instance_id = GPR_PRM_MODULE_IID; + param_data->error_code = 0; + param_data->param_id = PARAM_ID_RSC_AUDIO_HW_CLK; + param_data->param_size = sizeof(*req) - APM_MODULE_PARAM_DATA_SIZE; + + req->num_clk_id = 1; + req->clock_id.clock_id = clk_id; + req->clock_id.clock_freq = freq; + req->clock_id.clock_attri = clk_attr; + req->clock_id.clock_root = clk_root; + + rc = q6prm_send_cmd_sync(prm, pkt, PRM_CMD_RSP_REQUEST_HW_RSC); + + kfree(pkt); + + return rc; +} +EXPORT_SYMBOL_GPL(q6prm_set_lpass_clock); + +static int prm_callback(struct gpr_resp_pkt *data, void *priv, int op) +{ + gpr_device_t *gdev = priv; + struct q6prm *prm = dev_get_drvdata(&gdev->dev); + struct gpr_ibasic_rsp_result_t *result; + struct gpr_hdr *hdr = &data->hdr; + + switch (hdr->opcode) { + case PRM_CMD_RSP_REQUEST_HW_RSC: + case PRM_CMD_RSP_RELEASE_HW_RSC: + result = data->payload; + prm->result.opcode = hdr->opcode; + prm->result.status = result->status; + wake_up(&prm->wait); + break; + default: + break; + } + + return 0; +} + +static int prm_probe(gpr_device_t *gdev) +{ + struct device *dev = &gdev->dev; + struct q6prm *cc; + + cc = devm_kzalloc(dev, sizeof(*cc), GFP_KERNEL); + if (!cc) + return -ENOMEM; + + cc->dev = dev; + cc->gdev = gdev; + mutex_init(&cc->lock); + init_waitqueue_head(&cc->wait); + dev_set_drvdata(dev, cc); + + return devm_of_platform_populate(dev); +} + +#ifdef CONFIG_OF +static const struct of_device_id prm_device_id[] = { + { .compatible = "qcom,q6prm" }, + {}, +}; +MODULE_DEVICE_TABLE(of, prm_device_id); +#endif + +static gpr_driver_t prm_driver = { + .probe = prm_probe, + .gpr_callback = prm_callback, + .driver = { + .name = "qcom-prm", + .of_match_table = of_match_ptr(prm_device_id), + }, +}; + +module_gpr_driver(prm_driver); +MODULE_DESCRIPTION("Audio Process Manager"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/qcom/qdsp6/q6prm.h b/sound/soc/qcom/qdsp6/q6prm.h new file mode 100644 index 000000000000..fea4d1954bc1 --- /dev/null +++ b/sound/soc/qcom/qdsp6/q6prm.h @@ -0,0 +1,78 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef __Q6PRM_H__ +#define __Q6PRM_H__ + +/* Clock ID for Primary I2S IBIT */ +#define Q6PRM_LPASS_CLK_ID_PRI_MI2S_IBIT 0x100 +/* Clock ID for Primary I2S EBIT */ +#define Q6PRM_LPASS_CLK_ID_PRI_MI2S_EBIT 0x101 +/* Clock ID for Secondary I2S IBIT */ +#define Q6PRM_LPASS_CLK_ID_SEC_MI2S_IBIT 0x102 +/* Clock ID for Secondary I2S EBIT */ +#define Q6PRM_LPASS_CLK_ID_SEC_MI2S_EBIT 0x103 +/* Clock ID for Tertiary I2S IBIT */ +#define Q6PRM_LPASS_CLK_ID_TER_MI2S_IBIT 0x104 +/* Clock ID for Tertiary I2S EBIT */ +#define Q6PRM_LPASS_CLK_ID_TER_MI2S_EBIT 0x105 +/* Clock ID for Quartnery I2S IBIT */ +#define Q6PRM_LPASS_CLK_ID_QUAD_MI2S_IBIT 0x106 +/* Clock ID for Quartnery I2S EBIT */ +#define Q6PRM_LPASS_CLK_ID_QUAD_MI2S_EBIT 0x107 +/* Clock ID for Speaker I2S IBIT */ +#define Q6PRM_LPASS_CLK_ID_SPEAKER_I2S_IBIT 0x108 +/* Clock ID for Speaker I2S EBIT */ +#define Q6PRM_LPASS_CLK_ID_SPEAKER_I2S_EBIT 0x109 +/* Clock ID for Speaker I2S OSR */ +#define Q6PRM_LPASS_CLK_ID_SPEAKER_I2S_OSR 0x10A + +/* Clock ID for QUINARY I2S IBIT */ +#define Q6PRM_LPASS_CLK_ID_QUI_MI2S_IBIT 0x10B +/* Clock ID for QUINARY I2S EBIT */ +#define Q6PRM_LPASS_CLK_ID_QUI_MI2S_EBIT 0x10C +/* Clock ID for SENARY I2S IBIT */ +#define Q6PRM_LPASS_CLK_ID_SEN_MI2S_IBIT 0x10D +/* Clock ID for SENARY I2S EBIT */ +#define Q6PRM_LPASS_CLK_ID_SEN_MI2S_EBIT 0x10E +/* Clock ID for INT0 I2S IBIT */ +#define Q6PRM_LPASS_CLK_ID_INT0_MI2S_IBIT 0x10F +/* Clock ID for INT1 I2S IBIT */ +#define Q6PRM_LPASS_CLK_ID_INT1_MI2S_IBIT 0x110 +/* Clock ID for INT2 I2S IBIT */ +#define Q6PRM_LPASS_CLK_ID_INT2_MI2S_IBIT 0x111 +/* Clock ID for INT3 I2S IBIT */ +#define Q6PRM_LPASS_CLK_ID_INT3_MI2S_IBIT 0x112 +/* Clock ID for INT4 I2S IBIT */ +#define Q6PRM_LPASS_CLK_ID_INT4_MI2S_IBIT 0x113 +/* Clock ID for INT5 I2S IBIT */ +#define Q6PRM_LPASS_CLK_ID_INT5_MI2S_IBIT 0x114 +/* Clock ID for INT6 I2S IBIT */ +#define Q6PRM_LPASS_CLK_ID_INT6_MI2S_IBIT 0x115 + +/* Clock ID for QUINARY MI2S OSR CLK */ +#define Q6PRM_LPASS_CLK_ID_QUI_MI2S_OSR 0x116 + +#define Q6PRM_LPASS_CLK_ID_WSA_CORE_MCLK 0x305 +#define Q6PRM_LPASS_CLK_ID_WSA_CORE_NPL_MCLK 0x306 + +#define Q6PRM_LPASS_CLK_ID_VA_CORE_MCLK 0x307 +#define Q6PRM_LPASS_CLK_ID_VA_CORE_2X_MCLK 0x308 + +#define Q6PRM_LPASS_CLK_ID_TX_CORE_MCLK 0x30c +#define Q6PRM_LPASS_CLK_ID_TX_CORE_NPL_MCLK 0x30d + +#define Q6PRM_LPASS_CLK_ID_RX_CORE_MCLK 0x30e +#define Q6PRM_LPASS_CLK_ID_RX_CORE_NPL_MCLK 0x30f + +#define Q6PRM_LPASS_CLK_SRC_INTERNAL 1 +#define Q6PRM_LPASS_CLK_ROOT_DEFAULT 0 +#define Q6PRM_HW_CORE_ID_LPASS 1 +#define Q6PRM_HW_CORE_ID_DCODEC 2 + +int q6prm_set_lpass_clock(struct device *dev, int clk_id, int clk_attr, + int clk_root, unsigned int freq); +int q6prm_vote_lpass_core_hw(struct device *dev, uint32_t hw_block_id, + const char *client_name, uint32_t *client_handle); +int q6prm_unvote_lpass_core_hw(struct device *dev, uint32_t hw_block_id, + uint32_t client_handle); +#endif /* __Q6PRM_H__ */