Hi Doug,

On Tue, Jun 4, 2013 at 1:43 AM, Doug Anderson dianders@chromium.org wrote:

Padmavathi,

On Sun, Jun 2, 2013 at 10:19 PM, Padmavathi Venna padma.v@samsung.com wrote:

...

Audio subsystem introduced in s5pv210 and exynos platforms which has a internal clock controller. This patch adds a node for the same on exynos5250.

Signed-off-by: Padmavathi Venna padma.v@samsung.com Reviewed-by: Sylwester Nawrocki s.nawrocki@samsung.com

---

arch/arm/boot/dts/exynos5250.dtsi | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index bccda67..388983e 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -72,6 +72,12 @@ #clock-cells = <1>; };

•   clock_audss: audss-clock-controller@3810000 {
  

I removed this leading 0 as Tomasz Figa suggested.

Nit: other places in the same file have the leading 0, like i2s0: i2s@03830000 {

This was the patch which got merged earlier. So I didn't modify this. Is it okey if I remove leading 0 for both of the nodes now?

So you could follow suit and do:

clock_audss: audss-clock-controller@03810000 {

-Doug

Thanks Padma