Since not all registers need to be cached and the cache is entirely optional anyway we shouldn't be checking that a register is in the cached range. If the register is invalid then the actual I/O code can determine that and report an error.

Similarly, the step size can and should be enforced by the lower level code if it's important.

Signed-off-by: Mark Brown broonie@opensource.wolfsonmicro.com --- sound/soc/soc-core.c | 2 -- 1 files changed, 0 insertions(+), 2 deletions(-)

diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index 17efacd..4dda589 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c @@ -259,8 +259,6 @@ static ssize_t codec_reg_write_file(struct file *file, while (*start == ' ') start++; reg = simple_strtoul(start, &start, 16); - if ((reg >= codec->driver->reg_cache_size) || (reg % step)) - return -EINVAL; while (*start == ' ') start++; if (strict_strtoul(start, 16, &value))