[alsa-devel] [PATCH v5 0/5] ASoC: add driver for Atmel I2S controller
This is a rework of Cyrille's patches named: [PATCH v3 0/2] ASoC: add driver for Atmel I2S controller https://lkml.org/lkml/2015/9/29/454
This is the version 5 of the series, and addresses the received feedback on the mailing lists.
This series applies on top of clk-next branch of clk/linux.git.
Based on received feedback, I created a mux clock driver to select the I2S clock source, that also includes proper devicetree bindings and nodes. Also, I added the I2S nodes in sama5d2's devicetree, with the missing pin muxing for the second I2S controller.
Alexandre Belloni plans to change the at91 fine grained clock nodes and he recommended to leave the bindings for this clock driver in the same (wrong) manner, so he could fix them all at once.
This series of patches adds support to the new Atmel I2S controller embedded on sama5d2 SoCs.
ChangeLog
v4 -> v5 - removed patches: [PATCH v4 4/7] ASoC: atmel-i2s: dt-bindings: add DT bindings for I2S controller [PATCH v4 5/7] ASoC: atmel-i2s: add driver for the new Atmel I2S controller from this series since they were applied to the asoc tree at: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git - addressed comments received on the mux clock;
v3 -> v4 - as suggested by Rob Herring: - added a clock mux driver for I2S's clock control bit; - more precise description of I2S's devicetree bindings; - removed SoC and internal detalls from bindings; - addressed comments from Mark Brown; - added devicetree nodes and pin muxing for I2S;
v2 -> v3 - fix the coding style, add some more comments and add a section dedicated to sama5d2 SoCs in the DT binding documentation as suggested by Mark Brown.
v1 -> v2 - initialize dev->dev before calling dev->caps->mck_init()
Codrin Ciubotariu (3): dt-bindings: clk: at91: add an I2S mux clock clk: at91: add I2S clock mux driver ARM: dts: at91: sama5d2: add I2S clock muxing nodes
Cyrille Pitchen (2): ARM: dts: at91: sama5d2: add nodes for I2S controllers ARM: dts: at91: sama5d2 Xplained: add pin muxing for I2S
.../devicetree/bindings/clock/at91-clock.txt | 35 ++++++ arch/arm/boot/dts/at91-sama5d2_xplained.dts | 28 +++++ arch/arm/boot/dts/sama5d2.dtsi | 52 ++++++++ arch/arm/mach-at91/Kconfig | 4 + drivers/clk/at91/Makefile | 1 + drivers/clk/at91/clk-i2s-mux.c | 116 ++++++++++++++++++ 6 files changed, 236 insertions(+) create mode 100644 drivers/clk/at91/clk-i2s-mux.c
The I2S mux clock can be used to select the I2S input clock. The available parents are the peripheral and the generated clocks.
Signed-off-by: Codrin Ciubotariu codrin.ciubotariu@microchip.com ---
Changes in v5: - specified clock's parent; - added a newline before adding the clock's compatible string;
.../devicetree/bindings/clock/at91-clock.txt | 35 +++++++++++++++++++ 1 file changed, 35 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/at91-clock.txt b/Documentation/devicetree/bindings/clock/at91-clock.txt index 51c259a92d02..d0adbf5ae144 100644 --- a/Documentation/devicetree/bindings/clock/at91-clock.txt +++ b/Documentation/devicetree/bindings/clock/at91-clock.txt @@ -91,6 +91,9 @@ Required properties: at91 audio pll output on AUDIOPLLCLK that feeds the PMC and can be used by peripheral clock or generic clock
+ "atmel,sama5d2-clk-i2s-mux" (under pmc node): + at91 I2S clock source selection + Required properties for SCKC node: - reg : defines the IO memory reserved for the SCKC. - #size-cells : shall be 0 (reg is used to encode clk id). @@ -507,3 +510,35 @@ For example: atmel,clk-output-range = <0 83000000>; }; }; + +Required properties for I2S mux clocks: +- #size-cells : shall be 0 (reg is used to encode I2S bus id). +- #address-cells : shall be 1 (reg is used to encode I2S bus id). +- name: device tree node describing a specific mux clock. + * #clock-cells : from common clock binding; shall be set to 0. + * clocks : shall be the mux clock parent phandles; shall be 2 phandles: + peripheral and generated clock; the first phandle shall belong to the + peripheral clock and the second one shall belong to the generated + clock; "clock-indices" property can be user to specify + the correct order. + * reg: I2S bus id of the corresponding mux clock. + e.g. reg = <0>; for i2s0, reg = <1>; for i2s1 + +For example: + i2s_clkmux { + compatible = "atmel,sama5d2-clk-i2s-mux"; + #address-cells = <1>; + #size-cells = <0>; + + i2s0muxck: i2s0_muxclk { + clocks = <&i2s0_clk>, <&i2s0_gclk>; + #clock-cells = <0>; + reg = <0>; + }; + + i2s1muxck: i2s1_muxclk { + clocks = <&i2s1_clk>, <&i2s1_gclk>; + #clock-cells = <0>; + reg = <1>; + }; + };
On Mon, Jun 18, 2018 at 05:12:35PM +0300, Codrin Ciubotariu wrote:
The I2S mux clock can be used to select the I2S input clock. The available parents are the peripheral and the generated clocks.
Signed-off-by: Codrin Ciubotariu codrin.ciubotariu@microchip.com
Changes in v5:
- specified clock's parent;
- added a newline before adding the clock's compatible string;
.../devicetree/bindings/clock/at91-clock.txt | 35 +++++++++++++++++++ 1 file changed, 35 insertions(+)
Well, since Alexandre promises all this is going to get re-worked soon:
Acked-by: Rob Herring robh@kernel.org
On 20/06/2018 09:47:59-0600, Rob Herring wrote:
On Mon, Jun 18, 2018 at 05:12:35PM +0300, Codrin Ciubotariu wrote:
The I2S mux clock can be used to select the I2S input clock. The available parents are the peripheral and the generated clocks.
Signed-off-by: Codrin Ciubotariu codrin.ciubotariu@microchip.com
Changes in v5:
- specified clock's parent;
- added a newline before adding the clock's compatible string;
.../devicetree/bindings/clock/at91-clock.txt | 35 +++++++++++++++++++ 1 file changed, 35 insertions(+)
Well, since Alexandre promises all this is going to get re-worked soon:
Acked-by: Rob Herring robh@kernel.org
Thanks, I'm planning to send a first version next week, it will be based on top of that series.
Quoting Codrin Ciubotariu (2018-06-18 07:12:35)
The I2S mux clock can be used to select the I2S input clock. The available parents are the peripheral and the generated clocks.
Signed-off-by: Codrin Ciubotariu codrin.ciubotariu@microchip.com
Applied to clk-next
This driver is a simple muxing driver that controls the I2S's clock input by using syscon/regmap to change the parent. The available inputs can be peripheral clock and generated clock.
Signed-off-by: Codrin Ciubotariu codrin.ciubotariu@microchip.com ---
Changes in v5: - removed CLK_IGNORE_UNUSED flag; - fixed typo in patch description; - fixed letter case in patch description; - reduced size of 'bus_id' member of struct clk_i2s_mux from 32b to 8b, and all the other changes that come with it; - made 'clk_i2s_mux_ops' static;
arch/arm/mach-at91/Kconfig | 4 ++ drivers/clk/at91/Makefile | 1 + drivers/clk/at91/clk-i2s-mux.c | 116 +++++++++++++++++++++++++++++++++ 3 files changed, 121 insertions(+) create mode 100644 drivers/clk/at91/clk-i2s-mux.c
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 1254bf9d91b4..903f23c309df 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -27,6 +27,7 @@ config SOC_SAMA5D2 select HAVE_AT91_H32MX select HAVE_AT91_GENERATED_CLK select HAVE_AT91_AUDIO_PLL + select HAVE_AT91_I2S_MUX_CLK select PINCTRL_AT91PIO4 help Select this if ou are using one of Microchip's SAMA5D2 family SoC. @@ -129,6 +130,9 @@ config HAVE_AT91_GENERATED_CLK config HAVE_AT91_AUDIO_PLL bool
+config HAVE_AT91_I2S_MUX_CLK + bool + config SOC_SAM_V4_V5 bool
diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile index 082596f37c1d..facc169ebb68 100644 --- a/drivers/clk/at91/Makefile +++ b/drivers/clk/at91/Makefile @@ -13,3 +13,4 @@ obj-$(CONFIG_HAVE_AT91_USB_CLK) += clk-usb.o obj-$(CONFIG_HAVE_AT91_SMD) += clk-smd.o obj-$(CONFIG_HAVE_AT91_H32MX) += clk-h32mx.o obj-$(CONFIG_HAVE_AT91_GENERATED_CLK) += clk-generated.o +obj-$(CONFIG_HAVE_AT91_I2S_MUX_CLK) += clk-i2s-mux.o diff --git a/drivers/clk/at91/clk-i2s-mux.c b/drivers/clk/at91/clk-i2s-mux.c new file mode 100644 index 000000000000..ab834c4a605b --- /dev/null +++ b/drivers/clk/at91/clk-i2s-mux.c @@ -0,0 +1,116 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018 Microchip Technology Inc, + * Codrin Ciubotariu codrin.ciubotariu@microchip.com + * + * + */ + +#include <linux/clk-provider.h> +#include <linux/of.h> +#include <linux/mfd/syscon.h> +#include <linux/regmap.h> +#include <linux/slab.h> + +#include <soc/at91/atmel-sfr.h> + +#define I2S_BUS_NR 2 + +struct clk_i2s_mux { + struct clk_hw hw; + struct regmap *regmap; + u8 bus_id; +}; + +#define to_clk_i2s_mux(hw) container_of(hw, struct clk_i2s_mux, hw) + +static u8 clk_i2s_mux_get_parent(struct clk_hw *hw) +{ + struct clk_i2s_mux *mux = to_clk_i2s_mux(hw); + u32 val; + + regmap_read(mux->regmap, AT91_SFR_I2SCLKSEL, &val); + + return (val & BIT(mux->bus_id)) >> mux->bus_id; +} + +static int clk_i2s_mux_set_parent(struct clk_hw *hw, u8 index) +{ + struct clk_i2s_mux *mux = to_clk_i2s_mux(hw); + + return regmap_update_bits(mux->regmap, AT91_SFR_I2SCLKSEL, + BIT(mux->bus_id), index << mux->bus_id); +} + +static const struct clk_ops clk_i2s_mux_ops = { + .get_parent = clk_i2s_mux_get_parent, + .set_parent = clk_i2s_mux_set_parent, + .determine_rate = __clk_mux_determine_rate, +}; + +static struct clk_hw * __init +at91_clk_i2s_mux_register(struct regmap *regmap, const char *name, + const char * const *parent_names, + unsigned int num_parents, u8 bus_id) +{ + struct clk_init_data init = {}; + struct clk_i2s_mux *i2s_ck; + int ret; + + i2s_ck = kzalloc(sizeof(*i2s_ck), GFP_KERNEL); + if (!i2s_ck) + return ERR_PTR(-ENOMEM); + + init.name = name; + init.ops = &clk_i2s_mux_ops; + init.parent_names = parent_names; + init.num_parents = num_parents; + + i2s_ck->hw.init = &init; + i2s_ck->bus_id = bus_id; + i2s_ck->regmap = regmap; + + ret = clk_hw_register(NULL, &i2s_ck->hw); + if (ret) { + kfree(i2s_ck); + return ERR_PTR(ret); + } + + return &i2s_ck->hw; +} + +static void __init of_sama5d2_clk_i2s_mux_setup(struct device_node *np) +{ + struct regmap *regmap_sfr; + u8 bus_id; + const char *parent_names[2]; + struct device_node *i2s_mux_np; + struct clk_hw *hw; + int ret; + + regmap_sfr = syscon_regmap_lookup_by_compatible("atmel,sama5d2-sfr"); + if (IS_ERR(regmap_sfr)) + return; + + for_each_child_of_node(np, i2s_mux_np) { + if (of_property_read_u8(i2s_mux_np, "reg", &bus_id)) + continue; + + if (bus_id > I2S_BUS_NR) + continue; + + ret = of_clk_parent_fill(i2s_mux_np, parent_names, 2); + if (ret != 2) + continue; + + hw = at91_clk_i2s_mux_register(regmap_sfr, i2s_mux_np->name, + parent_names, 2, bus_id); + if (IS_ERR(hw)) + continue; + + of_clk_add_hw_provider(i2s_mux_np, of_clk_hw_simple_get, hw); + } +} + +CLK_OF_DECLARE(sama5d2_clk_i2s_mux, "atmel,sama5d2-clk-i2s-mux", + of_sama5d2_clk_i2s_mux_setup);
Quoting Codrin Ciubotariu (2018-06-18 07:12:36)
This driver is a simple muxing driver that controls the I2S's clock input by using syscon/regmap to change the parent. The available inputs can be peripheral clock and generated clock.
Signed-off-by: Codrin Ciubotariu codrin.ciubotariu@microchip.com
Applied to clk-next
But I had to fix:
WARNING: Missing or malformed SPDX-License-Identifier tag in line 1 #56: FILE: drivers/clk/at91/clk-i2s-mux.c:1: +/* SPDX-License-Identifier: GPL-2.0 */
so I did. Please run checkpatch next time.
On 06.07.2018 21:12, Stephen Boyd wrote:
Quoting Codrin Ciubotariu (2018-06-18 07:12:36)
This driver is a simple muxing driver that controls the I2S's clock input by using syscon/regmap to change the parent. The available inputs can be peripheral clock and generated clock.
Signed-off-by: Codrin Ciubotariu codrin.ciubotariu@microchip.com
Applied to clk-next
But I had to fix:
WARNING: Missing or malformed SPDX-License-Identifier tag in line 1 #56: FILE: drivers/clk/at91/clk-i2s-mux.c:1: +/* SPDX-License-Identifier: GPL-2.0 */
so I did. Please run checkpatch next time.
Sorry about that. I did run checkpatch, but I saw some files that commented the License-Identifier the same way I did. Didn't notice back then that were only the headers... Thank you for applying my patches.
Best regards, Codrin
This patch adds two clock muxes for the two I2S buses present on sama5d2 platforms.
Signed-off-by: Codrin Ciubotariu codrin.ciubotariu@microchip.com --- arch/arm/boot/dts/sama5d2.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 61f68e5c48e9..eeb6afa1cda7 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -992,6 +992,24 @@ atmel,clk-output-range = <0 100000000>; }; }; + + i2s_clkmux { + compatible = "atmel,sama5d2-clk-i2s-mux"; + #address-cells = <1>; + #size-cells = <0>; + + i2s0muxck: i2s0_muxclk { + clocks = <&i2s0_clk>, <&i2s0_gclk>; + #clock-cells = <0>; + reg = <0>; + }; + + i2s1muxck: i2s1_muxclk { + clocks = <&i2s1_clk>, <&i2s1_gclk>; + #clock-cells = <0>; + reg = <1>; + }; + }; };
qspi0: spi@f0020000 {
From: Cyrille Pitchen cyrille.pitchen@atmel.com
This patch adds DT nodes for I2S0 and I2S1. It also adds an alias for each I2S node.
Signed-off-by: Cyrille Pitchen cyrille.pitchen@atmel.com [codrin.ciubotariu@microchip.com: added phandle to new mux clock] Signed-off-by: Codrin Ciubotariu codrin.ciubotariu@microchip.com ---
The bindings for the I2S node are applied to broonie/sound.git .
Changes in v5: - the previous name was: [PATCH v4 6/7] ARM: dts: at91: sama5d2: add nodes for I2S controllers
arch/arm/boot/dts/sama5d2.dtsi | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index eeb6afa1cda7..eca73ce40bc5 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -58,6 +58,8 @@ serial1 = &uart3; tcb0 = &tcb0; tcb1 = &tcb1; + i2s0 = &i2s0; + i2s1 = &i2s1; };
cpus { @@ -1313,6 +1315,22 @@ clocks = <&clk32k>; };
+ i2s0: i2s@f8050000 { + compatible = "atmel,sama5d2-i2s"; + reg = <0xf8050000 0x100>; + interrupts = <54 IRQ_TYPE_LEVEL_HIGH 7>; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(31))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(32))>; + dma-names = "tx", "rx"; + clocks = <&i2s0_clk>, <&i2s0_gclk>, <&audio_pll_pmc>, <&i2s0muxck>; + clock-names = "pclk", "gclk", "aclk", "muxclk"; + status = "disabled"; + }; + can0: can@f8054000 { compatible = "bosch,m_can"; reg = <0xf8054000 0x4000>, <0x210000 0x4000>; @@ -1506,6 +1524,22 @@ status = "disabled"; };
+ i2s1: i2s@fc04c000 { + compatible = "atmel,sama5d2-i2s"; + reg = <0xfc04c000 0x100>; + interrupts = <55 IRQ_TYPE_LEVEL_HIGH 7>; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(33))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(34))>; + dma-names = "tx", "rx"; + clocks = <&i2s1_clk>, <&i2s1_gclk>, <&audio_pll_pmc>, <&i2s1muxck>; + clock-names = "pclk", "gclk", "aclk", "muxclk"; + status = "disabled"; + }; + can1: can@fc050000 { compatible = "bosch,m_can"; reg = <0xfc050000 0x4000>, <0x210000 0x4000>;
Hi Codrin,
On 18/06/2018 17:12:38+0300, Codrin Ciubotariu wrote:
From: Cyrille Pitchen cyrille.pitchen@atmel.com
This patch adds DT nodes for I2S0 and I2S1. It also adds an alias for each I2S node.
Signed-off-by: Cyrille Pitchen cyrille.pitchen@atmel.com [codrin.ciubotariu@microchip.com: added phandle to new mux clock] Signed-off-by: Codrin Ciubotariu codrin.ciubotariu@microchip.com
The bindings for the I2S node are applied to broonie/sound.git .
Changes in v5:
- the previous name was: [PATCH v4 6/7] ARM: dts: at91: sama5d2: add nodes for I2S controllers
arch/arm/boot/dts/sama5d2.dtsi | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index eeb6afa1cda7..eca73ce40bc5 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -58,6 +58,8 @@ serial1 = &uart3; tcb0 = &tcb0; tcb1 = &tcb1;
i2s0 = &i2s0;
i2s1 = &i2s1;
};
cpus {
@@ -1313,6 +1315,22 @@ clocks = <&clk32k>; };
i2s0: i2s@f8050000 {
compatible = "atmel,sama5d2-i2s";
reg = <0xf8050000 0x100>;
interrupts = <54 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(31))>,
<&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(32))>;
dma-names = "tx", "rx";
clocks = <&i2s0_clk>, <&i2s0_gclk>, <&audio_pll_pmc>, <&i2s0muxck>;
clock-names = "pclk", "gclk", "aclk", "muxclk";
status = "disabled";
};
Can you resend the DTS patches after removing the unnecessary clocks?
Thanks,
On 06.07.2018 22:39, Alexandre Belloni wrote:
Hi Codrin,
On 18/06/2018 17:12:38+0300, Codrin Ciubotariu wrote:
From: Cyrille Pitchen cyrille.pitchen@atmel.com
This patch adds DT nodes for I2S0 and I2S1. It also adds an alias for each I2S node.
Signed-off-by: Cyrille Pitchen cyrille.pitchen@atmel.com [codrin.ciubotariu@microchip.com: added phandle to new mux clock] Signed-off-by: Codrin Ciubotariu codrin.ciubotariu@microchip.com
The bindings for the I2S node are applied to broonie/sound.git .
Changes in v5:
- the previous name was: [PATCH v4 6/7] ARM: dts: at91: sama5d2: add nodes for I2S controllers
arch/arm/boot/dts/sama5d2.dtsi | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index eeb6afa1cda7..eca73ce40bc5 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -58,6 +58,8 @@ serial1 = &uart3; tcb0 = &tcb0; tcb1 = &tcb1;
i2s0 = &i2s0;
i2s1 = &i2s1;
};
cpus {
@@ -1313,6 +1315,22 @@ clocks = <&clk32k>; };
i2s0: i2s@f8050000 {
compatible = "atmel,sama5d2-i2s";
reg = <0xf8050000 0x100>;
interrupts = <54 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(31))>,
<&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(32))>;
dma-names = "tx", "rx";
clocks = <&i2s0_clk>, <&i2s0_gclk>, <&audio_pll_pmc>, <&i2s0muxck>;
clock-names = "pclk", "gclk", "aclk", "muxclk";
status = "disabled";
};
Can you resend the DTS patches after removing the unnecessary clocks?
I will. Should I also make the "muxclk" clock an assigned clock to assign its parent ?
Thanks and best regards, Codrin
Hello,
On 09/07/2018 16:29:43+0300, Codrin Ciubotariu wrote:
On 06.07.2018 22:39, Alexandre Belloni wrote:
Hi Codrin,
On 18/06/2018 17:12:38+0300, Codrin Ciubotariu wrote:
From: Cyrille Pitchen cyrille.pitchen@atmel.com
This patch adds DT nodes for I2S0 and I2S1. It also adds an alias for each I2S node.
Signed-off-by: Cyrille Pitchen cyrille.pitchen@atmel.com [codrin.ciubotariu@microchip.com: added phandle to new mux clock] Signed-off-by: Codrin Ciubotariu codrin.ciubotariu@microchip.com
The bindings for the I2S node are applied to broonie/sound.git .
Changes in v5:
- the previous name was: [PATCH v4 6/7] ARM: dts: at91: sama5d2: add nodes for I2S controllers
arch/arm/boot/dts/sama5d2.dtsi | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index eeb6afa1cda7..eca73ce40bc5 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -58,6 +58,8 @@ serial1 = &uart3; tcb0 = &tcb0; tcb1 = &tcb1;
i2s0 = &i2s0;
}; cpus {i2s1 = &i2s1;
@@ -1313,6 +1315,22 @@ clocks = <&clk32k>; };
i2s0: i2s@f8050000 {
compatible = "atmel,sama5d2-i2s";
reg = <0xf8050000 0x100>;
interrupts = <54 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(31))>,
<&dma0
(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
AT91_XDMAC_DT_PERID(32))>;
dma-names = "tx", "rx";
clocks = <&i2s0_clk>, <&i2s0_gclk>, <&audio_pll_pmc>, <&i2s0muxck>;
clock-names = "pclk", "gclk", "aclk", "muxclk";
status = "disabled";
};
Can you resend the DTS patches after removing the unnecessary clocks?
I will. Should I also make the "muxclk" clock an assigned clock to assign its parent ?
It would be better if that allows to remove the corresponding code in the driver.
From: Cyrille Pitchen cyrille.pitchen@atmel.com
This patch sets the pin muxing for the I2S controllers
Signed-off-by: Cyrille Pitchen cyrille.pitchen@atmel.com [codrin.ciubotariu@microchip.com: added pin muxing for the second controller] Signed-off-by: Codrin Ciubotariu codrin.ciubotariu@microchip.com ---
Changes in v5: - Previous name was: [PATCH v4 7/7] ARM: dts: at91: sama5d2 Xplained: add pin muxing for I2S
arch/arm/boot/dts/at91-sama5d2_xplained.dts | 28 +++++++++++++++++++++ 1 file changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts index e4bbb7e0f793..03917312dec1 100644 --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts @@ -281,6 +281,11 @@ status = "okay"; };
+ i2s0: i2s@f8050000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2s0_default>; + }; + can0: can@f8054000 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can0_default>; @@ -424,6 +429,24 @@ bias-disable; };
+ pinctrl_i2s0_default: i2s0_default { + pinmux = <PIN_PC1__I2SC0_CK>, + <PIN_PC2__I2SC0_MCK>, + <PIN_PC3__I2SC0_WS>, + <PIN_PC4__I2SC0_DI0>, + <PIN_PC5__I2SC0_DO0>; + bias-disable; + }; + + pinctrl_i2s1_default: i2s1_default { + pinmux = <PIN_PA15__I2SC1_CK>, + <PIN_PA14__I2SC1_MCK>, + <PIN_PA16__I2SC1_WS>, + <PIN_PA17__I2SC1_DI0>, + <PIN_PA18__I2SC1_DO0>; + bias-disable; + }; + pinctrl_key_gpio_default: key_gpio_default { pinmux = <PIN_PB9__GPIO>; bias-pull-up; @@ -546,6 +569,11 @@ status = "okay"; };
+ i2s1: i2s@fc04c000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2s1_default>; + }; + can1: can@fc050000 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can1_default>;
participants (4)
-
Alexandre Belloni
-
Codrin Ciubotariu
-
Rob Herring
-
Stephen Boyd