Add support for soundwire 1.6 version to gate RX/TX bus clock.

Signed-off-by: Venkata Prasad Potturu potturu@codeaurora.org Signed-off-by: Srinivasa Rao Mandadapu srivasam@codeaurora.org --- Changes since v1: -- Add const name to mask value.

drivers/soundwire/qcom.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c index 0ef79d6..491407f 100644 --- a/drivers/soundwire/qcom.c +++ b/drivers/soundwire/qcom.c @@ -109,6 +109,7 @@ #define SWR_MAX_CMD_ID 14 #define MAX_FIFO_RD_RETRY 3 #define SWR_OVERFLOW_RETRY_COUNT 30 +#define SWRM_HCTL_REG_MASK 0xFFFFFFFD

struct qcom_swrm_port_config { u8 si; @@ -127,6 +128,7 @@ struct qcom_swrm_ctrl { struct device *dev; struct regmap *regmap; void __iomem *mmio; + char __iomem *swrm_hctl_reg; struct completion broadcast; struct completion enumeration; struct work_struct slave_work; @@ -610,6 +612,12 @@ static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl) val = FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK, ctrl->rows_index); val |= FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK, ctrl->cols_index);

+ if (ctrl->swrm_hctl_reg) { + val = ioread32(ctrl->swrm_hctl_reg); + val &= SWRM_HCTL_REG_MASK; + iowrite32(val, ctrl->swrm_hctl_reg); + } + ctrl->reg_write(ctrl, SWRM_MCP_FRAME_CTRL_BANK_ADDR(0), val);

/* Enable Auto enumeration */ @@ -1200,7 +1208,7 @@ static int qcom_swrm_probe(struct platform_device *pdev) struct qcom_swrm_ctrl *ctrl; const struct qcom_swrm_data *data; int ret; - u32 val; + int val, swrm_hctl_reg = 0;

ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL); if (!ctrl) @@ -1251,6 +1259,9 @@ static int qcom_swrm_probe(struct platform_device *pdev) ctrl->bus.port_ops = &qcom_swrm_port_ops; ctrl->bus.compute_params = &qcom_swrm_compute_params;

+ if (!of_property_read_u32(dev->of_node, "qcom,swrm-hctl-reg", &swrm_hctl_reg)) + ctrl->swrm_hctl_reg = devm_ioremap(&pdev->dev, swrm_hctl_reg, 0x4); + ret = qcom_swrm_get_port_config(ctrl); if (ret) goto err_clk;