[PATCH 1/5] ASoC: codecs/jz47xx: Use regmap_{set,clear}_bits
Use regmap_{set,clear}_bits instead of regmap_update_bits, when applicable.
Signed-off-by: Paul Cercueil paul@crapouillou.net --- sound/soc/codecs/jz4725b.c | 26 ++++++------ sound/soc/codecs/jz4740.c | 20 +++------ sound/soc/codecs/jz4770.c | 85 +++++++++++++++++--------------------- 3 files changed, 55 insertions(+), 76 deletions(-)
diff --git a/sound/soc/codecs/jz4725b.c b/sound/soc/codecs/jz4725b.c index e49374c72e70..5201a8f6d7b6 100644 --- a/sound/soc/codecs/jz4725b.c +++ b/sound/soc/codecs/jz4725b.c @@ -198,15 +198,15 @@ static int jz4725b_out_stage_enable(struct snd_soc_dapm_widget *w,
switch (event) { case SND_SOC_DAPM_PRE_PMU: - return regmap_update_bits(map, JZ4725B_CODEC_REG_IFR, - BIT(REG_IFR_RAMP_UP_DONE_OFFSET), 0); + return regmap_clear_bits(map, JZ4725B_CODEC_REG_IFR, + BIT(REG_IFR_RAMP_UP_DONE_OFFSET)); case SND_SOC_DAPM_POST_PMU: return regmap_read_poll_timeout(map, JZ4725B_CODEC_REG_IFR, val, val & BIT(REG_IFR_RAMP_UP_DONE_OFFSET), 100000, 500000); case SND_SOC_DAPM_PRE_PMD: - return regmap_update_bits(map, JZ4725B_CODEC_REG_IFR, - BIT(REG_IFR_RAMP_DOWN_DONE_OFFSET), 0); + return regmap_clear_bits(map, JZ4725B_CODEC_REG_IFR, + BIT(REG_IFR_RAMP_DOWN_DONE_OFFSET)); case SND_SOC_DAPM_POST_PMD: return regmap_read_poll_timeout(map, JZ4725B_CODEC_REG_IFR, val, val & BIT(REG_IFR_RAMP_DOWN_DONE_OFFSET), @@ -303,24 +303,22 @@ static int jz4725b_codec_set_bias_level(struct snd_soc_component *component,
switch (level) { case SND_SOC_BIAS_ON: - regmap_update_bits(map, JZ4725B_CODEC_REG_PMR2, - BIT(REG_PMR2_SB_SLEEP_OFFSET), 0); + regmap_clear_bits(map, JZ4725B_CODEC_REG_PMR2, + BIT(REG_PMR2_SB_SLEEP_OFFSET)); break; case SND_SOC_BIAS_PREPARE: /* Enable sound hardware */ - regmap_update_bits(map, JZ4725B_CODEC_REG_PMR2, - BIT(REG_PMR2_SB_OFFSET), 0); + regmap_clear_bits(map, JZ4725B_CODEC_REG_PMR2, + BIT(REG_PMR2_SB_OFFSET)); msleep(224); break; case SND_SOC_BIAS_STANDBY: - regmap_update_bits(map, JZ4725B_CODEC_REG_PMR2, - BIT(REG_PMR2_SB_SLEEP_OFFSET), - BIT(REG_PMR2_SB_SLEEP_OFFSET)); + regmap_set_bits(map, JZ4725B_CODEC_REG_PMR2, + BIT(REG_PMR2_SB_SLEEP_OFFSET)); break; case SND_SOC_BIAS_OFF: - regmap_update_bits(map, JZ4725B_CODEC_REG_PMR2, - BIT(REG_PMR2_SB_OFFSET), - BIT(REG_PMR2_SB_OFFSET)); + regmap_set_bits(map, JZ4725B_CODEC_REG_PMR2, + BIT(REG_PMR2_SB_OFFSET)); break; }
diff --git a/sound/soc/codecs/jz4740.c b/sound/soc/codecs/jz4740.c index c9900d1cd5c2..5e58bfee2b49 100644 --- a/sound/soc/codecs/jz4740.c +++ b/sound/soc/codecs/jz4740.c @@ -219,12 +219,11 @@ static struct snd_soc_dai_driver jz4740_codec_dai = {
static void jz4740_codec_wakeup(struct regmap *regmap) { - regmap_update_bits(regmap, JZ4740_REG_CODEC_1, - JZ4740_CODEC_1_RESET, JZ4740_CODEC_1_RESET); + regmap_set_bits(regmap, JZ4740_REG_CODEC_1, JZ4740_CODEC_1_RESET); udelay(2);
- regmap_update_bits(regmap, JZ4740_REG_CODEC_1, - JZ4740_CODEC_1_SUSPEND | JZ4740_CODEC_1_RESET, 0); + regmap_clear_bits(regmap, JZ4740_REG_CODEC_1, + JZ4740_CODEC_1_SUSPEND | JZ4740_CODEC_1_RESET);
regcache_sync(regmap); } @@ -235,7 +234,6 @@ static int jz4740_codec_set_bias_level(struct snd_soc_component *component, struct jz4740_codec *jz4740_codec = snd_soc_component_get_drvdata(component); struct regmap *regmap = jz4740_codec->regmap; unsigned int mask; - unsigned int value;
switch (level) { case SND_SOC_BIAS_ON: @@ -244,9 +242,8 @@ static int jz4740_codec_set_bias_level(struct snd_soc_component *component, mask = JZ4740_CODEC_1_VREF_DISABLE | JZ4740_CODEC_1_VREF_AMP_DISABLE | JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M; - value = 0;
- regmap_update_bits(regmap, JZ4740_REG_CODEC_1, mask, value); + regmap_clear_bits(regmap, JZ4740_REG_CODEC_1, mask); break; case SND_SOC_BIAS_STANDBY: /* The only way to clear the suspend flag is to reset the codec */ @@ -256,17 +253,12 @@ static int jz4740_codec_set_bias_level(struct snd_soc_component *component, mask = JZ4740_CODEC_1_VREF_DISABLE | JZ4740_CODEC_1_VREF_AMP_DISABLE | JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M; - value = JZ4740_CODEC_1_VREF_DISABLE | - JZ4740_CODEC_1_VREF_AMP_DISABLE | - JZ4740_CODEC_1_HEADPHONE_POWERDOWN_M;
- regmap_update_bits(regmap, JZ4740_REG_CODEC_1, mask, value); + regmap_set_bits(regmap, JZ4740_REG_CODEC_1, mask); break; case SND_SOC_BIAS_OFF: mask = JZ4740_CODEC_1_SUSPEND; - value = JZ4740_CODEC_1_SUSPEND; - - regmap_update_bits(regmap, JZ4740_REG_CODEC_1, mask, value); + regmap_set_bits(regmap, JZ4740_REG_CODEC_1, mask); regcache_mark_dirty(regmap); break; default: diff --git a/sound/soc/codecs/jz4770.c b/sound/soc/codecs/jz4770.c index 298689a07168..c6b2043f31a9 100644 --- a/sound/soc/codecs/jz4770.c +++ b/sound/soc/codecs/jz4770.c @@ -190,18 +190,18 @@ static int jz4770_codec_set_bias_level(struct snd_soc_component *codec,
switch (level) { case SND_SOC_BIAS_PREPARE: - regmap_update_bits(regmap, JZ4770_CODEC_REG_CR_VIC, - REG_CR_VIC_SB, 0); + regmap_clear_bits(regmap, JZ4770_CODEC_REG_CR_VIC, + REG_CR_VIC_SB); msleep(250); - regmap_update_bits(regmap, JZ4770_CODEC_REG_CR_VIC, - REG_CR_VIC_SB_SLEEP, 0); + regmap_clear_bits(regmap, JZ4770_CODEC_REG_CR_VIC, + REG_CR_VIC_SB_SLEEP); msleep(400); break; case SND_SOC_BIAS_STANDBY: - regmap_update_bits(regmap, JZ4770_CODEC_REG_CR_VIC, - REG_CR_VIC_SB_SLEEP, REG_CR_VIC_SB_SLEEP); - regmap_update_bits(regmap, JZ4770_CODEC_REG_CR_VIC, - REG_CR_VIC_SB, REG_CR_VIC_SB); + regmap_set_bits(regmap, JZ4770_CODEC_REG_CR_VIC, + REG_CR_VIC_SB_SLEEP); + regmap_set_bits(regmap, JZ4770_CODEC_REG_CR_VIC, + REG_CR_VIC_SB); fallthrough; default: break; @@ -292,8 +292,8 @@ static int jz4770_codec_mute_stream(struct snd_soc_dai *dai, int mute, int direc }
/* clear GUP/GDO flag */ - regmap_update_bits(jz_codec->regmap, JZ4770_CODEC_REG_IFR, - gain_bit, gain_bit); + regmap_set_bits(jz_codec->regmap, JZ4770_CODEC_REG_IFR, + gain_bit); }
return 0; @@ -369,8 +369,8 @@ static int hpout_event(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_PRE_PMU: /* set cap-less, unmute HP */ - regmap_update_bits(jz_codec->regmap, JZ4770_CODEC_REG_CR_HP, - REG_CR_HP_SB_HPCM | REG_CR_HP_MUTE, 0); + regmap_clear_bits(jz_codec->regmap, JZ4770_CODEC_REG_CR_HP, + REG_CR_HP_SB_HPCM | REG_CR_HP_MUTE); break;
case SND_SOC_DAPM_POST_PMU: @@ -385,16 +385,15 @@ static int hpout_event(struct snd_soc_dapm_widget *w, }
/* clear RUP flag */ - regmap_update_bits(jz_codec->regmap, JZ4770_CODEC_REG_IFR, - REG_IFR_RUP, REG_IFR_RUP); + regmap_set_bits(jz_codec->regmap, JZ4770_CODEC_REG_IFR, + REG_IFR_RUP);
break;
case SND_SOC_DAPM_POST_PMD: /* set cap-couple, mute HP */ - regmap_update_bits(jz_codec->regmap, JZ4770_CODEC_REG_CR_HP, - REG_CR_HP_SB_HPCM | REG_CR_HP_MUTE, - REG_CR_HP_SB_HPCM | REG_CR_HP_MUTE); + regmap_set_bits(jz_codec->regmap, JZ4770_CODEC_REG_CR_HP, + REG_CR_HP_SB_HPCM | REG_CR_HP_MUTE);
err = regmap_read_poll_timeout(jz_codec->regmap, JZ4770_CODEC_REG_IFR, @@ -406,8 +405,8 @@ static int hpout_event(struct snd_soc_dapm_widget *w, }
/* clear RDO flag */ - regmap_update_bits(jz_codec->regmap, JZ4770_CODEC_REG_IFR, - REG_IFR_RDO, REG_IFR_RDO); + regmap_set_bits(jz_codec->regmap, JZ4770_CODEC_REG_IFR, + REG_IFR_RDO);
break; } @@ -592,63 +591,53 @@ static void jz4770_codec_codec_init_regs(struct snd_soc_component *codec) regcache_cache_only(regmap, true);
/* default HP output to PCM */ - regmap_update_bits(regmap, JZ4770_CODEC_REG_CR_HP, - REG_CR_HP_SEL_MASK, REG_CR_HP_SEL_MASK); + regmap_set_bits(regmap, JZ4770_CODEC_REG_CR_HP, REG_CR_HP_SEL_MASK);
/* default line output to PCM */ - regmap_update_bits(regmap, JZ4770_CODEC_REG_CR_LO, - REG_CR_LO_SEL_MASK, REG_CR_LO_SEL_MASK); + regmap_set_bits(regmap, JZ4770_CODEC_REG_CR_LO, REG_CR_LO_SEL_MASK);
/* Disable stereo mic */ - regmap_update_bits(regmap, JZ4770_CODEC_REG_CR_MIC, - BIT(REG_CR_MIC_STEREO_OFFSET), 0); + regmap_clear_bits(regmap, JZ4770_CODEC_REG_CR_MIC, + BIT(REG_CR_MIC_STEREO_OFFSET));
/* Set mic 1 as default source for ADC */ - regmap_update_bits(regmap, JZ4770_CODEC_REG_CR_ADC, - REG_CR_ADC_IN_SEL_MASK, 0); + regmap_clear_bits(regmap, JZ4770_CODEC_REG_CR_ADC, + REG_CR_ADC_IN_SEL_MASK);
/* ADC/DAC: serial + i2s */ - regmap_update_bits(regmap, JZ4770_CODEC_REG_AICR_ADC, - REG_AICR_ADC_SERIAL | REG_AICR_ADC_I2S, - REG_AICR_ADC_SERIAL | REG_AICR_ADC_I2S); - regmap_update_bits(regmap, JZ4770_CODEC_REG_AICR_DAC, - REG_AICR_DAC_SERIAL | REG_AICR_DAC_I2S, - REG_AICR_DAC_SERIAL | REG_AICR_DAC_I2S); + regmap_set_bits(regmap, JZ4770_CODEC_REG_AICR_ADC, + REG_AICR_ADC_SERIAL | REG_AICR_ADC_I2S); + regmap_set_bits(regmap, JZ4770_CODEC_REG_AICR_DAC, + REG_AICR_DAC_SERIAL | REG_AICR_DAC_I2S);
/* The generated IRQ is a high level */ - regmap_update_bits(regmap, JZ4770_CODEC_REG_ICR, - REG_ICR_INT_FORM_MASK, 0); + regmap_clear_bits(regmap, JZ4770_CODEC_REG_ICR, REG_ICR_INT_FORM_MASK); regmap_update_bits(regmap, JZ4770_CODEC_REG_IMR, REG_IMR_ALL_MASK, REG_IMR_JACK_MASK | REG_IMR_RUP_MASK | REG_IMR_RDO_MASK | REG_IMR_GUP_MASK | REG_IMR_GDO_MASK);
/* 12M oscillator */ - regmap_update_bits(regmap, JZ4770_CODEC_REG_CCR, - REG_CCR_CRYSTAL_MASK, 0); + regmap_clear_bits(regmap, JZ4770_CODEC_REG_CCR, REG_CCR_CRYSTAL_MASK);
/* 0: 16ohm/220uF, 1: 10kohm/1uF */ - regmap_update_bits(regmap, JZ4770_CODEC_REG_CR_HP, - REG_CR_HP_LOAD, 0); + regmap_clear_bits(regmap, JZ4770_CODEC_REG_CR_HP, REG_CR_HP_LOAD);
/* disable automatic gain */ - regmap_update_bits(regmap, JZ4770_CODEC_REG_AGC1, REG_AGC1_EN, 0); + regmap_clear_bits(regmap, JZ4770_CODEC_REG_AGC1, REG_AGC1_EN);
/* Disable DAC lrswap */ - regmap_update_bits(regmap, JZ4770_CODEC_REG_CR_DAC, - REG_CR_DAC_LRSWAP, REG_CR_DAC_LRSWAP); + regmap_set_bits(regmap, JZ4770_CODEC_REG_CR_DAC, REG_CR_DAC_LRSWAP);
/* Independent L/R DAC gain control */ - regmap_update_bits(regmap, JZ4770_CODEC_REG_GCR_DACL, - REG_GCR_DACL_RLGOD, 0); + regmap_clear_bits(regmap, JZ4770_CODEC_REG_GCR_DACL, + REG_GCR_DACL_RLGOD);
/* Disable ADC lrswap */ - regmap_update_bits(regmap, JZ4770_CODEC_REG_CR_ADC, - REG_CR_ADC_LRSWAP, REG_CR_ADC_LRSWAP); + regmap_set_bits(regmap, JZ4770_CODEC_REG_CR_ADC, REG_CR_ADC_LRSWAP);
/* default to cap-less mode(0) */ - regmap_update_bits(regmap, JZ4770_CODEC_REG_CR_HP, - REG_CR_HP_SB_HPCM, 0); + regmap_clear_bits(regmap, JZ4770_CODEC_REG_CR_HP, REG_CR_HP_SB_HPCM);
/* Send collected updates. */ regcache_cache_only(regmap, false);
From: Christophe Branchereau cbranchereau@gmail.com
In case a poll for RUP times out, we might be left with some IRQ flags that should be cleared before the next power on.
Signed-off-by: Christophe Branchereau cbranchereau@gmail.com Signed-off-by: Paul Cercueil paul@crapouillou.net --- sound/soc/codecs/jz4770.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/sound/soc/codecs/jz4770.c b/sound/soc/codecs/jz4770.c index c6b2043f31a9..002f2300e750 100644 --- a/sound/soc/codecs/jz4770.c +++ b/sound/soc/codecs/jz4770.c @@ -190,6 +190,9 @@ static int jz4770_codec_set_bias_level(struct snd_soc_component *codec,
switch (level) { case SND_SOC_BIAS_PREPARE: + /* Reset all interrupt flags. */ + regmap_write(regmap, JZ4770_CODEC_REG_IFR, REG_IFR_ALL_MASK); + regmap_clear_bits(regmap, JZ4770_CODEC_REG_CR_VIC, REG_CR_VIC_SB); msleep(250); @@ -642,9 +645,6 @@ static void jz4770_codec_codec_init_regs(struct snd_soc_component *codec) /* Send collected updates. */ regcache_cache_only(regmap, false); regcache_sync(regmap); - - /* Reset all interrupt flags. */ - regmap_write(regmap, JZ4770_CODEC_REG_IFR, REG_IFR_ALL_MASK); }
static int jz4770_codec_codec_probe(struct snd_soc_component *codec)
From: Christophe Branchereau cbranchereau@gmail.com
When using cap-coupled outputs, the RUP/RDO can take much longer than the 100ms timeout we used to have. Increase that timeout to one second.
Signed-off-by: Christophe Branchereau cbranchereau@gmail.com Signed-off-by: Paul Cercueil paul@crapouillou.net --- sound/soc/codecs/jz4770.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/sound/soc/codecs/jz4770.c b/sound/soc/codecs/jz4770.c index 002f2300e750..0da966785aee 100644 --- a/sound/soc/codecs/jz4770.c +++ b/sound/soc/codecs/jz4770.c @@ -287,7 +287,7 @@ static int jz4770_codec_mute_stream(struct snd_soc_dai *dai, int mute, int direc err = regmap_read_poll_timeout(jz_codec->regmap, JZ4770_CODEC_REG_IFR, val, val & gain_bit, - 1000, 100 * USEC_PER_MSEC); + 1000, 1 * USEC_PER_SEC); if (err) { dev_err(jz_codec->dev, "Timeout while setting digital mute: %d", err); @@ -381,7 +381,7 @@ static int hpout_event(struct snd_soc_dapm_widget *w, err = regmap_read_poll_timeout(jz_codec->regmap, JZ4770_CODEC_REG_IFR, val, val & REG_IFR_RUP, - 1000, 100 * USEC_PER_MSEC); + 1000, 1 * USEC_PER_SEC); if (err) { dev_err(jz_codec->dev, "RUP timeout: %d", err); return err; @@ -401,7 +401,7 @@ static int hpout_event(struct snd_soc_dapm_widget *w, err = regmap_read_poll_timeout(jz_codec->regmap, JZ4770_CODEC_REG_IFR, val, val & REG_IFR_RDO, - 1000, 100 * USEC_PER_MSEC); + 1000, 1 * USEC_PER_SEC); if (err) { dev_err(jz_codec->dev, "RDO timeout: %d", err); return err; @@ -803,7 +803,7 @@ static int jz4770_codec_io_wait(struct jz_codec *codec)
return readl_poll_timeout(codec->base + ICDC_RGADW_OFFSET, reg, !(reg & ICDC_RGADW_RGWR), - 1000, 10 * USEC_PER_MSEC); + 1000, 1 * USEC_PER_SEC); }
static int jz4770_codec_reg_read(void *context, unsigned int reg,
There is simply no reason to do that.
Signed-off-by: Paul Cercueil paul@crapouillou.net --- sound/soc/codecs/jz4770.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/sound/soc/codecs/jz4770.c b/sound/soc/codecs/jz4770.c index 0da966785aee..909b70e817b4 100644 --- a/sound/soc/codecs/jz4770.c +++ b/sound/soc/codecs/jz4770.c @@ -371,9 +371,9 @@ static int hpout_event(struct snd_soc_dapm_widget *w,
switch (event) { case SND_SOC_DAPM_PRE_PMU: - /* set cap-less, unmute HP */ + /* unmute HP */ regmap_clear_bits(jz_codec->regmap, JZ4770_CODEC_REG_CR_HP, - REG_CR_HP_SB_HPCM | REG_CR_HP_MUTE); + REG_CR_HP_MUTE); break;
case SND_SOC_DAPM_POST_PMU: @@ -394,9 +394,9 @@ static int hpout_event(struct snd_soc_dapm_widget *w, break;
case SND_SOC_DAPM_POST_PMD: - /* set cap-couple, mute HP */ + /* mute HP */ regmap_set_bits(jz_codec->regmap, JZ4770_CODEC_REG_CR_HP, - REG_CR_HP_SB_HPCM | REG_CR_HP_MUTE); + REG_CR_HP_MUTE);
err = regmap_read_poll_timeout(jz_codec->regmap, JZ4770_CODEC_REG_IFR,
Cap-less mode is useful e.g. if the headphones are used as an antenna for a FM radio, so that the signal is not altered. For everything else, we want the cap-couple mode.
Signed-off-by: Paul Cercueil paul@crapouillou.net --- sound/soc/codecs/jz4770.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/sound/soc/codecs/jz4770.c b/sound/soc/codecs/jz4770.c index 909b70e817b4..c9fe7f72bfcb 100644 --- a/sound/soc/codecs/jz4770.c +++ b/sound/soc/codecs/jz4770.c @@ -98,7 +98,7 @@ enum { #define REG_CR_HP_MUTE BIT(7) #define REG_CR_HP_LOAD BIT(6) #define REG_CR_HP_SB_OFFSET 4 -#define REG_CR_HP_SB_HPCM BIT(3) +#define REG_CR_HP_SB_HPCM_OFFSET 3 #define REG_CR_HP_SEL_OFFSET 0 #define REG_CR_HP_SEL_MASK (0x3 << REG_CR_HP_SEL_OFFSET)
@@ -519,6 +519,9 @@ static const struct snd_soc_dapm_widget jz4770_codec_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY("MICBIAS", JZ4770_CODEC_REG_CR_MIC, REG_CR_MIC_BIAS_SB_OFFSET, 1, NULL, 0),
+ SND_SOC_DAPM_SUPPLY("Cap-less", JZ4770_CODEC_REG_CR_HP, + REG_CR_HP_SB_HPCM_OFFSET, 1, NULL, 0), + SND_SOC_DAPM_INPUT("MIC1P"), SND_SOC_DAPM_INPUT("MIC1N"), SND_SOC_DAPM_INPUT("MIC2P"), @@ -640,7 +643,8 @@ static void jz4770_codec_codec_init_regs(struct snd_soc_component *codec) regmap_set_bits(regmap, JZ4770_CODEC_REG_CR_ADC, REG_CR_ADC_LRSWAP);
/* default to cap-less mode(0) */ - regmap_clear_bits(regmap, JZ4770_CODEC_REG_CR_HP, REG_CR_HP_SB_HPCM); + regmap_clear_bits(regmap, JZ4770_CODEC_REG_CR_HP, + BIT(REG_CR_HP_SB_HPCM_OFFSET));
/* Send collected updates. */ regcache_cache_only(regmap, false);
On Mon, 7 Dec 2020 12:53:33 +0000, Paul Cercueil wrote:
Use regmap_{set,clear}_bits instead of regmap_update_bits, when applicable.
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
Thanks!
[1/5] ASoC: codecs/jz47xx: Use regmap_{set,clear}_bits commit: ad13c835442cdb2a964588fd03327f51dbcd4dfa [2/5] ASoC: codecs/jz4770: Reset interrupt flags in bias PREPARE commit: a346c77836183f6e3e054c5da022e0fde2773683 [3/5] ASoC: codecs/jz4770: Adjust timeouts for cap-coupled outputs commit: 6b4da5374b10a48be18df26288125746f1858507 [4/5] ASoC: codecs/jz4770: Don't change cap-couple setting in HP PMU/PMD commit: 4f293dfea9f6d23a972be0e38556f5b0c02c2d4e [5/5] ASoC: codecs/jz4770: Add DAPM widget to set HP out to cap-less mode commit: e648e3f1165354f04a4deed1f41152a287b68d59
All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying to this mail.
Thanks, Mark
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Paul Cercueil