[alsa-devel] [PATCH 0/5] ARM: tegra: audio-related changes for Tegra30
From: Stephen Warren swarren@nvidia.com
This is the arch/arm/mach-tegra changes that match the ASoC series I just posted.
This depends on the previous GPIO/pinmux work that I posted. We should be able to apply this to the Tegra tree independently from the ASoC driver series.
Stephen Warren (5): ARM: tegra: provide clock aliases for AHUB configlink ARM: tegra: set up audio clocks for tegra30 dt ARM: tegra: add AUXDATA required for audio ARM: dt: tegra30.dtsi: Add audio-related nodes ARM: dt: tegra cardhu: basic audio support
arch/arm/boot/dts/tegra-cardhu.dts | 61 ++++++++++++++++++++++++++++++++ arch/arm/boot/dts/tegra30.dtsi | 32 +++++++++++++++++ arch/arm/mach-tegra/board-dt-tegra30.c | 15 ++++++++ arch/arm/mach-tegra/tegra30_clocks.c | 9 +++++ 4 files changed, 117 insertions(+), 0 deletions(-)
From: Stephen Warren swarren@nvidia.com
The Tegra30 AHUB driver must call tegra_periph_reset_deassert() for all devices on the AHUB's configlink bus. The AHUB driver must be able to call clk_get_sys() to retrieve the clock parameter for this function. Add the necessary clock aliases to allow this.
Signed-off-by: Stephen Warren swarren@nvidia.com --- arch/arm/mach-tegra/tegra30_clocks.c | 9 +++++++++ 1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-tegra/tegra30_clocks.c b/arch/arm/mach-tegra/tegra30_clocks.c index 6d08b53..e33fe4b 100644 --- a/arch/arm/mach-tegra/tegra30_clocks.c +++ b/arch/arm/mach-tegra/tegra30_clocks.c @@ -3015,6 +3015,15 @@ struct clk_duplicate tegra_clk_duplicates[] = { CLK_DUPLICATE("sbc6", "spi_slave_tegra.5", NULL), CLK_DUPLICATE("twd", "smp_twd", NULL), CLK_DUPLICATE("vcp", "nvavp", "vcp"), + CLK_DUPLICATE("i2s0", NULL, "i2s0"), + CLK_DUPLICATE("i2s1", NULL, "i2s1"), + CLK_DUPLICATE("i2s2", NULL, "i2s2"), + CLK_DUPLICATE("i2s3", NULL, "i2s3"), + CLK_DUPLICATE("i2s4", NULL, "i2s4"), + CLK_DUPLICATE("dam0", NULL, "dam0"), + CLK_DUPLICATE("dam1", NULL, "dam1"), + CLK_DUPLICATE("dam2", NULL, "dam2"), + CLK_DUPLICATE("spdif_in", NULL, "spdif_in"), };
struct clk *tegra_ptr_clks[] = {
From: Stephen Warren swarren@nvidia.com
Set up the audio clock tree for Tegra30 in an equivalent fashion to the existing setup for Tegra20.
Signed-off-by: Stephen Warren swarren@nvidia.com --- arch/arm/mach-tegra/board-dt-tegra30.c | 9 +++++++++ 1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c b/arch/arm/mach-tegra/board-dt-tegra30.c index 5f7c03e..3de21c0 100644 --- a/arch/arm/mach-tegra/board-dt-tegra30.c +++ b/arch/arm/mach-tegra/board-dt-tegra30.c @@ -57,6 +57,15 @@ struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = { static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = { /* name parent rate enabled */ { "uarta", "pll_p", 408000000, true }, + { "pll_a", "pll_p_out1", 564480000, true }, + { "pll_a_out0", "pll_a", 11289600, true }, + { "extern1", "pll_a_out0", 0, true }, + { "clk_out_1", "extern1", 0, true }, + { "i2s0", "pll_a_out0", 11289600, false}, + { "i2s1", "pll_a_out0", 11289600, false}, + { "i2s2", "pll_a_out0", 11289600, false}, + { "i2s3", "pll_a_out0", 11289600, false}, + { "i2s4", "pll_a_out0", 11289600, false}, { NULL, NULL, 0, 0}, };
On Fri, Mar 30, 2012 at 05:11:34PM -0600, Stephen Warren wrote:
- { "i2s0", "pll_a_out0", 11289600, false},
- { "i2s1", "pll_a_out0", 11289600, false},
- { "i2s2", "pll_a_out0", 11289600, false},
- { "i2s3", "pll_a_out0", 11289600, false},
- { "i2s4", "pll_a_out0", 11289600, false},
While you chose 48kHz as the default in the utils code this is using 44.1kHz (which like I said is more what I'd expect). Not a problem but inconsistent.
From: Stephen Warren swarren@nvidia.com
Both the Tegra30 I2S and AHUB modules used clocks, and hence currently require AUXDATA in order to get specific device names so that clock lookups work.
Signed-off-by: Stephen Warren swarren@nvidia.com --- arch/arm/mach-tegra/board-dt-tegra30.c | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c b/arch/arm/mach-tegra/board-dt-tegra30.c index 3de21c0..f06b1c4 100644 --- a/arch/arm/mach-tegra/board-dt-tegra30.c +++ b/arch/arm/mach-tegra/board-dt-tegra30.c @@ -51,6 +51,12 @@ struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C500, "tegra-i2c.2", NULL), OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C700, "tegra-i2c.3", NULL), OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000D000, "tegra-i2c.4", NULL), + OF_DEV_AUXDATA("nvidia,tegra30-i2s", 0x70080300, "tegra30-i2s.0", NULL), + OF_DEV_AUXDATA("nvidia,tegra30-i2s", 0x70080400, "tegra30-i2s.1", NULL), + OF_DEV_AUXDATA("nvidia,tegra30-i2s", 0x70080500, "tegra30-i2s.2", NULL), + OF_DEV_AUXDATA("nvidia,tegra30-i2s", 0x70080600, "tegra30-i2s.3", NULL), + OF_DEV_AUXDATA("nvidia,tegra30-i2s", 0x70080700, "tegra30-i2s.4", NULL), + OF_DEV_AUXDATA("nvidia,tegra30-ahub", 0x70080000, "tegra30-ahub", NULL), {} };
From: Stephen Warren swarren@nvidia.com
Add nodes for the Tegra30 AHUB and I2S controllers.
Signed-off-by: Stephen Warren swarren@nvidia.com --- arch/arm/boot/dts/tegra30.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 files changed, 32 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 62a7b39..9956791 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -183,4 +183,36 @@ reg = < 0x70000868 0xd0 /* Pad control registers */ 0x70003000 0x3e0 >; /* Mux registers */ }; + + ahub@70080000 { + compatible = "nvidia,tegra30-ahub"; + reg = <0x70080000 0x80 0x70080200 0x100>; + interrupts = < 0 103 0x04 >; + nvidia,dma-request-selector = <&apbdma 1>; + }; + + tegra_i2s0: i2s@70080300 { + compatible = "nvidia,tegra30-i2s"; + reg = <0x70080300 0x100>; + }; + + tegra_i2s1: i2s@70080400 { + compatible = "nvidia,tegra30-i2s"; + reg = <0x70080400 0x100>; + }; + + tegra_i2s2: i2s@70080500 { + compatible = "nvidia,tegra30-i2s"; + reg = <0x70080500 0x100>; + }; + + tegra_i2s3: i2s@70080600 { + compatible = "nvidia,tegra30-i2s"; + reg = <0x70080600 0x100>; + }; + + tegra_i2s4: i2s@70080700 { + compatible = "nvidia,tegra30-i2s"; + reg = <0x70080700 0x100>; + }; };
From: Stephen Warren swarren@nvidia.com
Add WM8903 codec nodes, and top-level sound complex node for basic analog audio over headset jack and internal speakers.
Signed-off-by: Stephen Warren swarren@nvidia.com --- arch/arm/boot/dts/tegra-cardhu.dts | 61 ++++++++++++++++++++++++++++++++++++ 1 files changed, 61 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/tegra-cardhu.dts b/arch/arm/boot/dts/tegra-cardhu.dts index 0a9f34a..38a2b32 100644 --- a/arch/arm/boot/dts/tegra-cardhu.dts +++ b/arch/arm/boot/dts/tegra-cardhu.dts @@ -51,6 +51,15 @@ nvidia,pull = <2>; nvidia,tristate = <0>; }; + dap2_fs_pa2 { + nvidia,pins = "dap2_fs_pa2", + "dap2_sclk_pa3", + "dap2_din_pa4", + "dap2_dout_pa5"; + nvidia,function = "i2s1"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; }; };
@@ -92,6 +101,20 @@
i2c@7000d000 { clock-frequency = <100000>; + + wm8903: wm8903@1a { + compatible = "wlf,wm8903"; + reg = <0x1a>; + interrupt-parent = <&gpio>; + interrupts = <179 0x04>; /* gpio PW3 */ + + gpio-controller; + #gpio-cells = <2>; + + micdet-cfg = <0>; + micdet-delay = <100>; + gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; + }; };
sdhci@78000000 { @@ -111,4 +134,42 @@ sdhci@78000400 { support-8bit; }; + + i2s@70080300 { + status = "disable"; + }; + + i2s@70080500 { + status = "disable"; + }; + + i2s@70080600 { + status = "disable"; + }; + + i2s@70080700 { + status = "disable"; + }; + + sound { + compatible = "nvidia,tegra30-audio-wm8903-cardhu", + "nvidia,tegra30-audio-wm8903"; + nvidia,model = "NVIDIA Tegra Cardhu"; + + nvidia,audio-routing = + "Headphone Jack", "HPOUTR", + "Headphone Jack", "HPOUTL", + "Int Spk", "ROP", + "Int Spk", "RON", + "Int Spk", "LOP", + "Int Spk", "LON", + "Mic Jack", "MICBIAS", + "IN1L", "Mic Jack"; + + nvidia,i2s-controller = <&tegra_i2s1>; + nvidia,audio-codec = <&wm8903>; + + nvidia,spkr-en-gpios = <&wm8903 2 0>; + nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */ + }; };
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Mark Brown -
Stephen Warren