[alsa-devel] [PATCH 1/2 2.6.38] ASoC: WM8994: Don't disable the AIF[1|2]CLK_ENA unconditionaly
Since we began using the late clock disable functionality, ensure that we don't disable the clock if any of the ADC or DAC paths are still enabled. This happens when we have simultaneous playback and recording.
Signed-off-by: Dimitris Papastamos dp@opensource.wolfsonmicro.com --- sound/soc/codecs/wm8994.c | 25 +++++++++++++++++++------ 1 files changed, 19 insertions(+), 6 deletions(-)
diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c index ebaee5c..9e91525 100644 --- a/sound/soc/codecs/wm8994.c +++ b/sound/soc/codecs/wm8994.c @@ -110,6 +110,9 @@ struct wm8994_priv {
unsigned int aif1clk_enable:1; unsigned int aif2clk_enable:1; + + unsigned int aif1clk_disable:1; + unsigned int aif2clk_disable:1; };
static int wm8994_readable(unsigned int reg) @@ -1015,14 +1018,18 @@ static int late_enable_ev(struct snd_soc_dapm_widget *w,
switch (event) { case SND_SOC_DAPM_PRE_PMU: - if (wm8994->aif1clk_enable) + if (wm8994->aif1clk_enable) { snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1, WM8994_AIF1CLK_ENA_MASK, WM8994_AIF1CLK_ENA); - if (wm8994->aif2clk_enable) + wm8994->aif1clk_enable = 0; + } + if (wm8994->aif2clk_enable) { snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1, WM8994_AIF2CLK_ENA_MASK, WM8994_AIF2CLK_ENA); + wm8994->aif2clk_enable = 0; + } break; }
@@ -1037,15 +1044,15 @@ static int late_disable_ev(struct snd_soc_dapm_widget *w,
switch (event) { case SND_SOC_DAPM_POST_PMD: - if (wm8994->aif1clk_enable) { + if (wm8994->aif1clk_disable) { snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1, WM8994_AIF1CLK_ENA_MASK, 0); - wm8994->aif1clk_enable = 0; + wm8994->aif1clk_disable = 0; } - if (wm8994->aif2clk_enable) { + if (wm8994->aif2clk_disable) { snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1, WM8994_AIF2CLK_ENA_MASK, 0); - wm8994->aif2clk_enable = 0; + wm8994->aif2clk_disable = 0; } break; } @@ -1063,6 +1070,9 @@ static int aif1clk_ev(struct snd_soc_dapm_widget *w, case SND_SOC_DAPM_PRE_PMU: wm8994->aif1clk_enable = 1; break; + case SND_SOC_DAPM_POST_PMD: + wm8994->aif1clk_disable = 1; + break; }
return 0; @@ -1078,6 +1088,9 @@ static int aif2clk_ev(struct snd_soc_dapm_widget *w, case SND_SOC_DAPM_PRE_PMU: wm8994->aif2clk_enable = 1; break; + case SND_SOC_DAPM_POST_PMD: + wm8994->aif2clk_disable = 1; + break; }
return 0;
Ensure that the ADCs are provided with a clock as the previous patch "ASoC: WM8994: Improve playback robustness" did not handle this case properly.
Signed-off-by: Dimitris Papastamos dp@opensource.wolfsonmicro.com --- sound/soc/codecs/wm8994.c | 13 +++++++++++-- 1 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c index 9e91525..f330ad0 100644 --- a/sound/soc/codecs/wm8994.c +++ b/sound/soc/codecs/wm8994.c @@ -1096,6 +1096,13 @@ static int aif2clk_ev(struct snd_soc_dapm_widget *w, return 0; }
+static int adc_mux_ev(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + late_enable_ev(w, kcontrol, event); + return 0; +} + static int dac_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { @@ -1510,8 +1517,10 @@ SND_SOC_DAPM_ADC("DMIC1R", NULL, WM8994_POWER_MANAGEMENT_4, 2, 0), SND_SOC_DAPM_ADC("ADCL", NULL, SND_SOC_NOPM, 1, 0), SND_SOC_DAPM_ADC("ADCR", NULL, SND_SOC_NOPM, 0, 0),
-SND_SOC_DAPM_MUX("ADCL Mux", WM8994_POWER_MANAGEMENT_4, 1, 0, &adcl_mux), -SND_SOC_DAPM_MUX("ADCR Mux", WM8994_POWER_MANAGEMENT_4, 0, 0, &adcr_mux), +SND_SOC_DAPM_MUX_E("ADCL Mux", WM8994_POWER_MANAGEMENT_4, 1, 0, &adcl_mux, + adc_mux_ev, SND_SOC_DAPM_PRE_PMU), +SND_SOC_DAPM_MUX_E("ADCR Mux", WM8994_POWER_MANAGEMENT_4, 0, 0, &adcr_mux, + adc_mux_ev, SND_SOC_DAPM_PRE_PMU),
SND_SOC_DAPM_MUX("Left Headphone Mux", SND_SOC_NOPM, 0, 0, &hpl_mux), SND_SOC_DAPM_MUX("Right Headphone Mux", SND_SOC_NOPM, 0, 0, &hpr_mux),
On Mon, 2011-02-28 at 17:24 +0000, Dimitris Papastamos wrote:
Since we began using the late clock disable functionality, ensure that we don't disable the clock if any of the ADC or DAC paths are still enabled. This happens when we have simultaneous playback and recording.
Signed-off-by: Dimitris Papastamos dp@opensource.wolfsonmicro.com
Both
Acked-by: Liam Girdwood lrg@slimlogic.co.uk
On Mon, Feb 28, 2011 at 05:24:11PM +0000, Dimitris Papastamos wrote:
Since we began using the late clock disable functionality, ensure that we don't disable the clock if any of the ADC or DAC paths are still enabled. This happens when we have simultaneous playback and recording.
Signed-off-by: Dimitris Papastamos dp@opensource.wolfsonmicro.com
Applied, thanks.
participants (3)
-
Dimitris Papastamos -
Liam Girdwood -
Mark Brown