[alsa-devel] [PATCH] ASoC: soc-cache: Add trace event for snd_soc_cache_sync()
This patch makes it easier to see which of the register writes are part of the cache syncing functionality.
Signed-off-by: Dimitris Papastamos dp@opensource.wolfsonmicro.com --- include/trace/events/asoc.h | 9 +++++++++ sound/soc/soc-cache.c | 5 +++++ 2 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/include/trace/events/asoc.h b/include/trace/events/asoc.h index 186e84d..7efed81 100644 --- a/include/trace/events/asoc.h +++ b/include/trace/events/asoc.h @@ -59,6 +59,15 @@ DEFINE_EVENT(snd_soc_reg, snd_soc_reg_read,
);
+DEFINE_EVENT(snd_soc_reg, snd_soc_cache_sync, + + TP_PROTO(struct snd_soc_codec *codec, unsigned int reg, + unsigned int val), + + TP_ARGS(codec, reg, val) + +); + DECLARE_EVENT_CLASS(snd_soc_card,
TP_PROTO(struct snd_soc_card *card, int val), diff --git a/sound/soc/soc-cache.c b/sound/soc/soc-cache.c index f834839..accd96e 100644 --- a/sound/soc/soc-cache.c +++ b/sound/soc/soc-cache.c @@ -18,6 +18,8 @@ #include <linux/bitmap.h> #include <linux/rbtree.h>
+#include <trace/events/asoc.h> + static unsigned int snd_soc_4_12_read(struct snd_soc_codec *codec, unsigned int reg) { @@ -895,6 +897,7 @@ static int snd_soc_rbtree_cache_sync(struct snd_soc_codec *codec) codec->cache_bypass = 0; if (ret) return ret; + trace_snd_soc_cache_sync(codec, rbnode->reg, val); dev_dbg(codec->dev, "Synced register %#x, value = %#x\n", rbnode->reg, val); } @@ -1155,6 +1158,7 @@ static int snd_soc_lzo_cache_sync(struct snd_soc_codec *codec) codec->cache_bypass = 0; if (ret) return ret; + trace_snd_soc_cache_sync(codec, i, val); dev_dbg(codec->dev, "Synced register %#x, value = %#x\n", i, val); } @@ -1415,6 +1419,7 @@ static int snd_soc_flat_cache_sync(struct snd_soc_codec *codec) ret = snd_soc_write(codec, i, val); if (ret) return ret; + trace_snd_soc_cache_sync(codec, i, val); dev_dbg(codec->dev, "Synced register %#x, value = %#x\n", i, val); }
On Fri, Jan 21, 2011 at 02:35:48PM +0000, Dimitris Papastamos wrote:
This patch makes it easier to see which of the register writes are part of the cache syncing functionality.
Might be more useful to have sync start and end events? That way we can not only see which writes are part of the sync but we can also see how long the overall process takes, helping diagnose if our CPU side stuff is too expensive.
On Fri, 2011-01-21 at 14:46 +0000, Mark Brown wrote:
On Fri, Jan 21, 2011 at 02:35:48PM +0000, Dimitris Papastamos wrote:
This patch makes it easier to see which of the register writes are part of the cache syncing functionality.
Might be more useful to have sync start and end events? That way we can not only see which writes are part of the sync but we can also see how long the overall process takes, helping diagnose if our CPU side stuff is too expensive.
I'll add those yes and remove the one I've got now.
Thanks, Dimitris
participants (2)
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Dimitris Papastamos
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Mark Brown