[alsa-devel] [RFC PATCH 0/2] wm8960: Relax bit clock computation

Daniel Baluta

15 Mar 2017 15 Mar '17

4:33 p.m.

This patch series allows running S20_3LE encoded samples on wm8960 codec.

First patch does a small refactoring of sysclk frequency search because wm8960_configure_sysclk was getting pretty convoluted.

The second patch allows relaxing bitclock computation in the way that if an exact bitclk couldn't be derived from sysclk it chooses the smalles available bitclk greater than the desired bitclk.

For a better reviewing experience you can checked the squashed version of this patches here:

http://pastebin.com/gBJ3DBSu

Note that this is a follow up of:

"ASoC: wm8960: Use physical width for bclk"

discussion archived here:

http://mailman.alsa-project.org/pipermail/alsa-devel/2017-March/118735.html

Daniel Baluta (2): ASoC: codec: wm8960: Refactor sysclk freq search ASoC: codec: wm8960: Relax bit clock computation

sound/soc/codecs/wm8960.c | 113 +++++++++++++++++++++++++++++++++++++--------- 1 file changed, 91 insertions(+), 22 deletions(-)

-- 2.7.4

Show replies by date

Daniel Baluta

15 Mar 15 Mar

4:33 p.m.

New subject: [alsa-devel] [RFC PATCH 1/2] ASoC: codec: wm8960: Refactor sysclk freq search

Add a separate function for finding (sysclk, lrclk, bclk) when the clock is auto or mclk. This makes code easier to read and reduces the indentation level in wm8960_configure_clocking.

Signed-off-by: Daniel Baluta daniel.baluta@nxp.com --- sound/soc/codecs/wm8960.c | 82 +++++++++++++++++++++++++++++++++++------------ 1 file changed, 62 insertions(+), 20 deletions(-)

diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c index 3bf081a..cb2ff2d 100644 --- a/sound/soc/codecs/wm8960.c +++ b/sound/soc/codecs/wm8960.c @@ -604,12 +604,71 @@ static const int bclk_divs[] = { 120, 160, 220, 240, 320, 320, 320 };

+/** + * wm8960_configure_sysclk - checks if there is a sysclk frequency available + * The sysclk must be chosen such that: + * - sysclk = MCLK / sysclk_divs + * - lrclk = sysclk / dac_divs + * - 10 * bclk = sysclk / bclk_divs + * + * @wm8960_priv: wm8960 codec private data + * @mclk: MCLK used to derive sysclk + * @_i: sysclk_divs index for found sysclk + * @_j: dac_divs index for found lrclk + * @_k: bclk_divs index for found bclk + * + * Returns: + * -1, in case no sysclk frequency available found + * 0, in case an exact match is found. See @_i, @_j, @_k + * + */ +int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk, + int *_i, int *_j, int *_k) +{ + int sysclk, bclk, lrclk; + int i, j, k; + int diff; + + bclk = wm8960->bclk; + lrclk = wm8960->lrclk; + + /* check if the sysclk frequency is available. */ + for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) { + if (sysclk_divs[i] == -1) + continue; + sysclk = mclk / sysclk_divs[i]; + for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) { + if (sysclk != dac_divs[j] * lrclk) + continue; + for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) { + diff = sysclk - bclk * bclk_divs[k] / 10; + if (diff == 0) { + *_i = i; + *_j = j; + *_k = k; + break; + } + } + if (k != ARRAY_SIZE(bclk_divs)) + break; + } + if (j != ARRAY_SIZE(dac_divs)) + break; + } + + if (i != ARRAY_SIZE(sysclk_divs)) + return 0; + + return -1; +} + static int wm8960_configure_clocking(struct snd_soc_codec *codec) { struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); int sysclk, bclk, lrclk, freq_out, freq_in; u16 iface1 = snd_soc_read(codec, WM8960_IFACE1); int i, j, k; + int ret;

if (!(iface1 & (1<<6))) { dev_dbg(codec->dev, @@ -643,27 +702,10 @@ static int wm8960_configure_clocking(struct snd_soc_codec *codec) }

if (wm8960->clk_id != WM8960_SYSCLK_PLL) { - /* check if the sysclk frequency is available. */ - for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) { - if (sysclk_divs[i] == -1) - continue; - sysclk = freq_out / sysclk_divs[i]; - for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) { - if (sysclk != dac_divs[j] * lrclk) - continue; - for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) - if (sysclk == bclk * bclk_divs[k] / 10) - break; - if (k != ARRAY_SIZE(bclk_divs)) - break; - } - if (j != ARRAY_SIZE(dac_divs)) - break; - } - - if (i != ARRAY_SIZE(sysclk_divs)) { + ret = wm8960_configure_sysclk(wm8960, freq_out, &i, &j, &k); + if (ret == 0) goto configure_clock; - } else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) { + else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) { dev_err(codec->dev, "failed to configure clock\n"); return -EINVAL; }

-- 2.7.4

Charles Keepax

5:22 p.m.

New subject: [alsa-devel] [RFC PATCH 1/2] ASoC: codec: wm8960: Refactor sysclk freq search

On Wed, Mar 15, 2017 at 05:33:05PM +0200, Daniel Baluta wrote:

...

Add a separate function for finding (sysclk, lrclk, bclk) when the clock is auto or mclk. This makes code easier to read and reduces the indentation level in wm8960_configure_clocking.

Signed-off-by: Daniel Baluta daniel.baluta@nxp.com

sound/soc/codecs/wm8960.c | 82 +++++++++++++++++++++++++++++++++++------------ 1 file changed, 62 insertions(+), 20 deletions(-)

diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c index 3bf081a..cb2ff2d 100644 --- a/sound/soc/codecs/wm8960.c +++ b/sound/soc/codecs/wm8960.c @@ -604,12 +604,71 @@ static const int bclk_divs[] = { 120, 160, 220, 240, 320, 320, 320 };

+/**
wm8960_configure_sysclk - checks if there is a sysclk frequency available

The sysclk must be chosen such that:
- sysclk     = MCLK / sysclk_divs
- lrclk      = sysclk / dac_divs
- 10 * bclk  = sysclk / bclk_divs
@wm8960_priv: wm8960 codec private data

@mclk: MCLK used to derive sysclk

@_i: sysclk_divs index for found sysclk

@_j: dac_divs index for found lrclk

@_k: bclk_divs index for found bclk

Returns:

-1, in case no sysclk frequency available found

0, in case an exact match is found. See @_i, @_j, @_k

*/
+int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk,
      int *_i, int *_j, int *_k)

This probably wants to be static.

...

+{
int sysclk, bclk, lrclk;

int i, j, k;

int diff;

bclk = wm8960->bclk;

lrclk = wm8960->lrclk;

/* check if the sysclk frequency is available. */

for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
if (sysclk_divs[i] == -1)
	continue;
sysclk = mclk / sysclk_divs[i];
for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
	if (sysclk != dac_divs[j] * lrclk)
		continue;
	for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
		diff = sysclk - bclk * bclk_divs[k] / 10;
		if (diff == 0) {
			*_i = i;
			*_j = j;
			*_k = k;

I would be tempted to move these ...

...

```
			break;
```
```
		}
```
```
	}
```
```
	if (k != ARRAY_SIZE(bclk_divs))
```
```
		break;
```
```
}
```
```
if (j != ARRAY_SIZE(dac_divs))
```
```
	break;
```
}
if (i != ARRAY_SIZE(sysclk_divs))
```
return 0;
```

Down here and give _i, _j, _k slightly more descriptive names, I know the original code didn't have great names either but might as well make things a bit nicer as we are factoring it out.

...

return -1;

+}

static int wm8960_configure_clocking(struct snd_soc_codec *codec) { struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); int sysclk, bclk, lrclk, freq_out, freq_in; u16 iface1 = snd_soc_read(codec, WM8960_IFACE1); int i, j, k;

int ret;

if (!(iface1 & (1<<6))) { dev_dbg(codec->dev,

@@ -643,27 +702,10 @@ static int wm8960_configure_clocking(struct snd_soc_codec *codec) }

if (wm8960->clk_id != WM8960_SYSCLK_PLL) {
/* check if the sysclk frequency is available. */
for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
	if (sysclk_divs[i] == -1)
		continue;
	sysclk = freq_out / sysclk_divs[i];
	for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
		if (sysclk != dac_divs[j] * lrclk)
			continue;
		for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k)
			if (sysclk == bclk * bclk_divs[k] / 10)
				break;
		if (k != ARRAY_SIZE(bclk_divs))
			break;
	}
	if (j != ARRAY_SIZE(dac_divs))
		break;
}
if (i != ARRAY_SIZE(sysclk_divs)) {
ret = wm8960_configure_sysclk(wm8960, freq_out, &i, &j, &k);
if (ret == 0)
goto configure_clock;
} else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {

If one clause of the if has brackets the other should too.

Otherwise, I think this looks fine.

Thanks, Charles

Daniel Baluta

16 Mar 16 Mar

9:49 a.m.

New subject: [alsa-devel] [RFC PATCH 1/2] ASoC: codec: wm8960: Refactor sysclk freq search

On Wed, Mar 15, 2017 at 6:22 PM, Charles Keepax ckeepax@opensource.wolfsonmicro.com wrote:

...

On Wed, Mar 15, 2017 at 05:33:05PM +0200, Daniel Baluta wrote:

...
Add a separate function for finding (sysclk, lrclk, bclk) when the clock is auto or mclk. This makes code easier to read and reduces the indentation level in wm8960_configure_clocking.

Signed-off-by: Daniel Baluta daniel.baluta@nxp.com

sound/soc/codecs/wm8960.c | 82 +++++++++++++++++++++++++++++++++++------------ 1 file changed, 62 insertions(+), 20 deletions(-)

diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c index 3bf081a..cb2ff2d 100644 --- a/sound/soc/codecs/wm8960.c +++ b/sound/soc/codecs/wm8960.c @@ -604,12 +604,71 @@ static const int bclk_divs[] = { 120, 160, 220, 240, 320, 320, 320 };

+/**
wm8960_configure_sysclk - checks if there is a sysclk frequency available

The sysclk must be chosen such that:
      - sysclk     = MCLK / sysclk_divs
      - lrclk      = sysclk / dac_divs
      - 10 * bclk  = sysclk / bclk_divs
@wm8960_priv: wm8960 codec private data

@mclk: MCLK used to derive sysclk

@_i: sysclk_divs index for found sysclk

@_j: dac_divs index for found lrclk

@_k: bclk_divs index for found bclk

Returns:

-1, in case no sysclk frequency available found

0, in case an exact match is found. See @_i, @_j, @_k

*/
+int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk,
              int *_i, int *_j, int *_k)
This probably wants to be static.

You are right. Will fix in next version.

...

```
int sysclk, bclk, lrclk;
```
```
int i, j, k;
```
```
int diff;
```
```
bclk = wm8960->bclk;
```
```
lrclk = wm8960->lrclk;
```

/* check if the sysclk frequency is available. */

for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {

```
        if (sysclk_divs[i] == -1)
```
```
                continue;
```

        sysclk = mclk / sysclk_divs[i];

        for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {

                if (sysclk != dac_divs[j] * lrclk)

```
                        continue;
```

                for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {

                        diff = sysclk - bclk * bclk_divs[k] / 10;

                        if (diff == 0) {

                                *_i = i;

                                *_j = j;

                                *_k = k;

I would be tempted to move these ...

...

```
                                break;
```
```
                        }
```
```
                }
```

                if (k != ARRAY_SIZE(bclk_divs))

```
                        break;
```
```
        }
```
```
        if (j != ARRAY_SIZE(dac_divs))
```
```
                break;
```
```
}
```
```
if (i != ARRAY_SIZE(sysclk_divs))
```
```
        return 0;
```

Down here and give _i, _j, _k slightly more descriptive names, I know the original code didn't have great names either but might as well make things a bit nicer as we are factoring it out.

Ok. This makes sense.

...

```
return -1;
```

static int wm8960_configure_clocking(struct snd_soc_codec *codec) { struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); int sysclk, bclk, lrclk, freq_out, freq_in; u16 iface1 = snd_soc_read(codec, WM8960_IFACE1); int i, j, k;

int ret;

if (!(iface1 & (1<<6))) {
        dev_dbg(codec->dev,

@@ -643,27 +702,10 @@ static int wm8960_configure_clocking(struct snd_soc_codec *codec) }

  if (wm8960->clk_id != WM8960_SYSCLK_PLL) {

        /* check if the sysclk frequency is available. */

        for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {

                if (sysclk_divs[i] == -1)

```
                        continue;
```

                sysclk = freq_out / sysclk_divs[i];

                for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {

                        if (sysclk != dac_divs[j] * lrclk)

                                continue;

                        for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k)

                                if (sysclk == bclk * bclk_divs[k] / 10)

                                        break;

                        if (k != ARRAY_SIZE(bclk_divs))

```
                                break;
```
```
                }
```

                if (j != ARRAY_SIZE(dac_divs))

```
                        break;
```
```
        }
```

        if (i != ARRAY_SIZE(sysclk_divs)) {

        ret = wm8960_configure_sysclk(wm8960, freq_out, &i, &j, &k);

        if (ret == 0)
                goto configure_clock;

        } else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {

        else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {

If one clause of the if has brackets the other should too.

Ok.

thanks, Daniel.

Daniel Baluta

15 Mar 15 Mar

4:33 p.m.

New subject: [alsa-devel] [RFC PATCH 2/2] ASoC: codec: wm8960: Relax bit clock computation

WM8960 derives bit clock from sysclock using BCLKDIV[3:0] of R8 clocking register (See WM8960 datasheet, page 71).

There are use cases, like this: aplay -Dhw:0,0 -r 48000 -c 1 -f S20_3LE -t raw audio48k20b_3LE1c.pcm

where no BCLKDIV applied to sysclock can give us the exact requested bitclk, so driver fails to configure clocking and aplay fails to run.

Fix this by relaxing bitclk computation, so that when no exact value can be derived from sysclk pick the closest value greater than expected bitclk.

Suggested-by: Charles Keepax ckeepax@opensource.wolfsonmicro.com Signed-off-by: Daniel Baluta daniel.baluta@nxp.com --- sound/soc/codecs/wm8960.c | 39 +++++++++++++++++++++++++++++++++------ 1 file changed, 33 insertions(+), 6 deletions(-)

diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c index cb2ff2d..1669b45 100644 --- a/sound/soc/codecs/wm8960.c +++ b/sound/soc/codecs/wm8960.c @@ -611,6 +611,10 @@ static const int bclk_divs[] = { * - lrclk = sysclk / dac_divs * - 10 * bclk = sysclk / bclk_divs * + * If we cannot find an exact match for (sysclk, lrclk, bclk) + * triplet, we relax the bclk such that bclk is chosen as the + * closest available frequency greater than expected bclk. + * * @wm8960_priv: wm8960 codec private data * @mclk: MCLK used to derive sysclk * @_i: sysclk_divs index for found sysclk @@ -620,14 +624,14 @@ static const int bclk_divs[] = { * Returns: * -1, in case no sysclk frequency available found * 0, in case an exact match is found. See @_i, @_j, @_k - * + * >0, in case a relaxed match is found. See @_i, @_j, @_k */ int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk, int *_i, int *_j, int *_k) { int sysclk, bclk, lrclk; int i, j, k; - int diff; + int diff, closest = mclk;

bclk = wm8960->bclk; lrclk = wm8960->lrclk; @@ -648,6 +652,12 @@ int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk, *_k = k; break; } + if (diff > 0 && closest > diff) { + *_i = i; + *_j = j; + *_k = k; + closest = diff; + } } if (k != ARRAY_SIZE(bclk_divs)) break; @@ -656,10 +666,16 @@ int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk, break; }

+ /* exact match */ if (i != ARRAY_SIZE(sysclk_divs)) return 0;

- return -1; + /* no match */ + if (closest == mclk) + return -1; + + /* relaxed match */ + return 1; }

static int wm8960_configure_clocking(struct snd_soc_codec *codec) @@ -668,6 +684,7 @@ static int wm8960_configure_clocking(struct snd_soc_codec *codec) int sysclk, bclk, lrclk, freq_out, freq_in; u16 iface1 = snd_soc_read(codec, WM8960_IFACE1); int i, j, k; + int best_sysclk_div, best_dac_div, best_bclk_div = -1; int ret;

if (!(iface1 & (1<<6))) { @@ -705,10 +722,14 @@ static int wm8960_configure_clocking(struct snd_soc_codec *codec) ret = wm8960_configure_sysclk(wm8960, freq_out, &i, &j, &k); if (ret == 0) goto configure_clock; - else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) { + else if (ret < 0 && wm8960->clk_id != WM8960_SYSCLK_AUTO) { dev_err(codec->dev, "failed to configure clock\n"); return -EINVAL; } + /* there is still hope, keep this if no PLL out available */ + best_sysclk_div = i; + best_dac_div = j; + best_bclk_div = k; } /* get a available pll out frequency and set pll */ for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) { @@ -736,8 +757,14 @@ static int wm8960_configure_clocking(struct snd_soc_codec *codec) }

if (i == ARRAY_SIZE(sysclk_divs)) { - dev_err(codec->dev, "failed to configure clock\n"); - return -EINVAL; + if (best_bclk_div != -1) { + i = best_sysclk_div; + j = best_dac_div; + k = best_bclk_div; + } else { + dev_err(codec->dev, "failed to configure clock\n"); + return -EINVAL; + } }

configure_clock:

-- 2.7.4

Charles Keepax

6:17 p.m.

New subject: [alsa-devel] [RFC PATCH 2/2] ASoC: codec: wm8960: Relax bit clock computation

On Wed, Mar 15, 2017 at 05:33:06PM +0200, Daniel Baluta wrote:

...

WM8960 derives bit clock from sysclock using BCLKDIV[3:0] of R8 clocking register (See WM8960 datasheet, page 71).

There are use cases, like this: aplay -Dhw:0,0 -r 48000 -c 1 -f S20_3LE -t raw audio48k20b_3LE1c.pcm

where no BCLKDIV applied to sysclock can give us the exact requested bitclk, so driver fails to configure clocking and aplay fails to run.

Fix this by relaxing bitclk computation, so that when no exact value can be derived from sysclk pick the closest value greater than expected bitclk.

Suggested-by: Charles Keepax ckeepax@opensource.wolfsonmicro.com Signed-off-by: Daniel Baluta daniel.baluta@nxp.com

sound/soc/codecs/wm8960.c | 39 +++++++++++++++++++++++++++++++++------ 1 file changed, 33 insertions(+), 6 deletions(-)

diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c index cb2ff2d..1669b45 100644 --- a/sound/soc/codecs/wm8960.c +++ b/sound/soc/codecs/wm8960.c @@ -611,6 +611,10 @@ static const int bclk_divs[] = {
- lrclk      = sysclk / dac_divs
- 10 * bclk  = sysclk / bclk_divs
If we cannot find an exact match for (sysclk, lrclk, bclk)

triplet, we relax the bclk such that bclk is chosen as the

closest available frequency greater than expected bclk.

@wm8960_priv: wm8960 codec private data

@mclk: MCLK used to derive sysclk

@_i: sysclk_divs index for found sysclk

@@ -620,14 +624,14 @@ static const int bclk_divs[] = {

Returns:

-1, in case no sysclk frequency available found

0, in case an exact match is found. See @_i, @_j, @_k

...
0, in case a relaxed match is found. See @_i, @_j, @_k

*/

int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk, int *_i, int *_j, int *_k) { int sysclk, bclk, lrclk; int i, j, k;

int diff;

int diff, closest = mclk;

Don't you need to initialise diff here too?

...

bclk = wm8960->bclk; lrclk = wm8960->lrclk; @@ -648,6 +652,12 @@ int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk, *_k = k; break; }
		if (diff > 0 && closest > diff) {
			*_i = i;
			*_j = j;
			*_k = k;
			closest = diff;
		}
}
if (k != ARRAY_SIZE(bclk_divs))
	break;
@@ -656,10 +666,16 @@ int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk, break; }

/* exact match */ if (i != ARRAY_SIZE(sysclk_divs)) return 0;

return -1;
/* no match */

if (closest == mclk)
return -1;
/* relaxed match */

return 1;

Do we need to differenciate between relaxed and an actual match?

...

}

static int wm8960_configure_clocking(struct snd_soc_codec *codec) @@ -668,6 +684,7 @@ static int wm8960_configure_clocking(struct snd_soc_codec *codec) int sysclk, bclk, lrclk, freq_out, freq_in; u16 iface1 = snd_soc_read(codec, WM8960_IFACE1); int i, j, k;

int best_sysclk_div, best_dac_div, best_bclk_div = -1; int ret;

if (!(iface1 & (1<<6))) {

@@ -705,10 +722,14 @@ static int wm8960_configure_clocking(struct snd_soc_codec *codec) ret = wm8960_configure_sysclk(wm8960, freq_out, &i, &j, &k); if (ret == 0) goto configure_clock;
else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
else if (ret < 0 && wm8960->clk_id != WM8960_SYSCLK_AUTO) {
dev_err(codec->dev, "failed to configure clock\n");
return -EINVAL;
}
/* there is still hope, keep this if no PLL out available */
best_sysclk_div	= i;
best_dac_div	= j;
best_bclk_div	= k;

Enabling the PLL just to avoid running the BCLK a little fast doesn't really seem worth it and it would make the code much more obvious.

...

} /* get a available pll out frequency and set pll */ for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) { @@ -736,8 +757,14 @@ static int wm8960_configure_clocking(struct snd_soc_codec *codec) }

if (i == ARRAY_SIZE(sysclk_divs)) {
dev_err(codec->dev, "failed to configure clock\n");
return -EINVAL;
if (best_bclk_div != -1) {
	i = best_sysclk_div;
	j = best_dac_div;
	k = best_bclk_div;
} else {
	dev_err(codec->dev, "failed to configure clock\n");
	return -EINVAL;
}
}
configure_clock:

2.7.4

Thanks, Charles

Daniel Baluta

16 Mar 16 Mar

10:34 a.m.

New subject: [alsa-devel] [RFC PATCH 2/2] ASoC: codec: wm8960: Relax bit clock computation

On Wed, Mar 15, 2017 at 7:17 PM, Charles Keepax ckeepax@opensource.wolfsonmicro.com wrote:

...

On Wed, Mar 15, 2017 at 05:33:06PM +0200, Daniel Baluta wrote:

...
WM8960 derives bit clock from sysclock using BCLKDIV[3:0] of R8 clocking register (See WM8960 datasheet, page 71).

There are use cases, like this: aplay -Dhw:0,0 -r 48000 -c 1 -f S20_3LE -t raw audio48k20b_3LE1c.pcm

where no BCLKDIV applied to sysclock can give us the exact requested bitclk, so driver fails to configure clocking and aplay fails to run.

Fix this by relaxing bitclk computation, so that when no exact value can be derived from sysclk pick the closest value greater than expected bitclk.

Suggested-by: Charles Keepax ckeepax@opensource.wolfsonmicro.com Signed-off-by: Daniel Baluta daniel.baluta@nxp.com

sound/soc/codecs/wm8960.c | 39 +++++++++++++++++++++++++++++++++------ 1 file changed, 33 insertions(+), 6 deletions(-)

diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c index cb2ff2d..1669b45 100644 --- a/sound/soc/codecs/wm8960.c +++ b/sound/soc/codecs/wm8960.c @@ -611,6 +611,10 @@ static const int bclk_divs[] = {
      - lrclk      = sysclk / dac_divs
      - 10 * bclk  = sysclk / bclk_divs
If we cannot find an exact match for (sysclk, lrclk, bclk)

triplet, we relax the bclk such that bclk is chosen as the

closest available frequency greater than expected bclk.

@wm8960_priv: wm8960 codec private data

@mclk: MCLK used to derive sysclk

@_i: sysclk_divs index for found sysclk

@@ -620,14 +624,14 @@ static const int bclk_divs[] = {

Returns:

-1, in case no sysclk frequency available found

0, in case an exact match is found. See @_i, @_j, @_k

...
0, in case a relaxed match is found. See @_i, @_j, @_k

*/

int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk, int *_i, int *_j, int *_k) { int sysclk, bclk, lrclk; int i, j, k;
int diff;
int diff, closest = mclk;
Don't you need to initialise diff here too?

It shouldn't be necessary. Diff is always initialized before used. I added diff variable to avoid always writing: sysclk - bclk * bclk_divs[k] / 10;

...

  bclk = wm8960->bclk;
  lrclk = wm8960->lrclk;

@@ -648,6 +652,12 @@ int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk, *_k = k; break; }

                        if (diff > 0 && closest > diff) {

                                *_i = i;

                                *_j = j;

                                *_k = k;

                                closest = diff;

                        }
                }
                if (k != ARRAY_SIZE(bclk_divs))
                        break;

@@ -656,10 +666,16 @@ int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk, break; }

/* exact match */
if (i != ARRAY_SIZE(sysclk_divs))
        return 0;

```
return -1;
```

```
/* no match */
```
```
if (closest == mclk)
```
```
        return -1;
```
```
/* relaxed match */
```
```
return 1;
```

Do we need to differenciate between relaxed and an actual match?

In my implementation yes. Because if an actual match happens we go directly to "configure_clock" label. If a relaxed match happens we keep this in mind for later and for now we try to see if a PLL out freq is available.

Finally, if no PLL out freq is available we go and use the "relaxed" match.

...

...
}

static int wm8960_configure_clocking(struct snd_soc_codec *codec) @@ -668,6 +684,7 @@ static int wm8960_configure_clocking(struct snd_soc_codec *codec) int sysclk, bclk, lrclk, freq_out, freq_in; u16 iface1 = snd_soc_read(codec, WM8960_IFACE1); int i, j, k;
int best_sysclk_div, best_dac_div, best_bclk_div = -1;
int ret;

if (!(iface1 & (1<<6))) {
@@ -705,10 +722,14 @@ static int wm8960_configure_clocking(struct snd_soc_codec *codec) ret = wm8960_configure_sysclk(wm8960, freq_out, &i, &j, &k); if (ret == 0) goto configure_clock;
        else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
        else if (ret < 0 && wm8960->clk_id != WM8960_SYSCLK_AUTO) {
                dev_err(codec->dev, "failed to configure clock\n");
                return -EINVAL;
        }
        /* there is still hope, keep this if no PLL out available */
        best_sysclk_div = i;
        best_dac_div    = j;
        best_bclk_div   = k;
Enabling the PLL just to avoid running the BCLK a little fast doesn't really seem worth it and it would make the code much more obvious.

That's a nice suggestion. With this we could remove the pll part. Not sure if there are any negative side effects.

I will do some tests.

thanks, Daniel.

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Charles Keepax
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Daniel Baluta