The current check is not effective when all the widgets of a card are involved since other widgets also can be of same type. So, make widget type check more stringent by checking dev pointer additionally.

Signed-off-by: Guneshwor Singh guneshwor.o.singh@intel.com --- sound/soc/intel/skylake/skl-topology.c | 24 ++++++++++++++---------- 1 file changed, 14 insertions(+), 10 deletions(-)

diff --git a/sound/soc/intel/skylake/skl-topology.c b/sound/soc/intel/skylake/skl-topology.c index 73af6e19ebbd..dbe6a19b84f5 100644 --- a/sound/soc/intel/skylake/skl-topology.c +++ b/sound/soc/intel/skylake/skl-topology.c @@ -94,8 +94,12 @@ void skl_tplg_d0i3_put(struct skl *skl, enum d0i3_capability caps) * SKL DSP driver modelling uses only few DAPM widgets so for rest we will * ignore. This helpers checks if the SKL driver handles this widget type */ -static int is_skl_dsp_widget_type(struct snd_soc_dapm_widget *w) +static int is_skl_dsp_widget_type(struct snd_soc_dapm_widget *w, + struct device *dev) { + if (w->dapm->dev != dev) + return false; + switch (w->id) { case snd_soc_dapm_dai_link: case snd_soc_dapm_dai_in: @@ -969,7 +973,7 @@ static int skl_tplg_bind_sinks(struct snd_soc_dapm_widget *w,

next_sink = p->sink;

- if (!is_skl_dsp_widget_type(p->sink)) + if (!is_skl_dsp_widget_type(p->sink, ctx->dev)) return skl_tplg_bind_sinks(p->sink, skl, src_w, src_mconfig);

/* @@ -978,7 +982,7 @@ static int skl_tplg_bind_sinks(struct snd_soc_dapm_widget *w, * they are ones used for SKL so check that first */ if ((p->sink->priv != NULL) && - is_skl_dsp_widget_type(p->sink)) { + is_skl_dsp_widget_type(p->sink, ctx->dev)) {

sink = p->sink; sink_mconfig = sink->priv; @@ -1092,7 +1096,7 @@ static struct snd_soc_dapm_widget *skl_get_src_dsp_widget( * ones used for SKL so check that first */ if ((p->source->priv != NULL) && - is_skl_dsp_widget_type(p->source)) { + is_skl_dsp_widget_type(p->source, ctx->dev)) { return p->source; } } @@ -1654,7 +1658,7 @@ skl_tplg_fe_get_cpr_module(struct snd_soc_dai *dai, int stream) w = dai->playback_widget; snd_soc_dapm_widget_for_each_sink_path(w, p) { if (p->connect && p->sink->power && - !is_skl_dsp_widget_type(p->sink)) + !is_skl_dsp_widget_type(p->sink, dai->dev)) continue;

if (p->sink->priv) { @@ -1667,7 +1671,7 @@ skl_tplg_fe_get_cpr_module(struct snd_soc_dai *dai, int stream) w = dai->capture_widget; snd_soc_dapm_widget_for_each_source_path(w, p) { if (p->connect && p->source->power && - !is_skl_dsp_widget_type(p->source)) + !is_skl_dsp_widget_type(p->source, dai->dev)) continue;

if (p->source->priv) { @@ -1819,7 +1823,7 @@ static int skl_tplg_be_set_src_pipe_params(struct snd_soc_dai *dai, int ret = -EIO;

snd_soc_dapm_widget_for_each_source_path(w, p) { - if (p->connect && is_skl_dsp_widget_type(p->source) && + if (p->connect && is_skl_dsp_widget_type(p->source, dai->dev) && p->source->priv) {

ret = skl_tplg_be_fill_pipe_params(dai, @@ -1844,7 +1848,7 @@ static int skl_tplg_be_set_sink_pipe_params(struct snd_soc_dai *dai, int ret = -EIO;

snd_soc_dapm_widget_for_each_sink_path(w, p) { - if (p->connect && is_skl_dsp_widget_type(p->sink) && + if (p->connect && is_skl_dsp_widget_type(p->sink, dai->dev) && p->sink->priv) {

ret = skl_tplg_be_fill_pipe_params(dai, @@ -2752,7 +2756,7 @@ void skl_cleanup_resources(struct skl *skl) skl->resource.mcps = 0;

list_for_each_entry(w, &card->widgets, list) { - if (is_skl_dsp_widget_type(w) && (w->priv != NULL)) + if (is_skl_dsp_widget_type(w, ctx->dev) && w->priv != NULL) skl_clear_pin_config(soc_platform, w); }

@@ -3408,7 +3412,7 @@ static int skl_tplg_create_pipe_widget_list(struct snd_soc_platform *platform) struct skl_pipe *pipe;

list_for_each_entry(w, &platform->component.card->widgets, list) { - if (is_skl_dsp_widget_type(w) && w->priv != NULL) { + if (is_skl_dsp_widget_type(w, platform->dev) && w->priv) { mcfg = w->priv; pipe = mcfg->pipe;

From: "Pawse, GuruprasadX" guruprasadx.pawse@intel.com

Currently DMIC capture and WoV usecase uses same BE DAI but operate at different sampling rates, this results in config mismatch for WoV when DMIC is already running in parallel.

DMIC has two slots which can operate with some constraints, so add BE DAI for DMICvoice pin which can used for WoV usecases to capture 4ch, 16KHz, 16bit data.

Signed-off-by: Pawse, GuruprasadX guruprasadx.pawse@intel.com Signed-off-by: Guneshwor Singh guneshwor.o.singh@intel.com --- sound/soc/intel/skylake/skl-pcm.c | 11 +++++++++++ 1 file changed, 11 insertions(+)

diff --git a/sound/soc/intel/skylake/skl-pcm.c b/sound/soc/intel/skylake/skl-pcm.c index e46828533826..2685d511c06f 100644 --- a/sound/soc/intel/skylake/skl-pcm.c +++ b/sound/soc/intel/skylake/skl-pcm.c @@ -958,6 +958,17 @@ static struct snd_soc_dai_driver skl_platform_dai[] = { .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, }, }, +{ + .name = "DMIC16k Pin", + .ops = &skl_dmic_dai_ops, + .capture = { + .stream_name = "DMIC16k Rx", + .channels_min = HDA_MONO, + .channels_max = HDA_QUAD, + .rates = SNDRV_PCM_RATE_16000, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + }, +}, { .name = "HD-Codec Pin", .ops = &skl_link_dai_ops,

From: "Pawse, GuruprasadX" guruprasadx.pawse@intel.com

Create BE DAI link for WoV and accordingly update the DAPM machine map

Signed-off-by: Pawse, GuruprasadX guruprasadx.pawse@intel.com Signed-off-by: Guneshwor Singh guneshwor.o.singh@intel.com --- sound/soc/intel/boards/bxt_rt298.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+)

diff --git a/sound/soc/intel/boards/bxt_rt298.c b/sound/soc/intel/boards/bxt_rt298.c index 7843104fadcb..58b56bf60c37 100644 --- a/sound/soc/intel/boards/bxt_rt298.c +++ b/sound/soc/intel/boards/bxt_rt298.c @@ -146,6 +146,9 @@ static const struct snd_soc_dapm_route geminilake_rt298_map[] = { { "dmic01_hifi", NULL, "DMIC01 Rx" }, { "DMIC01 Rx", NULL, "Capture" },

+ { "dmic_voice", NULL, "DMIC16k Rx" }, + { "DMIC16k Rx", NULL, "Capture" }, + { "hifi3", NULL, "iDisp3 Tx"}, { "iDisp3 Tx", NULL, "iDisp3_out"}, { "hifi2", NULL, "iDisp2 Tx"}, @@ -456,6 +459,18 @@ static struct snd_soc_dai_link broxton_rt298_dais[] = { .dpcm_capture = 1, .no_pcm = 1, }, + { + .name = "dmic16k", + .id = 2, + .cpu_dai_name = "DMIC16k Pin", + .codec_name = "dmic-codec", + .codec_dai_name = "dmic-hifi", + .platform_name = "0000:00:0e.0", + .be_hw_params_fixup = broxton_dmic_fixup, + .ignore_suspend = 1, + .dpcm_capture = 1, + .no_pcm = 1, + }, { .name = "iDisp1", .id = 3,

From: Sriram Periyasamy sriramx.periyasamy@intel.com

Module id is a property of firmware manifest and can vary across platforms. So use the uuid to find module id dynamically for bind params like kpb post bind params.

Signed-off-by: Sriram Periyasamy sriramx.periyasamy@intel.com Signed-off-by: Guneshwor Singh guneshwor.o.singh@intel.com --- sound/soc/intel/skylake/skl-pcm.c | 2 + sound/soc/intel/skylake/skl-topology.c | 83 +++++++++++++++++++++++++++++++++- sound/soc/intel/skylake/skl-topology.h | 13 +++++- 3 files changed, 96 insertions(+), 2 deletions(-)

diff --git a/sound/soc/intel/skylake/skl-pcm.c b/sound/soc/intel/skylake/skl-pcm.c index 2685d511c06f..91d858e25fce 100644 --- a/sound/soc/intel/skylake/skl-pcm.c +++ b/sound/soc/intel/skylake/skl-pcm.c @@ -1318,6 +1318,8 @@ static int skl_populate_modules(struct skl *skl) "query module info failed\n"); return ret; } + + skl_tplg_add_moduleid_in_bind_params(skl, w); } }

diff --git a/sound/soc/intel/skylake/skl-topology.c b/sound/soc/intel/skylake/skl-topology.c index dbe6a19b84f5..17da3b58c214 100644 --- a/sound/soc/intel/skylake/skl-topology.c +++ b/sound/soc/intel/skylake/skl-topology.c @@ -830,7 +830,7 @@ static int skl_fill_sink_instance_id(struct skl_sst *ctx, u32 *params, if (mcfg->m_type == SKL_MODULE_TYPE_KPB) { struct skl_kpb_params *kpb_params = (struct skl_kpb_params *)params; - struct skl_mod_inst_map *inst = kpb_params->map; + struct skl_mod_inst_map *inst = kpb_params->u.map;

for (i = 0; i < kpb_params->num_modules; i++) { pvt_id = skl_get_pvt_instance_id_map(ctx, inst->mod_id, @@ -915,6 +915,87 @@ static int skl_tplg_set_module_bind_params(struct snd_soc_dapm_widget *w, return 0; }

+static int skl_get_module_id(struct skl_sst *ctx, uuid_le *uuid) +{ + struct uuid_module *module; + + list_for_each_entry(module, &ctx->uuid_list, list) { + if (uuid_le_cmp(*uuid, module->uuid) == 0) + return module->id; + } + + return -EINVAL; +} + +static int skl_tplg_find_moduleid_from_uuid(struct skl *skl, + const struct snd_kcontrol_new *k) +{ + struct soc_bytes_ext *sb = (void *) k->private_value; + struct skl_algo_data *bc = (struct skl_algo_data *)sb->dobj.private; + struct skl_kpb_params *uuid_params, *params; + struct hdac_bus *bus = ebus_to_hbus(skl_to_ebus(skl)); + int i, size, module_id; + + if (bc->set_params == SKL_PARAM_BIND && bc->max) { + uuid_params = (struct skl_kpb_params *)bc->params; + size = uuid_params->num_modules * + sizeof(struct skl_mod_inst_map) + + sizeof(uuid_params->num_modules); + + params = devm_kzalloc(bus->dev, size, GFP_KERNEL); + if (!params) + return -ENOMEM; + + params->num_modules = uuid_params->num_modules; + + for (i = 0; i < uuid_params->num_modules; i++) { + module_id = skl_get_module_id(skl->skl_sst, + &uuid_params->u.map_uuid[i].mod_uuid); + if (module_id < 0) { + devm_kfree(bus->dev, params); + return -EINVAL; + } + + params->u.map[i].mod_id = module_id; + params->u.map[i].inst_id = + uuid_params->u.map_uuid[i].inst_id; + } + + devm_kfree(bus->dev, bc->params); + bc->params = (char *)params; + bc->max = size; + } + + return 0; +} + +/* + * Retrieve the module id from UUID mentioned in the + * post bind params + */ +void skl_tplg_add_moduleid_in_bind_params(struct skl *skl, + struct snd_soc_dapm_widget *w) +{ + struct skl_module_cfg *mconfig = w->priv; + int i; + + /* + * Post bind params are used for only for KPB + * to set copier instances to drain the data + * in fast mode + */ + if (mconfig->m_type != SKL_MODULE_TYPE_KPB) + return; + + for (i = 0; i < w->num_kcontrols; i++) + if ((w->kcontrol_news[i].access & + SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) && + (skl_tplg_find_moduleid_from_uuid(skl, + &w->kcontrol_news[i]) < 0)) + dev_err(skl->skl_sst->dev, + "%s: invalid kpb post bind params\n", + __func__); +}

static int skl_tplg_module_add_deferred_bind(struct skl *skl, struct skl_module_cfg *src, struct skl_module_cfg *dst) diff --git a/sound/soc/intel/skylake/skl-topology.h b/sound/soc/intel/skylake/skl-topology.h index b6496513fe55..a467129cc705 100644 --- a/sound/soc/intel/skylake/skl-topology.h +++ b/sound/soc/intel/skylake/skl-topology.h @@ -221,9 +221,18 @@ struct skl_mod_inst_map { u16 inst_id; };

+struct skl_uuid_inst_map { + u16 inst_id; + u16 reserved; + uuid_le mod_uuid; +} __packed; + struct skl_kpb_params { u32 num_modules; - struct skl_mod_inst_map map[0]; + union { + struct skl_mod_inst_map map[0]; + struct skl_uuid_inst_map map_uuid[0]; + } u; };

struct skl_module_inst_id { @@ -505,4 +514,6 @@ int skl_pcm_link_dma_prepare(struct device *dev,

int skl_dai_load(struct snd_soc_component *cmp, struct snd_soc_dai_driver *pcm_dai); +void skl_tplg_add_moduleid_in_bind_params(struct skl *skl, + struct snd_soc_dapm_widget *w); #endif

From: Sanyog Kale sanyog.r.kale@intel.com

In order to achieve better DMA performance and reduce download time for firmware and library, it is recommended to disable dynamic clock and power gating. In some scenarios, DMA may wait to accumulate more data and last chunk of data never gets completed if dynamic clock and power gating is kept enabled.

This patch adds support to disable/enable dynamic clock and power gating and use it during firmware and library download.

Signed-off-by: Sanyog Kale sanyog.r.kale@intel.com Signed-off-by: Rakesh Ughreja rakesh.a.ughreja@intel.com Signed-off-by: Guneshwor Singh guneshwor.o.singh@intel.com --- sound/soc/intel/skylake/skl-messages.c | 7 ++++++- sound/soc/intel/skylake/skl-pcm.c | 7 ++++++- sound/soc/intel/skylake/skl-sst-ipc.h | 3 +++ sound/soc/intel/skylake/skl.c | 21 +++++++++++++++++++++ sound/soc/intel/skylake/skl.h | 4 ++++ 5 files changed, 40 insertions(+), 2 deletions(-)

diff --git a/sound/soc/intel/skylake/skl-messages.c b/sound/soc/intel/skylake/skl-messages.c index 8cbf080c38b3..80e448e11bd7 100644 --- a/sound/soc/intel/skylake/skl-messages.c +++ b/sound/soc/intel/skylake/skl-messages.c @@ -417,11 +417,16 @@ int skl_resume_dsp(struct skl *skl) if (skl->skl_sst->is_first_boot == true) return 0;

- /* disable dynamic clock gating during fw and lib download */ + /* + * disable dynamic clock and power gating during firmware + * and library download + */ ctx->enable_miscbdcge(ctx->dev, false); + ctx->clock_power_gating(ctx->dev, false);

ret = skl_dsp_wake(ctx->dsp); ctx->enable_miscbdcge(ctx->dev, true); + ctx->clock_power_gating(ctx->dev, true); if (ret < 0) return ret;

diff --git a/sound/soc/intel/skylake/skl-pcm.c b/sound/soc/intel/skylake/skl-pcm.c index 91d858e25fce..df824224261e 100644 --- a/sound/soc/intel/skylake/skl-pcm.c +++ b/sound/soc/intel/skylake/skl-pcm.c @@ -1356,11 +1356,16 @@ static int skl_platform_soc_probe(struct snd_soc_platform *platform) return -EIO; }

- /* disable dynamic clock gating during fw and lib download */ + /* + * disable dynamic clock and power gating during firmware + * and library download + */ skl->skl_sst->enable_miscbdcge(platform->dev, false); + skl->skl_sst->clock_power_gating(platform->dev, false);

ret = ops->init_fw(platform->dev, skl->skl_sst); skl->skl_sst->enable_miscbdcge(platform->dev, true); + skl->skl_sst->clock_power_gating(platform->dev, true); if (ret < 0) { dev_err(platform->dev, "Failed to boot first fw: %d\n", ret); return ret; diff --git a/sound/soc/intel/skylake/skl-sst-ipc.h b/sound/soc/intel/skylake/skl-sst-ipc.h index 55f2d2ce09df..f74f040dfd83 100644 --- a/sound/soc/intel/skylake/skl-sst-ipc.h +++ b/sound/soc/intel/skylake/skl-sst-ipc.h @@ -118,6 +118,9 @@ struct skl_sst { struct skl_d0i3_data d0i3;

const struct skl_dsp_ops *dsp_ops; + + /* Callback to update dynamic clock and power gating registers */ + void (*clock_power_gating)(struct device *dev, bool enable); };

struct skl_ipc_init_instance_msg { diff --git a/sound/soc/intel/skylake/skl.c b/sound/soc/intel/skylake/skl.c index 9668ef529d12..15b8aea4c573 100644 --- a/sound/soc/intel/skylake/skl.c +++ b/sound/soc/intel/skylake/skl.c @@ -94,6 +94,26 @@ static void skl_enable_miscbdcge(struct device *dev, bool enable) update_pci_dword(pci, AZX_PCIREG_CGCTL, AZX_CGCTL_MISCBDCGE_MASK, val); }

+static void skl_clock_power_gating(struct device *dev, bool enable) +{ + struct pci_dev *pci = to_pci_dev(dev); + struct hdac_ext_bus *ebus = pci_get_drvdata(pci); + struct hdac_bus *bus = ebus_to_hbus(ebus); + u32 val; + + /* update PDCGE bit of CGCTL register */ + val = enable ? AZX_CGCTL_ADSPDCGE : 0; + update_pci_dword(pci, AZX_PCIREG_CGCTL, AZX_CGCTL_ADSPDCGE, val); + + /* update L1SEN bit of EM2 register */ + val = enable ? AZX_REG_VS_EM2_L1SEN : 0; + snd_hdac_chip_updatel(bus, VS_EM2, AZX_REG_VS_EM2_L1SEN, val); + + /* update ADSPPGD bit of PGCTL register */ + val = enable ? 0 : AZX_PGCTL_ADSPPGD; + update_pci_dword(pci, AZX_PCIREG_PGCTL, AZX_PGCTL_ADSPPGD, val); +} + /* * While performing reset, controller may not come back properly causing * issues, so recommendation is to set CGCTL.MISCBDCGE to 0 then do reset @@ -921,6 +941,7 @@ static int skl_probe(struct pci_dev *pci, goto out_nhlt_free; } skl->skl_sst->enable_miscbdcge = skl_enable_miscbdcge; + skl->skl_sst->clock_power_gating = skl_clock_power_gating; } if (bus->mlcap) snd_hdac_ext_bus_get_ml_capabilities(ebus); diff --git a/sound/soc/intel/skylake/skl.h b/sound/soc/intel/skylake/skl.h index 9b1e9199fa18..d14b7544bfb6 100644 --- a/sound/soc/intel/skylake/skl.h +++ b/sound/soc/intel/skylake/skl.h @@ -33,12 +33,16 @@

#define AZX_PCIREG_PGCTL 0x44 #define AZX_PGCTL_LSRMD_MASK (1 << 4) +#define AZX_PGCTL_ADSPPGD BIT(2) #define AZX_PCIREG_CGCTL 0x48 #define AZX_CGCTL_MISCBDCGE_MASK (1 << 6) +#define AZX_CGCTL_ADSPDCGE BIT(1) /* D0I3C Register fields */ #define AZX_REG_VS_D0I3C_CIP 0x1 /* Command in progress */ #define AZX_REG_VS_D0I3C_I3 0x4 /* D0i3 enable */

+#define AZX_REG_VS_EM2_L1SEN BIT(13) + struct skl_dsp_resource { u32 max_mcps; u32 max_mem;